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Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[deliverable/linux.git] / arch / arm / mach-realview / realview_pb1176.c
CommitLineData
a0316b24
BB		 1/*
2 * linux/arch/arm/mach-realview/realview_pb1176.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/platform_device.h>
edbaa603 24#include <linux/device.h>
a0316b24 25#include <linux/amba/bus.h>
eb7fffa3 26#include <linux/amba/pl061.h>
6ef297f8 27#include <linux/amba/mmci.h>
d6ada860 28#include <linux/amba/pl022.h>
0ec5a95b
LW		 29#include <linux/mtd/physmap.h>
30#include <linux/mtd/partitions.h>
fced80c7 31#include <linux/io.h>
520f7bd7 32#include <linux/irqchip/arm-gic.h>
f9a6aa43 33#include <linux/platform_data/clk-realview.h>
a0316b24 34
a09e64fb 35#include <mach/hardware.h>
a0316b24 36#include <asm/irq.h>
a0316b24 37#include <asm/mach-types.h>
cc9897df 38#include <asm/pgtable.h>
a0316b24
BB		 39#include <asm/hardware/cache-l2x0.h>
40
41#include <asm/mach/arch.h>
42#include <asm/mach/flash.h>
43#include <asm/mach/map.h>
a0316b24
BB		 44#include <asm/mach/time.h>
45
a09e64fb
RK		 46#include <mach/board-pb1176.h>
47#include <mach/irqs.h>
a0316b24
BB		 48
49#include "core.h"
a0316b24
BB		 50
51static struct map_desc realview_pb1176_io_desc[] __initdata = {
52 {
53 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
54 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
55 .length = SZ_4K,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
59 .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
60 .length = SZ_4K,
61 .type = MT_DEVICE,
62 }, {
63 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
64 .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
65 .length = SZ_4K,
66 .type = MT_DEVICE,
67 }, {
68 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
69 .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
70 .length = SZ_4K,
71 .type = MT_DEVICE,
72 }, {
73 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
74 .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
75 .length = SZ_4K,
76 .type = MT_DEVICE,
77 }, {
78 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
79 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
80 .length = SZ_4K,
81 .type = MT_DEVICE,
82 }, {
83 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
84 .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
85 .length = SZ_4K,
86 .type = MT_DEVICE,
87 }, {
88 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
89 .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
90 .length = SZ_4K,
91 .type = MT_DEVICE,
92 }, {
93 .virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
94 .pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
95 .length = SZ_8K,
96 .type = MT_DEVICE,
97 },
98#ifdef CONFIG_DEBUG_LL
99 {
100 .virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
101 .pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
102 .length = SZ_4K,
103 .type = MT_DEVICE,
104 },
105#endif
106};
107
108static void __init realview_pb1176_map_io(void)
109{
110 iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
111}
112
eb7fffa3
RK		 113static struct pl061_platform_data gpio0_plat_data = {
114 .gpio_base = 0,
eb7fffa3
RK		 115};
116
117static struct pl061_platform_data gpio1_plat_data = {
118 .gpio_base = 8,
eb7fffa3
RK		 119};
120
121static struct pl061_platform_data gpio2_plat_data = {
122 .gpio_base = 16,
eb7fffa3
RK		 123};
124
d6ada860
LW		 125static struct pl022_ssp_controller ssp0_plat_data = {
126 .bus_id = 0,
127 .enable_dma = 0,
128 .num_chipselect = 1,
129};
130
a0316b24
BB		 131/*
132 * RealView PB1176 AMBA devices
133 */
0dada61a
RK		 134#define GPIO2_IRQ { IRQ_PB1176_GPIO2 }
135#define GPIO3_IRQ { IRQ_PB1176_GPIO3 }
136#define AACI_IRQ { IRQ_PB1176_AACI }
a0316b24 137#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
0dada61a
RK		 138#define KMI0_IRQ { IRQ_PB1176_KMI0 }
139#define KMI1_IRQ { IRQ_PB1176_KMI1 }
140#define PB1176_SMC_IRQ { }
141#define MPMC_IRQ { }
142#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
143#define SCTL_IRQ { }
144#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG }
145#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 }
146#define GPIO1_IRQ { IRQ_PB1176_GPIO1 }
147#define PB1176_RTC_IRQ { IRQ_DC1176_RTC }
148#define SCI_IRQ { IRQ_PB1176_SCI }
149#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 }
150#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 }
151#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 }
152#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 }
153#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 }
154#define PB1176_SSP_IRQ { IRQ_DC1176_SSP }
a0316b24
BB		 155
156/* FPGA Primecells */
9199340b
RK		 157APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
158APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
159APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
160APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
161APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL);
a0316b24
BB		 162
163/* DevChip Primecells */
9199340b
RK		 164AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
165AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
166APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
167APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
168APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
169APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
170APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
171APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
172APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
173APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
174APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
175APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL);
176APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data);
177AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data);
a0316b24
BB		 178
179static struct amba_device *amba_devs[] __initdata = {
a0316b24
BB		 180 &uart0_device,
181 &uart1_device,
182 &uart2_device,
183 &uart3_device,
48f1d5a3 184 &uart4_device,
a0316b24
BB		 185 &smc_device,
186 &clcd_device,
187 &sctl_device,
188 &wdog_device,
189 &gpio0_device,
190 &gpio1_device,
191 &gpio2_device,
192 &rtc_device,
193 &sci0_device,
194 &ssp0_device,
195 &aaci_device,
196 &mmc0_device,
197 &kmi0_device,
198 &kmi1_device,
199};
200
201/*
202 * RealView PB1176 platform devices
203 */
af607747 204static struct resource realview_pb1176_flash_resources[] = {
0ec5a95b 205 {
af607747
CM		 206 .start = REALVIEW_PB1176_FLASH_BASE,
207 .end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
208 .flags = IORESOURCE_MEM,
209 },
0ec5a95b
LW		 210#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
211 {
af607747
CM		 212 .start = REALVIEW_PB1176_SEC_FLASH_BASE,
213 .end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
214 .flags = IORESOURCE_MEM,
215 },
af607747 216#endif
0ec5a95b
LW		 217};
218
219static struct physmap_flash_data pb1176_rom_pdata = {
220 .probe_type = "map_rom",
221 .width = 4,
222 .nr_parts = 0,
223};
224
225static struct resource pb1176_rom_resources[] = {
226 /*
227 * This exposes the PB1176 DevChip ROM as an MTD ROM mapping.
228 * The reference manual states that this is actually a pseudo-ROM
229 * programmed in NVRAM.
230 */
231 {
232 .start = REALVIEW_DC1176_ROM_BASE,
233 .end = REALVIEW_DC1176_ROM_BASE + SZ_16K - 1,
234 .flags = IORESOURCE_MEM,
235 }
236};
237
238static struct platform_device pb1176_rom_device = {
239 .name = "physmap-flash",
240 .id = -1,
241 .num_resources = ARRAY_SIZE(pb1176_rom_resources),
242 .resource = pb1176_rom_resources,
243 .dev = {
244 .platform_data = &pb1176_rom_pdata,
245 },
246};
a0316b24
BB		 247
248static struct resource realview_pb1176_smsc911x_resources[] = {
249 [0] = {
250 .start = REALVIEW_PB1176_ETH_BASE,
251 .end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
252 .flags = IORESOURCE_MEM,
253 },
254 [1] = {
255 .start = IRQ_PB1176_ETH,
256 .end = IRQ_PB1176_ETH,
257 .flags = IORESOURCE_IRQ,
258 },
259};
260
7db21712
CM		 261static struct resource realview_pb1176_isp1761_resources[] = {
262 [0] = {
263 .start = REALVIEW_PB1176_USB_BASE,
264 .end = REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
265 .flags = IORESOURCE_MEM,
266 },
267 [1] = {
268 .start = IRQ_PB1176_USB,
269 .end = IRQ_PB1176_USB,
270 .flags = IORESOURCE_IRQ,
271 },
272};
273
f417cbad
WD		 274static struct resource pmu_resource = {
275 .start = IRQ_DC1176_CORE_PMU,
276 .end = IRQ_DC1176_CORE_PMU,
277 .flags = IORESOURCE_IRQ,
278};
279
280static struct platform_device pmu_device = {
281 .name = "arm-pmu",
df3d17e0 282 .id = -1,
f417cbad
WD		 283 .num_resources = 1,
284 .resource = &pmu_resource,
285};
286
d161edfb
LW		 287static struct resource char_lcd_resources[] = {
288 {
289 .start = REALVIEW_CHAR_LCD_BASE,
290 .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
291 .flags = IORESOURCE_MEM,
292 },
293 {
294 .start = IRQ_PB1176_CHARLCD,
295 .end = IRQ_PB1176_CHARLCD,
296 .flags = IORESOURCE_IRQ,
297 },
298};
299
300static struct platform_device char_lcd_device = {
301 .name = "arm-charlcd",
302 .id = -1,
303 .num_resources = ARRAY_SIZE(char_lcd_resources),
304 .resource = char_lcd_resources,
305};
306
a0316b24
BB		 307static void __init gic_init_irq(void)
308{
309 /* ARM1176 DevChip GIC, primary */
b580b899
RK		 310 gic_init(0, IRQ_DC1176_GIC_START,
311 __io_address(REALVIEW_DC1176_GIC_DIST_BASE),
ff2e27ae 312 __io_address(REALVIEW_DC1176_GIC_CPU_BASE));
a0316b24
BB		 313
314 /* board GIC, secondary */
b580b899
RK		 315 gic_init(1, IRQ_PB1176_GIC_START,
316 __io_address(REALVIEW_PB1176_GIC_DIST_BASE),
317 __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
a0316b24
BB		 318 gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
319}
320
321static void __init realview_pb1176_timer_init(void)
322{
323 timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
324 timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
325 timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
326 timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
327
f9a6aa43 328 realview_clk_init(__io_address(REALVIEW_SYS_BASE), true);
a0316b24
BB		 329 realview_timer_init(IRQ_DC1176_TIMER0);
330}
331
47cacdd4 332static void realview_pb1176_restart(char mode, const char *cmd)
426fcd2a 333{
4c9f8be7
CT		 334 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
335 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
336 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
337 __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
47cacdd4 338 dsb();
426fcd2a
PJ		 339}
340
0744a3ee 341static void realview_pb1176_fixup(struct tag *tags, char **from,
5b39d154
CM		 342 struct meminfo *meminfo)
343{
344 /*
345 * RealView PB1176 only has 128MB of RAM mapped at 0.
346 */
347 meminfo->bank[0].start = 0;
348 meminfo->bank[0].size = SZ_128M;
349 meminfo->nr_banks = 1;
350}
351
a0316b24
BB		 352static void __init realview_pb1176_init(void)
353{
354 int i;
355
ba927951 356#ifdef CONFIG_CACHE_L2X0
a0316b24
BB		 357 /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
358 l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
ba927951 359#endif
a0316b24 360
af607747 361 realview_flash_register(realview_pb1176_flash_resources,
0ec5a95b
LW		 362 ARRAY_SIZE(realview_pb1176_flash_resources));
363 platform_device_register(&pb1176_rom_device);
0a381330 364 realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
533ad5e6 365 platform_device_register(&realview_i2c_device);
7db21712 366 realview_usb_register(realview_pb1176_isp1761_resources);
f417cbad 367 platform_device_register(&pmu_device);
d161edfb 368 platform_device_register(&char_lcd_device);
a0316b24
BB		 369
370 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
371 struct amba_device *d = amba_devs[i];
372 amba_device_register(d, &iomem_resource);
373 }
a0316b24
BB		 374}
375
376MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
377 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
9ddea57e 378 .atag_offset = 0x100,
5b39d154 379 .fixup = realview_pb1176_fixup,
a0316b24 380 .map_io = realview_pb1176_map_io,
631e55f9 381 .init_early = realview_init_early,
a0316b24 382 .init_irq = gic_init_irq,
6bb27d73 383 .init_time = realview_pb1176_timer_init,
a0316b24 384 .init_machine = realview_pb1176_init,
00e9125e
NP		 385#ifdef CONFIG_ZONE_DMA
386 .dma_zone_size = SZ_256M,
387#endif
47cacdd4 388 .restart = realview_pb1176_restart,
a0316b24 389MACHINE_END
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