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a9b67db5 BB |
1 | /* |
2 | * linux/arch/arm/mach-realview/realview_pb11mp.c | |
3 | * | |
4 | * Copyright (C) 2008 ARM Limited | |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | */ | |
21 | ||
22 | #include <linux/init.h> | |
23 | #include <linux/platform_device.h> | |
edbaa603 | 24 | #include <linux/device.h> |
a9b67db5 | 25 | #include <linux/amba/bus.h> |
eb7fffa3 | 26 | #include <linux/amba/pl061.h> |
6ef297f8 | 27 | #include <linux/amba/mmci.h> |
d6ada860 | 28 | #include <linux/amba/pl022.h> |
fced80c7 | 29 | #include <linux/io.h> |
520f7bd7 | 30 | #include <linux/irqchip/arm-gic.h> |
f9a6aa43 | 31 | #include <linux/platform_data/clk-realview.h> |
7b6d864b | 32 | #include <linux/reboot.h> |
a9b67db5 | 33 | |
a09e64fb | 34 | #include <mach/hardware.h> |
a9b67db5 | 35 | #include <asm/irq.h> |
a9b67db5 | 36 | #include <asm/mach-types.h> |
cc9897df | 37 | #include <asm/pgtable.h> |
a9b67db5 | 38 | #include <asm/hardware/cache-l2x0.h> |
7c380f27 | 39 | #include <asm/smp_twd.h> |
a9b67db5 BB |
40 | |
41 | #include <asm/mach/arch.h> | |
42 | #include <asm/mach/flash.h> | |
43 | #include <asm/mach/map.h> | |
a9b67db5 BB |
44 | #include <asm/mach/time.h> |
45 | ||
a09e64fb RK |
46 | #include <mach/board-pb11mp.h> |
47 | #include <mach/irqs.h> | |
a9b67db5 BB |
48 | |
49 | #include "core.h" | |
a9b67db5 BB |
50 | |
51 | static struct map_desc realview_pb11mp_io_desc[] __initdata = { | |
52 | { | |
53 | .virtual = IO_ADDRESS(REALVIEW_SYS_BASE), | |
54 | .pfn = __phys_to_pfn(REALVIEW_SYS_BASE), | |
55 | .length = SZ_4K, | |
56 | .type = MT_DEVICE, | |
57 | }, { | |
58 | .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE), | |
59 | .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE), | |
60 | .length = SZ_4K, | |
61 | .type = MT_DEVICE, | |
62 | }, { | |
63 | .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE), | |
64 | .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE), | |
65 | .length = SZ_4K, | |
66 | .type = MT_DEVICE, | |
34ae6c96 MZ |
67 | }, { /* Maps the SCU, GIC CPU interface, TWD, GIC DIST */ |
68 | .virtual = IO_ADDRESS(REALVIEW_TC11MP_PRIV_MEM_BASE), | |
69 | .pfn = __phys_to_pfn(REALVIEW_TC11MP_PRIV_MEM_BASE), | |
70 | .length = REALVIEW_TC11MP_PRIV_MEM_SIZE, | |
a9b67db5 BB |
71 | .type = MT_DEVICE, |
72 | }, { | |
73 | .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), | |
74 | .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), | |
75 | .length = SZ_4K, | |
76 | .type = MT_DEVICE, | |
77 | }, { | |
78 | .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE), | |
79 | .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE), | |
80 | .length = SZ_4K, | |
81 | .type = MT_DEVICE, | |
82 | }, { | |
83 | .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE), | |
84 | .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE), | |
85 | .length = SZ_4K, | |
86 | .type = MT_DEVICE, | |
87 | }, { | |
88 | .virtual = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE), | |
89 | .pfn = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE), | |
90 | .length = SZ_8K, | |
91 | .type = MT_DEVICE, | |
92 | }, | |
93 | #ifdef CONFIG_DEBUG_LL | |
94 | { | |
95 | .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE), | |
96 | .pfn = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE), | |
97 | .length = SZ_4K, | |
98 | .type = MT_DEVICE, | |
99 | }, | |
100 | #endif | |
101 | }; | |
102 | ||
103 | static void __init realview_pb11mp_map_io(void) | |
104 | { | |
105 | iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc)); | |
106 | } | |
107 | ||
eb7fffa3 RK |
108 | static struct pl061_platform_data gpio0_plat_data = { |
109 | .gpio_base = 0, | |
eb7fffa3 RK |
110 | }; |
111 | ||
112 | static struct pl061_platform_data gpio1_plat_data = { | |
113 | .gpio_base = 8, | |
eb7fffa3 RK |
114 | }; |
115 | ||
116 | static struct pl061_platform_data gpio2_plat_data = { | |
117 | .gpio_base = 16, | |
eb7fffa3 RK |
118 | }; |
119 | ||
d6ada860 LW |
120 | static struct pl022_ssp_controller ssp0_plat_data = { |
121 | .bus_id = 0, | |
122 | .enable_dma = 0, | |
123 | .num_chipselect = 1, | |
124 | }; | |
125 | ||
a9b67db5 BB |
126 | /* |
127 | * RealView PB11MPCore AMBA devices | |
128 | */ | |
129 | ||
0dada61a RK |
130 | #define GPIO2_IRQ { IRQ_PB11MP_GPIO2 } |
131 | #define GPIO3_IRQ { IRQ_PB11MP_GPIO3 } | |
132 | #define AACI_IRQ { IRQ_TC11MP_AACI } | |
a9b67db5 | 133 | #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } |
0dada61a RK |
134 | #define KMI0_IRQ { IRQ_TC11MP_KMI0 } |
135 | #define KMI1_IRQ { IRQ_TC11MP_KMI1 } | |
136 | #define PB11MP_SMC_IRQ { } | |
137 | #define MPMC_IRQ { } | |
138 | #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD } | |
139 | #define DMAC_IRQ { IRQ_PB11MP_DMAC } | |
140 | #define SCTL_IRQ { } | |
141 | #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG } | |
142 | #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 } | |
143 | #define GPIO1_IRQ { IRQ_PB11MP_GPIO1 } | |
144 | #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC } | |
145 | #define SCI_IRQ { IRQ_PB11MP_SCI } | |
146 | #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 } | |
147 | #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 } | |
148 | #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 } | |
149 | #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 } | |
150 | #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP } | |
a9b67db5 BB |
151 | |
152 | /* FPGA Primecells */ | |
9199340b RK |
153 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
154 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | |
155 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | |
156 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | |
157 | APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); | |
a9b67db5 BB |
158 | |
159 | /* DevChip Primecells */ | |
9199340b RK |
160 | AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); |
161 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); | |
162 | APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); | |
163 | APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); | |
164 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | |
165 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | |
166 | APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); | |
167 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); | |
168 | APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); | |
169 | APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); | |
170 | APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); | |
171 | APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); | |
a9b67db5 BB |
172 | |
173 | /* Primecells on the NEC ISSP chip */ | |
9199340b RK |
174 | AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); |
175 | AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); | |
a9b67db5 BB |
176 | |
177 | static struct amba_device *amba_devs[] __initdata = { | |
178 | &dmac_device, | |
179 | &uart0_device, | |
180 | &uart1_device, | |
181 | &uart2_device, | |
182 | &uart3_device, | |
183 | &smc_device, | |
184 | &clcd_device, | |
185 | &sctl_device, | |
186 | &wdog_device, | |
187 | &gpio0_device, | |
188 | &gpio1_device, | |
189 | &gpio2_device, | |
190 | &rtc_device, | |
191 | &sci0_device, | |
192 | &ssp0_device, | |
193 | &aaci_device, | |
194 | &mmc0_device, | |
195 | &kmi0_device, | |
196 | &kmi1_device, | |
197 | }; | |
198 | ||
199 | /* | |
200 | * RealView PB11MPCore platform devices | |
201 | */ | |
202 | static struct resource realview_pb11mp_flash_resource[] = { | |
203 | [0] = { | |
204 | .start = REALVIEW_PB11MP_FLASH0_BASE, | |
205 | .end = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1, | |
206 | .flags = IORESOURCE_MEM, | |
207 | }, | |
208 | [1] = { | |
209 | .start = REALVIEW_PB11MP_FLASH1_BASE, | |
210 | .end = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1, | |
211 | .flags = IORESOURCE_MEM, | |
212 | }, | |
213 | }; | |
214 | ||
215 | static struct resource realview_pb11mp_smsc911x_resources[] = { | |
216 | [0] = { | |
217 | .start = REALVIEW_PB11MP_ETH_BASE, | |
218 | .end = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1, | |
219 | .flags = IORESOURCE_MEM, | |
220 | }, | |
221 | [1] = { | |
222 | .start = IRQ_TC11MP_ETH, | |
223 | .end = IRQ_TC11MP_ETH, | |
224 | .flags = IORESOURCE_IRQ, | |
225 | }, | |
226 | }; | |
227 | ||
7db21712 CM |
228 | static struct resource realview_pb11mp_isp1761_resources[] = { |
229 | [0] = { | |
230 | .start = REALVIEW_PB11MP_USB_BASE, | |
231 | .end = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1, | |
232 | .flags = IORESOURCE_MEM, | |
233 | }, | |
234 | [1] = { | |
235 | .start = IRQ_TC11MP_USB, | |
236 | .end = IRQ_TC11MP_USB, | |
237 | .flags = IORESOURCE_IRQ, | |
238 | }, | |
239 | }; | |
240 | ||
f417cbad WD |
241 | static struct resource pmu_resources[] = { |
242 | [0] = { | |
243 | .start = IRQ_TC11MP_PMU_CPU0, | |
244 | .end = IRQ_TC11MP_PMU_CPU0, | |
245 | .flags = IORESOURCE_IRQ, | |
246 | }, | |
247 | [1] = { | |
248 | .start = IRQ_TC11MP_PMU_CPU1, | |
249 | .end = IRQ_TC11MP_PMU_CPU1, | |
250 | .flags = IORESOURCE_IRQ, | |
251 | }, | |
252 | [2] = { | |
253 | .start = IRQ_TC11MP_PMU_CPU2, | |
254 | .end = IRQ_TC11MP_PMU_CPU2, | |
255 | .flags = IORESOURCE_IRQ, | |
256 | }, | |
257 | [3] = { | |
258 | .start = IRQ_TC11MP_PMU_CPU3, | |
259 | .end = IRQ_TC11MP_PMU_CPU3, | |
260 | .flags = IORESOURCE_IRQ, | |
261 | }, | |
262 | }; | |
263 | ||
264 | static struct platform_device pmu_device = { | |
265 | .name = "arm-pmu", | |
df3d17e0 | 266 | .id = -1, |
f417cbad WD |
267 | .num_resources = ARRAY_SIZE(pmu_resources), |
268 | .resource = pmu_resources, | |
269 | }; | |
270 | ||
a9b67db5 BB |
271 | static void __init gic_init_irq(void) |
272 | { | |
273 | unsigned int pldctrl; | |
274 | ||
275 | /* new irq mode with no DCC */ | |
276 | writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK)); | |
277 | pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1); | |
278 | pldctrl |= 2 << 22; | |
279 | writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1); | |
280 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); | |
281 | ||
282 | /* ARM11MPCore test chip GIC, primary */ | |
b580b899 | 283 | gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), |
ff2e27ae | 284 | __io_address(REALVIEW_TC11MP_GIC_CPU_BASE)); |
a9b67db5 BB |
285 | |
286 | /* board GIC, secondary */ | |
b580b899 RK |
287 | gic_init(1, IRQ_PB11MP_GIC_START, |
288 | __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), | |
289 | __io_address(REALVIEW_PB11MP_GIC_CPU_BASE)); | |
a9b67db5 BB |
290 | gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1); |
291 | } | |
292 | ||
7c380f27 MZ |
293 | #ifdef CONFIG_HAVE_ARM_TWD |
294 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, | |
295 | REALVIEW_TC11MP_TWD_BASE, | |
296 | IRQ_LOCALTIMER); | |
297 | ||
298 | static void __init realview_pb11mp_twd_init(void) | |
299 | { | |
300 | int err = twd_local_timer_register(&twd_local_timer); | |
301 | if (err) | |
302 | pr_err("twd_local_timer_register failed %d\n", err); | |
303 | } | |
304 | #else | |
305 | #define realview_pb11mp_twd_init() do {} while(0) | |
306 | #endif | |
307 | ||
a9b67db5 BB |
308 | static void __init realview_pb11mp_timer_init(void) |
309 | { | |
310 | timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE); | |
311 | timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20; | |
312 | timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE); | |
313 | timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20; | |
314 | ||
f9a6aa43 | 315 | realview_clk_init(__io_address(REALVIEW_SYS_BASE), false); |
a9b67db5 | 316 | realview_timer_init(IRQ_TC11MP_TIMER0_1); |
7c380f27 | 317 | realview_pb11mp_twd_init(); |
a9b67db5 BB |
318 | } |
319 | ||
7b6d864b | 320 | static void realview_pb11mp_restart(enum reboot_mode mode, const char *cmd) |
426fcd2a | 321 | { |
4c9f8be7 CT |
322 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); |
323 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); | |
426fcd2a PJ |
324 | |
325 | /* | |
326 | * To reset, we hit the on-board reset register | |
327 | * in the system FPGA | |
328 | */ | |
4c9f8be7 CT |
329 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); |
330 | __raw_writel(0x0000, reset_ctrl); | |
331 | __raw_writel(0x0004, reset_ctrl); | |
47cacdd4 | 332 | dsb(); |
426fcd2a PJ |
333 | } |
334 | ||
a9b67db5 BB |
335 | static void __init realview_pb11mp_init(void) |
336 | { | |
337 | int i; | |
338 | ||
ba927951 | 339 | #ifdef CONFIG_CACHE_L2X0 |
a9b67db5 BB |
340 | /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled |
341 | * Bits: .... ...0 0111 1001 0000 .... .... .... */ | |
342 | l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff); | |
ba927951 | 343 | #endif |
a9b67db5 | 344 | |
a9b67db5 BB |
345 | realview_flash_register(realview_pb11mp_flash_resource, |
346 | ARRAY_SIZE(realview_pb11mp_flash_resource)); | |
0a381330 | 347 | realview_eth_register(NULL, realview_pb11mp_smsc911x_resources); |
a9b67db5 | 348 | platform_device_register(&realview_i2c_device); |
6be62ba2 | 349 | platform_device_register(&realview_cf_device); |
7db21712 | 350 | realview_usb_register(realview_pb11mp_isp1761_resources); |
f417cbad | 351 | platform_device_register(&pmu_device); |
a9b67db5 BB |
352 | |
353 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { | |
354 | struct amba_device *d = amba_devs[i]; | |
355 | amba_device_register(d, &iomem_resource); | |
356 | } | |
a9b67db5 BB |
357 | } |
358 | ||
359 | MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") | |
360 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ | |
9ddea57e | 361 | .atag_offset = 0x100, |
3695adc2 | 362 | .smp = smp_ops(realview_smp_ops), |
5b39d154 | 363 | .fixup = realview_fixup, |
a9b67db5 | 364 | .map_io = realview_pb11mp_map_io, |
631e55f9 | 365 | .init_early = realview_init_early, |
a9b67db5 | 366 | .init_irq = gic_init_irq, |
6bb27d73 | 367 | .init_time = realview_pb11mp_timer_init, |
a9b67db5 | 368 | .init_machine = realview_pb11mp_init, |
00e9125e NP |
369 | #ifdef CONFIG_ZONE_DMA |
370 | .dma_zone_size = SZ_256M, | |
371 | #endif | |
47cacdd4 | 372 | .restart = realview_pb11mp_restart, |
a9b67db5 | 373 | MACHINE_END |