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e7c70825 BB |
1 | /* |
2 | * linux/arch/arm/mach-realview/realview_pba8.c | |
3 | * | |
4 | * Copyright (C) 2008 ARM Limited | |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | */ | |
21 | ||
22 | #include <linux/init.h> | |
23 | #include <linux/platform_device.h> | |
edbaa603 | 24 | #include <linux/device.h> |
e7c70825 | 25 | #include <linux/amba/bus.h> |
eb7fffa3 | 26 | #include <linux/amba/pl061.h> |
6ef297f8 | 27 | #include <linux/amba/mmci.h> |
d6ada860 | 28 | #include <linux/amba/pl022.h> |
e7c70825 | 29 | #include <linux/io.h> |
520f7bd7 | 30 | #include <linux/irqchip/arm-gic.h> |
f9a6aa43 | 31 | #include <linux/platform_data/clk-realview.h> |
7b6d864b | 32 | #include <linux/reboot.h> |
e7c70825 BB |
33 | |
34 | #include <asm/irq.h> | |
e7c70825 | 35 | #include <asm/mach-types.h> |
cc9897df | 36 | #include <asm/pgtable.h> |
e7c70825 BB |
37 | |
38 | #include <asm/mach/arch.h> | |
39 | #include <asm/mach/map.h> | |
e7c70825 BB |
40 | #include <asm/mach/time.h> |
41 | ||
6d407a6e AB |
42 | #include "hardware.h" |
43 | #include "board-pba8.h" | |
38d2cfcc | 44 | #include "irqs-pba8.h" |
e7c70825 BB |
45 | |
46 | #include "core.h" | |
e7c70825 BB |
47 | |
48 | static struct map_desc realview_pba8_io_desc[] __initdata = { | |
49 | { | |
50 | .virtual = IO_ADDRESS(REALVIEW_SYS_BASE), | |
51 | .pfn = __phys_to_pfn(REALVIEW_SYS_BASE), | |
52 | .length = SZ_4K, | |
53 | .type = MT_DEVICE, | |
54 | }, { | |
55 | .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE), | |
56 | .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE), | |
57 | .length = SZ_4K, | |
58 | .type = MT_DEVICE, | |
59 | }, { | |
60 | .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE), | |
61 | .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE), | |
62 | .length = SZ_4K, | |
63 | .type = MT_DEVICE, | |
64 | }, { | |
65 | .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), | |
66 | .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), | |
67 | .length = SZ_4K, | |
68 | .type = MT_DEVICE, | |
69 | }, { | |
70 | .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE), | |
71 | .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE), | |
72 | .length = SZ_4K, | |
73 | .type = MT_DEVICE, | |
74 | }, { | |
75 | .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE), | |
76 | .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE), | |
77 | .length = SZ_4K, | |
78 | .type = MT_DEVICE, | |
79 | }, | |
e7c70825 BB |
80 | #ifdef CONFIG_DEBUG_LL |
81 | { | |
82 | .virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE), | |
83 | .pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE), | |
84 | .length = SZ_4K, | |
85 | .type = MT_DEVICE, | |
86 | }, | |
87 | #endif | |
88 | }; | |
89 | ||
90 | static void __init realview_pba8_map_io(void) | |
91 | { | |
92 | iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc)); | |
93 | } | |
94 | ||
eb7fffa3 RK |
95 | static struct pl061_platform_data gpio0_plat_data = { |
96 | .gpio_base = 0, | |
eb7fffa3 RK |
97 | }; |
98 | ||
99 | static struct pl061_platform_data gpio1_plat_data = { | |
100 | .gpio_base = 8, | |
eb7fffa3 RK |
101 | }; |
102 | ||
103 | static struct pl061_platform_data gpio2_plat_data = { | |
104 | .gpio_base = 16, | |
eb7fffa3 RK |
105 | }; |
106 | ||
d6ada860 LW |
107 | static struct pl022_ssp_controller ssp0_plat_data = { |
108 | .bus_id = 0, | |
109 | .enable_dma = 0, | |
110 | .num_chipselect = 1, | |
111 | }; | |
112 | ||
e7c70825 BB |
113 | /* |
114 | * RealView PBA8Core AMBA devices | |
115 | */ | |
116 | ||
0dada61a RK |
117 | #define GPIO2_IRQ { IRQ_PBA8_GPIO2 } |
118 | #define GPIO3_IRQ { IRQ_PBA8_GPIO3 } | |
119 | #define AACI_IRQ { IRQ_PBA8_AACI } | |
e7c70825 | 120 | #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } |
0dada61a RK |
121 | #define KMI0_IRQ { IRQ_PBA8_KMI0 } |
122 | #define KMI1_IRQ { IRQ_PBA8_KMI1 } | |
123 | #define PBA8_SMC_IRQ { } | |
124 | #define MPMC_IRQ { } | |
125 | #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD } | |
126 | #define DMAC_IRQ { IRQ_PBA8_DMAC } | |
127 | #define SCTL_IRQ { } | |
128 | #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG } | |
129 | #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 } | |
130 | #define GPIO1_IRQ { IRQ_PBA8_GPIO1 } | |
131 | #define PBA8_RTC_IRQ { IRQ_PBA8_RTC } | |
132 | #define SCI_IRQ { IRQ_PBA8_SCI } | |
133 | #define PBA8_UART0_IRQ { IRQ_PBA8_UART0 } | |
134 | #define PBA8_UART1_IRQ { IRQ_PBA8_UART1 } | |
135 | #define PBA8_UART2_IRQ { IRQ_PBA8_UART2 } | |
136 | #define PBA8_UART3_IRQ { IRQ_PBA8_UART3 } | |
137 | #define PBA8_SSP_IRQ { IRQ_PBA8_SSP } | |
e7c70825 BB |
138 | |
139 | /* FPGA Primecells */ | |
9199340b RK |
140 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
141 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | |
142 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | |
143 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | |
144 | APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); | |
e7c70825 BB |
145 | |
146 | /* DevChip Primecells */ | |
9199340b RK |
147 | AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); |
148 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); | |
149 | APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); | |
150 | APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); | |
151 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | |
152 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | |
153 | APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); | |
154 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); | |
155 | APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); | |
156 | APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); | |
157 | APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); | |
158 | APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); | |
e7c70825 BB |
159 | |
160 | /* Primecells on the NEC ISSP chip */ | |
9199340b RK |
161 | AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); |
162 | AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); | |
e7c70825 BB |
163 | |
164 | static struct amba_device *amba_devs[] __initdata = { | |
165 | &dmac_device, | |
166 | &uart0_device, | |
167 | &uart1_device, | |
168 | &uart2_device, | |
169 | &uart3_device, | |
170 | &smc_device, | |
171 | &clcd_device, | |
172 | &sctl_device, | |
173 | &wdog_device, | |
174 | &gpio0_device, | |
175 | &gpio1_device, | |
176 | &gpio2_device, | |
177 | &rtc_device, | |
178 | &sci0_device, | |
179 | &ssp0_device, | |
180 | &aaci_device, | |
181 | &mmc0_device, | |
182 | &kmi0_device, | |
183 | &kmi1_device, | |
184 | }; | |
185 | ||
186 | /* | |
187 | * RealView PB-A8 platform devices | |
188 | */ | |
189 | static struct resource realview_pba8_flash_resource[] = { | |
190 | [0] = { | |
191 | .start = REALVIEW_PBA8_FLASH0_BASE, | |
192 | .end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1, | |
193 | .flags = IORESOURCE_MEM, | |
194 | }, | |
195 | [1] = { | |
196 | .start = REALVIEW_PBA8_FLASH1_BASE, | |
197 | .end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1, | |
198 | .flags = IORESOURCE_MEM, | |
199 | }, | |
200 | }; | |
201 | ||
202 | static struct resource realview_pba8_smsc911x_resources[] = { | |
203 | [0] = { | |
204 | .start = REALVIEW_PBA8_ETH_BASE, | |
205 | .end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1, | |
206 | .flags = IORESOURCE_MEM, | |
207 | }, | |
208 | [1] = { | |
209 | .start = IRQ_PBA8_ETH, | |
210 | .end = IRQ_PBA8_ETH, | |
211 | .flags = IORESOURCE_IRQ, | |
212 | }, | |
213 | }; | |
214 | ||
7db21712 CM |
215 | static struct resource realview_pba8_isp1761_resources[] = { |
216 | [0] = { | |
217 | .start = REALVIEW_PBA8_USB_BASE, | |
218 | .end = REALVIEW_PBA8_USB_BASE + SZ_128K - 1, | |
219 | .flags = IORESOURCE_MEM, | |
220 | }, | |
221 | [1] = { | |
222 | .start = IRQ_PBA8_USB, | |
223 | .end = IRQ_PBA8_USB, | |
224 | .flags = IORESOURCE_IRQ, | |
225 | }, | |
226 | }; | |
227 | ||
f417cbad WD |
228 | static struct resource pmu_resource = { |
229 | .start = IRQ_PBA8_PMU, | |
230 | .end = IRQ_PBA8_PMU, | |
231 | .flags = IORESOURCE_IRQ, | |
232 | }; | |
233 | ||
234 | static struct platform_device pmu_device = { | |
cbed8388 | 235 | .name = "armv7-pmu", |
df3d17e0 | 236 | .id = -1, |
f417cbad WD |
237 | .num_resources = 1, |
238 | .resource = &pmu_resource, | |
239 | }; | |
240 | ||
e7c70825 BB |
241 | static void __init gic_init_irq(void) |
242 | { | |
243 | /* ARM PB-A8 on-board GIC */ | |
b580b899 RK |
244 | gic_init(0, IRQ_PBA8_GIC_START, |
245 | __io_address(REALVIEW_PBA8_GIC_DIST_BASE), | |
246 | __io_address(REALVIEW_PBA8_GIC_CPU_BASE)); | |
e7c70825 BB |
247 | } |
248 | ||
249 | static void __init realview_pba8_timer_init(void) | |
250 | { | |
251 | timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE); | |
252 | timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20; | |
253 | timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE); | |
254 | timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20; | |
255 | ||
f9a6aa43 | 256 | realview_clk_init(__io_address(REALVIEW_SYS_BASE), false); |
e7c70825 BB |
257 | realview_timer_init(IRQ_PBA8_TIMER0_1); |
258 | } | |
259 | ||
7b6d864b | 260 | static void realview_pba8_restart(enum reboot_mode mode, const char *cmd) |
4c9f8be7 CT |
261 | { |
262 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); | |
263 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); | |
264 | ||
265 | /* | |
266 | * To reset, we hit the on-board reset register | |
267 | * in the system FPGA | |
268 | */ | |
269 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); | |
270 | __raw_writel(0x0000, reset_ctrl); | |
271 | __raw_writel(0x0004, reset_ctrl); | |
47cacdd4 | 272 | dsb(); |
4c9f8be7 CT |
273 | } |
274 | ||
e7c70825 BB |
275 | static void __init realview_pba8_init(void) |
276 | { | |
277 | int i; | |
278 | ||
279 | realview_flash_register(realview_pba8_flash_resource, | |
280 | ARRAY_SIZE(realview_pba8_flash_resource)); | |
0a381330 | 281 | realview_eth_register(NULL, realview_pba8_smsc911x_resources); |
e7c70825 | 282 | platform_device_register(&realview_i2c_device); |
6be62ba2 | 283 | platform_device_register(&realview_cf_device); |
e4ecf2bd | 284 | platform_device_register(&realview_leds_device); |
7db21712 | 285 | realview_usb_register(realview_pba8_isp1761_resources); |
f417cbad | 286 | platform_device_register(&pmu_device); |
e7c70825 BB |
287 | |
288 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { | |
289 | struct amba_device *d = amba_devs[i]; | |
290 | amba_device_register(d, &iomem_resource); | |
291 | } | |
e7c70825 BB |
292 | } |
293 | ||
294 | MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") | |
295 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ | |
9ddea57e | 296 | .atag_offset = 0x100, |
5b39d154 | 297 | .fixup = realview_fixup, |
e7c70825 | 298 | .map_io = realview_pba8_map_io, |
631e55f9 | 299 | .init_early = realview_init_early, |
e7c70825 | 300 | .init_irq = gic_init_irq, |
6bb27d73 | 301 | .init_time = realview_pba8_timer_init, |
e7c70825 | 302 | .init_machine = realview_pba8_init, |
00e9125e NP |
303 | #ifdef CONFIG_ZONE_DMA |
304 | .dma_zone_size = SZ_256M, | |
305 | #endif | |
47cacdd4 | 306 | .restart = realview_pba8_restart, |
e7c70825 | 307 | MACHINE_END |