Commit | Line | Data |
---|---|---|
d63dc051 | 1 | config ARCH_ROCKCHIP |
e3246542 MY |
2 | bool "Rockchip RK2928 and RK3xxx SOCs" |
3 | depends on ARCH_MULTI_V7 | |
d63dc051 HS |
4 | select PINCTRL |
5 | select PINCTRL_ROCKCHIP | |
1fe69496 | 6 | select ARCH_HAS_RESET_CONTROLLER |
34f137b1 | 7 | select ARM_AMBA |
d63dc051 HS |
8 | select ARM_GIC |
9 | select CACHE_L2X0 | |
5c34a4e8 | 10 | select GPIOLIB |
7a1917ab | 11 | select HAVE_ARM_ARCH_TIMER |
f6f70cf7 | 12 | select HAVE_ARM_SCU if SMP |
f350f823 | 13 | select HAVE_ARM_TWD if SMP |
d63dc051 | 14 | select DW_APB_TIMER_OF |
d1bef995 | 15 | select REGULATOR if PM |
468b8c4c | 16 | select ROCKCHIP_TIMER |
f95a2b3d HS |
17 | select ARM_GLOBAL_TIMER |
18 | select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK | |
d63dc051 HS |
19 | help |
20 | Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs | |
21 | containing the RK2928, RK30xx and RK31xx series. |