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9c1ec8e1 CZ |
1 | /* |
2 | * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd | |
3 | * Author: Tony Xie <tony.xie@rock-chips.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | */ | |
15 | ||
16 | #include <linux/linkage.h> | |
17 | #include <asm/assembler.h> | |
18 | #include <asm/memory.h> | |
19 | ||
20 | .data | |
21 | /* | |
22 | * this code will be copied from | |
23 | * ddr to sram for system resumeing. | |
24 | * so it is ".data section". | |
25 | */ | |
26 | .align | |
27 | ||
28 | ENTRY(rockchip_slp_cpu_resume) | |
29 | setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set svc, irqs off | |
30 | mrc p15, 0, r1, c0, c0, 5 | |
31 | and r1, r1, #0xf | |
32 | cmp r1, #0 | |
33 | /* olny cpu0 can continue to run, the others is halt here */ | |
34 | beq cpu0run | |
35 | secondary_loop: | |
36 | wfe | |
37 | b secondary_loop | |
38 | cpu0run: | |
39 | ldr r3, rkpm_bootdata_l2ctlr_f | |
40 | cmp r3, #0 | |
41 | beq sp_set | |
42 | ldr r3, rkpm_bootdata_l2ctlr | |
43 | mcr p15, 1, r3, c9, c0, 2 | |
44 | sp_set: | |
45 | ldr sp, rkpm_bootdata_cpusp | |
46 | ldr r1, rkpm_bootdata_cpu_code | |
47 | bx r1 | |
48 | ENDPROC(rockchip_slp_cpu_resume) | |
49 | ||
50 | /* Parameters filled in by the kernel */ | |
51 | ||
52 | /* Flag for whether to restore L2CTLR on resume */ | |
53 | .global rkpm_bootdata_l2ctlr_f | |
54 | rkpm_bootdata_l2ctlr_f: | |
55 | .long 0 | |
56 | ||
57 | /* Saved L2CTLR to restore on resume */ | |
58 | .global rkpm_bootdata_l2ctlr | |
59 | rkpm_bootdata_l2ctlr: | |
60 | .long 0 | |
61 | ||
62 | /* CPU resume SP addr */ | |
63 | .globl rkpm_bootdata_cpusp | |
64 | rkpm_bootdata_cpusp: | |
65 | .long 0 | |
66 | ||
67 | /* CPU resume function (physical address) */ | |
68 | .globl rkpm_bootdata_cpu_code | |
69 | rkpm_bootdata_cpu_code: | |
70 | .long 0 | |
71 | ||
72 | ENTRY(rk3288_bootram_sz) | |
73 | .word . - rockchip_slp_cpu_resume |