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1 | /* linux/arch/arm/mach-s3c2410/bast-irq.c |
2 | * | |
bafa49cc | 3 | * Copyright (c) 2003,2005 Simtec Electronics |
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4 | * Ben Dooks <ben@simtec.co.uk> |
5 | * | |
6 | * http://www.simtec.co.uk/products/EB2410ITX/ | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
bafa49cc | 21 | */ |
1da177e4 LT |
22 | |
23 | ||
24 | #include <linux/init.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/ioport.h> | |
27 | #include <linux/ptrace.h> | |
28 | #include <linux/sysdev.h> | |
29 | ||
bafa49cc BD |
30 | #include <asm/mach-types.h> |
31 | ||
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32 | #include <asm/hardware.h> |
33 | #include <asm/irq.h> | |
34 | #include <asm/io.h> | |
35 | ||
36 | #include <asm/mach/irq.h> | |
bafa49cc BD |
37 | |
38 | #include <asm/arch/regs-irq.h> | |
39 | #include <asm/arch/bast-map.h> | |
40 | #include <asm/arch/bast-irq.h> | |
41 | ||
42 | #include "irq.h" | |
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43 | |
44 | #if 0 | |
45 | #include <asm/debug-ll.h> | |
46 | #endif | |
47 | ||
48 | #define irqdbf(x...) | |
49 | #define irqdbf2(x...) | |
50 | ||
51 | ||
52 | /* handle PC104 ISA interrupts from the system CPLD */ | |
53 | ||
54 | /* table of ISA irq nos to the relevant mask... zero means | |
55 | * the irq is not implemented | |
56 | */ | |
57 | static unsigned char bast_pc104_irqmasks[] = { | |
58 | 0, /* 0 */ | |
59 | 0, /* 1 */ | |
60 | 0, /* 2 */ | |
61 | 1, /* 3 */ | |
62 | 0, /* 4 */ | |
63 | 2, /* 5 */ | |
64 | 0, /* 6 */ | |
65 | 4, /* 7 */ | |
66 | 0, /* 8 */ | |
67 | 0, /* 9 */ | |
68 | 8, /* 10 */ | |
69 | 0, /* 11 */ | |
70 | 0, /* 12 */ | |
71 | 0, /* 13 */ | |
72 | 0, /* 14 */ | |
73 | 0, /* 15 */ | |
74 | }; | |
75 | ||
76 | static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 }; | |
77 | ||
78 | static void | |
79 | bast_pc104_mask(unsigned int irqno) | |
80 | { | |
81 | unsigned long temp; | |
82 | ||
83 | temp = __raw_readb(BAST_VA_PC104_IRQMASK); | |
84 | temp &= ~bast_pc104_irqmasks[irqno]; | |
85 | __raw_writeb(temp, BAST_VA_PC104_IRQMASK); | |
1da177e4 LT |
86 | } |
87 | ||
88 | static void | |
bafa49cc | 89 | bast_pc104_maskack(unsigned int irqno) |
1da177e4 | 90 | { |
10dd5ce2 | 91 | struct irq_desc *desc = irq_desc + IRQ_ISA; |
bafa49cc BD |
92 | |
93 | bast_pc104_mask(irqno); | |
94 | desc->chip->ack(IRQ_ISA); | |
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95 | } |
96 | ||
97 | static void | |
98 | bast_pc104_unmask(unsigned int irqno) | |
99 | { | |
100 | unsigned long temp; | |
101 | ||
102 | temp = __raw_readb(BAST_VA_PC104_IRQMASK); | |
103 | temp |= bast_pc104_irqmasks[irqno]; | |
104 | __raw_writeb(temp, BAST_VA_PC104_IRQMASK); | |
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105 | } |
106 | ||
10dd5ce2 | 107 | static struct irq_chip bast_pc104_chip = { |
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108 | .mask = bast_pc104_mask, |
109 | .unmask = bast_pc104_unmask, | |
bafa49cc | 110 | .ack = bast_pc104_maskack |
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111 | }; |
112 | ||
113 | static void | |
114 | bast_irq_pc104_demux(unsigned int irq, | |
10dd5ce2 | 115 | struct irq_desc *desc) |
1da177e4 LT |
116 | { |
117 | unsigned int stat; | |
118 | unsigned int irqno; | |
119 | int i; | |
120 | ||
121 | stat = __raw_readb(BAST_VA_PC104_IRQREQ) & 0xf; | |
122 | ||
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123 | if (unlikely(stat == 0)) { |
124 | /* ack if we get an irq with nothing (ie, startup) */ | |
125 | ||
126 | desc = irq_desc + IRQ_ISA; | |
127 | desc->chip->ack(IRQ_ISA); | |
128 | } else { | |
129 | /* handle the IRQ */ | |
130 | ||
131 | for (i = 0; stat != 0; i++, stat >>= 1) { | |
132 | if (stat & 1) { | |
133 | irqno = bast_pc104_irqs[i]; | |
544b46de | 134 | desc = irq_desc + irqno; |
0cd61b68 | 135 | desc_handle_irq(irqno, desc); |
bafa49cc | 136 | } |
1da177e4 | 137 | } |
bafa49cc BD |
138 | } |
139 | } | |
1da177e4 | 140 | |
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141 | static __init int bast_irq_init(void) |
142 | { | |
143 | unsigned int i; | |
144 | ||
145 | if (machine_is_bast()) { | |
146 | printk(KERN_INFO "BAST PC104 IRQ routing, (c) 2005 Simtec Electronics\n"); | |
147 | ||
148 | /* zap all the IRQs */ | |
149 | ||
150 | __raw_writeb(0x0, BAST_VA_PC104_IRQMASK); | |
151 | ||
152 | set_irq_chained_handler(IRQ_ISA, bast_irq_pc104_demux); | |
153 | ||
544b46de | 154 | /* register our IRQs */ |
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155 | |
156 | for (i = 0; i < 4; i++) { | |
157 | unsigned int irqno = bast_pc104_irqs[i]; | |
158 | ||
159 | set_irq_chip(irqno, &bast_pc104_chip); | |
10dd5ce2 | 160 | set_irq_handler(irqno, handle_level_irq); |
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161 | set_irq_flags(irqno, IRQF_VALID); |
162 | } | |
1da177e4 | 163 | } |
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164 | |
165 | return 0; | |
1da177e4 | 166 | } |
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167 | |
168 | arch_initcall(bast_irq_init); |