arm: Fold irq_set_chip/irq_set_handler
[deliverable/linux.git] / arch / arm / mach-s3c2410 / bast-irq.c
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1da177e4
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1/* linux/arch/arm/mach-s3c2410/bast-irq.c
2 *
ccae941e 3 * Copyright 2003-2005 Simtec Electronics
1da177e4
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4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.simtec.co.uk/products/EB2410ITX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
bafa49cc 21*/
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22
23
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/ioport.h>
1da177e4 27#include <linux/sysdev.h>
fced80c7 28#include <linux/io.h>
1da177e4 29
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30#include <asm/mach-types.h>
31
a09e64fb 32#include <mach/hardware.h>
1da177e4 33#include <asm/irq.h>
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34
35#include <asm/mach/irq.h>
bafa49cc 36
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37#include <mach/regs-irq.h>
38#include <mach/bast-map.h>
39#include <mach/bast-irq.h>
bafa49cc 40
a2b7ba9c 41#include <plat/irq.h>
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42
43#if 0
44#include <asm/debug-ll.h>
45#endif
46
47#define irqdbf(x...)
48#define irqdbf2(x...)
49
50
51/* handle PC104 ISA interrupts from the system CPLD */
52
53/* table of ISA irq nos to the relevant mask... zero means
54 * the irq is not implemented
55*/
56static unsigned char bast_pc104_irqmasks[] = {
57 0, /* 0 */
58 0, /* 1 */
59 0, /* 2 */
60 1, /* 3 */
61 0, /* 4 */
62 2, /* 5 */
63 0, /* 6 */
64 4, /* 7 */
65 0, /* 8 */
66 0, /* 9 */
67 8, /* 10 */
68 0, /* 11 */
69 0, /* 12 */
70 0, /* 13 */
71 0, /* 14 */
72 0, /* 15 */
73};
74
75static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 };
76
77static void
57436c2d 78bast_pc104_mask(struct irq_data *data)
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79{
80 unsigned long temp;
81
82 temp = __raw_readb(BAST_VA_PC104_IRQMASK);
57436c2d 83 temp &= ~bast_pc104_irqmasks[data->irq];
1da177e4 84 __raw_writeb(temp, BAST_VA_PC104_IRQMASK);
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85}
86
87static void
57436c2d 88bast_pc104_maskack(struct irq_data *data)
1da177e4 89{
10dd5ce2 90 struct irq_desc *desc = irq_desc + IRQ_ISA;
bafa49cc 91
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92 bast_pc104_mask(data);
93 desc->irq_data.chip->irq_ack(&desc->irq_data);
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94}
95
96static void
57436c2d 97bast_pc104_unmask(struct irq_data *data)
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98{
99 unsigned long temp;
100
101 temp = __raw_readb(BAST_VA_PC104_IRQMASK);
57436c2d 102 temp |= bast_pc104_irqmasks[data->irq];
1da177e4 103 __raw_writeb(temp, BAST_VA_PC104_IRQMASK);
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104}
105
10dd5ce2 106static struct irq_chip bast_pc104_chip = {
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107 .irq_mask = bast_pc104_mask,
108 .irq_unmask = bast_pc104_unmask,
109 .irq_ack = bast_pc104_maskack
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110};
111
112static void
113bast_irq_pc104_demux(unsigned int irq,
10dd5ce2 114 struct irq_desc *desc)
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115{
116 unsigned int stat;
117 unsigned int irqno;
118 int i;
119
120 stat = __raw_readb(BAST_VA_PC104_IRQREQ) & 0xf;
121
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122 if (unlikely(stat == 0)) {
123 /* ack if we get an irq with nothing (ie, startup) */
124
125 desc = irq_desc + IRQ_ISA;
57436c2d 126 desc->irq_data.chip->irq_ack(&desc->irq_data);
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127 } else {
128 /* handle the IRQ */
129
130 for (i = 0; stat != 0; i++, stat >>= 1) {
131 if (stat & 1) {
132 irqno = bast_pc104_irqs[i];
d8aa0251 133 generic_handle_irq(irqno);
bafa49cc 134 }
1da177e4 135 }
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136 }
137}
1da177e4 138
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139static __init int bast_irq_init(void)
140{
141 unsigned int i;
142
143 if (machine_is_bast()) {
50f430e3 144 printk(KERN_INFO "BAST PC104 IRQ routing, Copyright 2005 Simtec Electronics\n");
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145
146 /* zap all the IRQs */
147
148 __raw_writeb(0x0, BAST_VA_PC104_IRQMASK);
149
6845664a 150 irq_set_chained_handler(IRQ_ISA, bast_irq_pc104_demux);
bafa49cc 151
544b46de 152 /* register our IRQs */
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153
154 for (i = 0; i < 4; i++) {
155 unsigned int irqno = bast_pc104_irqs[i];
156
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157 irq_set_chip_and_handler(irqno, &bast_pc104_chip,
158 handle_level_irq);
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159 set_irq_flags(irqno, IRQF_VALID);
160 }
1da177e4 161 }
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162
163 return 0;
1da177e4 164}
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165
166arch_initcall(bast_irq_init);
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