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1 | /* linux/arch/arm/mach-s3c2410/mach-anubis.c |
2 | * | |
3 | * Copyright (c) 2003-2005 Simtec Electronics | |
4 | * http://armlinux.simtec.co.uk/ | |
5 | * Ben Dooks <ben@simtec.co.uk> | |
6 | * | |
7 | * | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * Modifications: | |
14 | * 02-May-2005 BJD Copied from mach-bast.c | |
5fe10ab1 | 15 | * 20-Sep-2005 BJD Added static to non-exported items |
7efb833d BD |
16 | */ |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/types.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/list.h> | |
22 | #include <linux/timer.h> | |
23 | #include <linux/init.h> | |
d052d1be | 24 | #include <linux/platform_device.h> |
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25 | |
26 | #include <asm/mach/arch.h> | |
27 | #include <asm/mach/map.h> | |
28 | #include <asm/mach/irq.h> | |
29 | ||
30 | #include <asm/arch/anubis-map.h> | |
31 | #include <asm/arch/anubis-irq.h> | |
32 | #include <asm/arch/anubis-cpld.h> | |
33 | ||
34 | #include <asm/hardware.h> | |
35 | #include <asm/io.h> | |
36 | #include <asm/irq.h> | |
37 | #include <asm/mach-types.h> | |
38 | ||
39 | #include <asm/arch/regs-serial.h> | |
40 | #include <asm/arch/regs-gpio.h> | |
41 | #include <asm/arch/regs-mem.h> | |
42 | #include <asm/arch/regs-lcd.h> | |
43 | #include <asm/arch/nand.h> | |
44 | ||
45 | #include <linux/mtd/mtd.h> | |
46 | #include <linux/mtd/nand.h> | |
47 | #include <linux/mtd/nand_ecc.h> | |
48 | #include <linux/mtd/partitions.h> | |
49 | ||
50 | #include "clock.h" | |
51 | #include "devs.h" | |
52 | #include "cpu.h" | |
53 | ||
54 | #define COPYRIGHT ", (c) 2005 Simtec Electronics" | |
55 | ||
56 | static struct map_desc anubis_iodesc[] __initdata = { | |
57 | /* ISA IO areas */ | |
58 | ||
8dd52311 BD |
59 | { |
60 | .virtual = (u32)S3C24XX_VA_ISA_BYTE, | |
61 | .pfn = __phys_to_pfn(0x0), | |
62 | .length = SZ_4M, | |
63 | .type = MT_DEVICE | |
64 | }, { | |
65 | .virtual = (u32)S3C24XX_VA_ISA_WORD, | |
66 | .pfn = __phys_to_pfn(0x0), | |
67 | .length = SZ_4M, MT_DEVICE | |
68 | }, | |
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69 | |
70 | /* we could possibly compress the next set down into a set of smaller tables | |
71 | * pagetables, but that would mean using an L2 section, and it still means | |
72 | * we cannot actually feed the same register to an LDR due to 16K spacing | |
73 | */ | |
74 | ||
75 | /* CPLD control registers */ | |
76 | ||
8dd52311 BD |
77 | { |
78 | .virtual = (u32)ANUBIS_VA_CTRL1, | |
79 | .pfn = __phys_to_pfn(ANUBIS_PA_CTRL1), | |
80 | .length = SZ_4K, | |
81 | .type = MT_DEVICE | |
82 | }, { | |
83 | .virtual = (u32)ANUBIS_VA_CTRL2, | |
84 | .pfn = __phys_to_pfn(ANUBIS_PA_CTRL2), | |
85 | .length = SZ_4K, | |
86 | .type =MT_DEVICE | |
87 | }, | |
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88 | |
89 | /* IDE drives */ | |
90 | ||
8dd52311 BD |
91 | { |
92 | .virtual = (u32)ANUBIS_IDEPRI, | |
93 | .pfn = __phys_to_pfn(S3C2410_CS3), | |
94 | .length = SZ_1M, | |
95 | .type = MT_DEVICE | |
96 | }, { | |
97 | .virtual = (u32)ANUBIS_IDEPRIAUX, | |
98 | .pfn = __phys_to_pfn(S3C2410_CS3+(1<<26)), | |
99 | .length = SZ_1M, | |
100 | .type = MT_DEVICE | |
101 | }, { | |
102 | .virtual = (u32)ANUBIS_IDESEC, | |
103 | .pfn = __phys_to_pfn(S3C2410_CS4), | |
104 | .length = SZ_1M, | |
105 | .type = MT_DEVICE | |
106 | }, { | |
107 | .virtual = (u32)ANUBIS_IDESECAUX, | |
108 | .pfn = __phys_to_pfn(S3C2410_CS4+(1<<26)), | |
109 | .length = SZ_1M, | |
110 | .type = MT_DEVICE | |
111 | }, | |
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112 | }; |
113 | ||
114 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | |
115 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | |
116 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | |
117 | ||
118 | static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = { | |
119 | [0] = { | |
120 | .name = "uclk", | |
121 | .divisor = 1, | |
122 | .min_baud = 0, | |
123 | .max_baud = 0, | |
124 | }, | |
125 | [1] = { | |
126 | .name = "pclk", | |
127 | .divisor = 1, | |
128 | .min_baud = 0, | |
129 | .max_baud = 0. | |
130 | } | |
131 | }; | |
132 | ||
133 | ||
66a9b49a | 134 | static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { |
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135 | [0] = { |
136 | .hwport = 0, | |
137 | .flags = 0, | |
138 | .ucon = UCON, | |
139 | .ulcon = ULCON, | |
140 | .ufcon = UFCON, | |
141 | .clocks = anubis_serial_clocks, | |
142 | .clocks_size = ARRAY_SIZE(anubis_serial_clocks) | |
143 | }, | |
144 | [1] = { | |
145 | .hwport = 2, | |
146 | .flags = 0, | |
147 | .ucon = UCON, | |
148 | .ulcon = ULCON, | |
149 | .ufcon = UFCON, | |
150 | .clocks = anubis_serial_clocks, | |
151 | .clocks_size = ARRAY_SIZE(anubis_serial_clocks) | |
152 | }, | |
153 | }; | |
154 | ||
155 | /* NAND Flash on Anubis board */ | |
156 | ||
157 | static int external_map[] = { 2 }; | |
158 | static int chip0_map[] = { 0 }; | |
159 | static int chip1_map[] = { 1 }; | |
160 | ||
9f693d7b | 161 | static struct mtd_partition anubis_default_nand_part[] = { |
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162 | [0] = { |
163 | .name = "Boot Agent", | |
164 | .size = SZ_16K, | |
165 | .offset = 0 | |
166 | }, | |
167 | [1] = { | |
168 | .name = "/boot", | |
169 | .size = SZ_4M - SZ_16K, | |
170 | .offset = SZ_16K, | |
171 | }, | |
172 | [2] = { | |
173 | .name = "user1", | |
174 | .offset = SZ_4M, | |
175 | .size = SZ_32M - SZ_4M, | |
176 | }, | |
177 | [3] = { | |
178 | .name = "user2", | |
179 | .offset = SZ_32M, | |
180 | .size = MTDPART_SIZ_FULL, | |
181 | } | |
182 | }; | |
183 | ||
184 | /* the Anubis has 3 selectable slots for nand-flash, the two | |
185 | * on-board chip areas, as well as the external slot. | |
186 | * | |
187 | * Note, there is no current hot-plug support for the External | |
188 | * socket. | |
189 | */ | |
190 | ||
191 | static struct s3c2410_nand_set anubis_nand_sets[] = { | |
192 | [1] = { | |
193 | .name = "External", | |
194 | .nr_chips = 1, | |
195 | .nr_map = external_map, | |
196 | .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), | |
197 | .partitions = anubis_default_nand_part | |
198 | }, | |
199 | [0] = { | |
200 | .name = "chip0", | |
201 | .nr_chips = 1, | |
202 | .nr_map = chip0_map, | |
203 | .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), | |
204 | .partitions = anubis_default_nand_part | |
205 | }, | |
206 | [2] = { | |
207 | .name = "chip1", | |
208 | .nr_chips = 1, | |
209 | .nr_map = chip1_map, | |
210 | .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), | |
211 | .partitions = anubis_default_nand_part | |
212 | }, | |
213 | }; | |
214 | ||
215 | static void anubis_nand_select(struct s3c2410_nand_set *set, int slot) | |
216 | { | |
217 | unsigned int tmp; | |
218 | ||
219 | slot = set->nr_map[slot] & 3; | |
220 | ||
221 | pr_debug("anubis_nand: selecting slot %d (set %p,%p)\n", | |
222 | slot, set, set->nr_map); | |
223 | ||
224 | tmp = __raw_readb(ANUBIS_VA_CTRL1); | |
225 | tmp &= ~ANUBIS_CTRL1_NANDSEL; | |
226 | tmp |= slot; | |
227 | ||
228 | pr_debug("anubis_nand: ctrl1 now %02x\n", tmp); | |
229 | ||
230 | __raw_writeb(tmp, ANUBIS_VA_CTRL1); | |
231 | } | |
232 | ||
233 | static struct s3c2410_platform_nand anubis_nand_info = { | |
234 | .tacls = 25, | |
661e6acf BD |
235 | .twrph0 = 55, |
236 | .twrph1 = 40, | |
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237 | .nr_sets = ARRAY_SIZE(anubis_nand_sets), |
238 | .sets = anubis_nand_sets, | |
239 | .select_chip = anubis_nand_select, | |
240 | }; | |
241 | ||
bf1c56a3 BD |
242 | /* IDE channels */ |
243 | ||
244 | static struct resource anubis_ide0_resource[] = { | |
245 | { | |
246 | .start = S3C2410_CS3, | |
247 | .end = S3C2410_CS3 + (8*32) - 1, | |
248 | .flags = IORESOURCE_MEM, | |
249 | }, { | |
250 | .start = S3C2410_CS3 + (1<<26), | |
251 | .end = S3C2410_CS3 + (1<<26) + (8*32) - 1, | |
252 | .flags = IORESOURCE_MEM, | |
253 | }, { | |
254 | .start = IRQ_IDE0, | |
255 | .end = IRQ_IDE0, | |
256 | .flags = IORESOURCE_IRQ, | |
257 | }, | |
258 | }; | |
259 | ||
260 | static struct platform_device anubis_device_ide0 = { | |
261 | .name = "simtec-ide", | |
262 | .id = 0, | |
263 | .num_resources = ARRAY_SIZE(anubis_ide0_resource), | |
264 | .resource = anubis_ide0_resource, | |
265 | }; | |
266 | ||
267 | static struct resource anubis_ide1_resource[] = { | |
268 | { | |
269 | .start = S3C2410_CS4, | |
270 | .end = S3C2410_CS4 + (8*32) - 1, | |
271 | .flags = IORESOURCE_MEM, | |
272 | }, { | |
273 | .start = S3C2410_CS4 + (1<<26), | |
274 | .end = S3C2410_CS4 + (1<<26) + (8*32) - 1, | |
275 | .flags = IORESOURCE_MEM, | |
276 | }, { | |
277 | .start = IRQ_IDE0, | |
278 | .end = IRQ_IDE0, | |
279 | .flags = IORESOURCE_IRQ, | |
280 | }, | |
281 | }; | |
282 | ||
283 | ||
284 | static struct platform_device anubis_device_ide1 = { | |
285 | .name = "simtec-ide", | |
286 | .id = 1, | |
287 | .num_resources = ARRAY_SIZE(anubis_ide1_resource), | |
288 | .resource = anubis_ide1_resource, | |
289 | }; | |
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290 | |
291 | /* Standard Anubis devices */ | |
292 | ||
293 | static struct platform_device *anubis_devices[] __initdata = { | |
294 | &s3c_device_usb, | |
295 | &s3c_device_wdt, | |
296 | &s3c_device_adc, | |
297 | &s3c_device_i2c, | |
298 | &s3c_device_rtc, | |
299 | &s3c_device_nand, | |
bf1c56a3 BD |
300 | &anubis_device_ide0, |
301 | &anubis_device_ide1, | |
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302 | }; |
303 | ||
304 | static struct clk *anubis_clocks[] = { | |
305 | &s3c24xx_dclk0, | |
306 | &s3c24xx_dclk1, | |
307 | &s3c24xx_clkout0, | |
308 | &s3c24xx_clkout1, | |
309 | &s3c24xx_uclk, | |
310 | }; | |
311 | ||
312 | static struct s3c24xx_board anubis_board __initdata = { | |
313 | .devices = anubis_devices, | |
314 | .devices_count = ARRAY_SIZE(anubis_devices), | |
315 | .clocks = anubis_clocks, | |
316 | .clocks_count = ARRAY_SIZE(anubis_clocks) | |
317 | }; | |
318 | ||
5fe10ab1 | 319 | static void __init anubis_map_io(void) |
7efb833d BD |
320 | { |
321 | /* initialise the clocks */ | |
322 | ||
323 | s3c24xx_dclk0.parent = NULL; | |
324 | s3c24xx_dclk0.rate = 12*1000*1000; | |
325 | ||
326 | s3c24xx_dclk1.parent = NULL; | |
327 | s3c24xx_dclk1.rate = 24*1000*1000; | |
328 | ||
329 | s3c24xx_clkout0.parent = &s3c24xx_dclk0; | |
330 | s3c24xx_clkout1.parent = &s3c24xx_dclk1; | |
331 | ||
332 | s3c24xx_uclk.parent = &s3c24xx_clkout1; | |
333 | ||
334 | s3c_device_nand.dev.platform_data = &anubis_nand_info; | |
335 | ||
336 | s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc)); | |
337 | s3c24xx_init_clocks(0); | |
338 | s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs)); | |
339 | s3c24xx_set_board(&anubis_board); | |
340 | ||
341 | /* ensure that the GPIO is setup */ | |
342 | s3c2410_gpio_setpin(S3C2410_GPA0, 1); | |
343 | } | |
344 | ||
345 | MACHINE_START(ANUBIS, "Simtec-Anubis") | |
346 | /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ | |
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347 | .phys_io = S3C2410_PA_UART, |
348 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | |
349 | .boot_params = S3C2410_SDRAM_PA + 0x100, | |
350 | .map_io = anubis_map_io, | |
351 | .init_irq = s3c24xx_init_irq, | |
352 | .timer = &s3c24xx_timer, | |
353 | MACHINE_END |