s3c2410fb: remove lcdcon3 register from s3c2410fb_display
[deliverable/linux.git] / arch / arm / mach-s3c2410 / mach-h1940.c
CommitLineData
1da177e4
LT
1/* linux/arch/arm/mach-s3c2410/mach-h1940.c
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.handhelds.org/projects/h1940.html
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
1da177e4
LT
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
333a42e1 20#include <linux/sysdev.h>
b6d1f542 21#include <linux/serial_core.h>
d052d1be 22#include <linux/platform_device.h>
1da177e4
LT
23
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26#include <asm/mach/irq.h>
27
28#include <asm/hardware.h>
1da177e4
LT
29#include <asm/io.h>
30#include <asm/irq.h>
31#include <asm/mach-types.h>
32
531b617c 33#include <asm/plat-s3c/regs-serial.h>
f92273c1 34#include <asm/arch/regs-lcd.h>
71a9c424
AP
35#include <asm/arch/regs-gpio.h>
36#include <asm/arch/regs-clock.h>
f92273c1 37
9073341c 38#include <asm/arch/h1940.h>
e1981680 39#include <asm/arch/h1940-latch.h>
f92273c1 40#include <asm/arch/fb.h>
06cfa556 41#include <asm/plat-s3c24xx/udc.h>
1da177e4 42
a21765a7
BD
43#include <asm/plat-s3c24xx/clock.h>
44#include <asm/plat-s3c24xx/devs.h>
45#include <asm/plat-s3c24xx/cpu.h>
46#include <asm/plat-s3c24xx/pm.h>
1da177e4
LT
47
48static struct map_desc h1940_iodesc[] __initdata = {
e1981680
BD
49 [0] = {
50 .virtual = (unsigned long)H1940_LATCH,
51 .pfn = __phys_to_pfn(H1940_PA_LATCH),
52 .length = SZ_16K,
53 .type = MT_DEVICE
54 },
1da177e4
LT
55};
56
57#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
58#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
59#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
60
66a9b49a 61static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = {
1da177e4
LT
62 [0] = {
63 .hwport = 0,
64 .flags = 0,
65 .ucon = 0x3c5,
66 .ulcon = 0x03,
67 .ufcon = 0x51,
68 },
69 [1] = {
70 .hwport = 1,
71 .flags = 0,
72 .ucon = 0x245,
73 .ulcon = 0x03,
74 .ufcon = 0x00,
75 },
76 /* IR port */
77 [2] = {
78 .hwport = 2,
79 .flags = 0,
80 .uart_flags = UPF_CONS_FLOW,
81 .ucon = 0x3c5,
82 .ulcon = 0x43,
83 .ufcon = 0x51,
84 }
85};
86
e1981680
BD
87/* Board control latch control */
88
89static unsigned int latch_state = H1940_LATCH_DEFAULT;
90
91void h1940_latch_control(unsigned int clear, unsigned int set)
92{
93 unsigned long flags;
94
95 local_irq_save(flags);
96
97 latch_state &= ~clear;
98 latch_state |= set;
99
100 __raw_writel(latch_state, H1940_LATCH);
101
102 local_irq_restore(flags);
103}
104
105EXPORT_SYMBOL_GPL(h1940_latch_control);
1da177e4 106
71a9c424
AP
107static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd)
108{
109 printk(KERN_DEBUG "udc: pullup(%d)\n",cmd);
110
111 switch (cmd)
112 {
113 case S3C2410_UDC_P_ENABLE :
114 h1940_latch_control(0, H1940_LATCH_USB_DP);
115 break;
116 case S3C2410_UDC_P_DISABLE :
117 h1940_latch_control(H1940_LATCH_USB_DP, 0);
118 break;
119 case S3C2410_UDC_P_RESET :
120 break;
121 default:
122 break;
123 }
124}
125
126static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = {
127 .udc_command = h1940_udc_pullup,
128 .vbus_pin = S3C2410_GPG5,
129 .vbus_pin_inverted = 1,
130};
131
132
f92273c1
AP
133/**
134 * Set lcd on or off
135 **/
09fe75f6 136static struct s3c2410fb_display h1940_lcd __initdata = {
f28ef573
KH
137 .lcdcon1= S3C2410_LCDCON1_TFT16BPP | \
138 S3C2410_LCDCON1_TFT | \
139 S3C2410_LCDCON1_CLKVAL(0x0C),
140
141 .lcdcon2= S3C2410_LCDCON2_VBPD(7) | \
142 S3C2410_LCDCON2_LINEVAL(319) | \
143 S3C2410_LCDCON2_VFPD(6) | \
144 S3C2410_LCDCON2_VSPW(0),
145
146 .lcdcon4= S3C2410_LCDCON4_MVAL(0) | \
147 S3C2410_LCDCON4_HSPW(3),
148
149 .lcdcon5= S3C2410_LCDCON5_FRM565 | \
150 S3C2410_LCDCON5_INVVLINE | \
151 S3C2410_LCDCON5_HWSWP,
09fe75f6 152
1f411537 153 .type = S3C2410_LCDCON1_TFT,
09fe75f6
KH
154 .width = 240,
155 .height = 320,
156 .xres = 240,
157 .yres = 320,
158 .bpp = 16,
1f411537
KH
159 .left_margin = 20,
160 .right_margin = 8,
09fe75f6
KH
161};
162
163static struct s3c2410fb_mach_info h1940_fb_info __initdata = {
164 .fixed_syncs = 1,
165
166 .displays = &h1940_lcd,
167 .num_displays = 1,
168 .default_display = 0,
169
f92273c1
AP
170 .lpcsel= 0x02,
171 .gpccon= 0xaa940659,
172 .gpccon_mask= 0xffffffff,
173 .gpcup= 0x0000ffff,
174 .gpcup_mask= 0xffffffff,
175 .gpdcon= 0xaa84aaa0,
176 .gpdcon_mask= 0xffffffff,
177 .gpdup= 0x0000faff,
178 .gpdup_mask= 0xffffffff,
f92273c1 179};
1da177e4 180
d2a76020
AP
181static struct platform_device s3c_device_leds = {
182 .name = "h1940-leds",
183 .id = -1,
184};
185
7fdc7849
AP
186static struct platform_device s3c_device_bluetooth = {
187 .name = "h1940-bt",
188 .id = -1,
189};
190
1da177e4
LT
191static struct platform_device *h1940_devices[] __initdata = {
192 &s3c_device_usb,
193 &s3c_device_lcd,
194 &s3c_device_wdt,
195 &s3c_device_i2c,
196 &s3c_device_iis,
71a9c424 197 &s3c_device_usbgadget,
d2a76020 198 &s3c_device_leds,
7fdc7849 199 &s3c_device_bluetooth,
1da177e4
LT
200};
201
5fe10ab1 202static void __init h1940_map_io(void)
1da177e4
LT
203{
204 s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc));
205 s3c24xx_init_clocks(0);
206 s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs));
9073341c
BD
207
208 /* setup PM */
209
b1dfe1f1 210#ifdef CONFIG_PM_H1940
9073341c 211 memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
b1dfe1f1 212#endif
9073341c 213 s3c2410_pm_init();
1da177e4
LT
214}
215
5fe10ab1 216static void __init h1940_init_irq(void)
1da177e4
LT
217{
218 s3c24xx_init_irq();
1da177e4
LT
219}
220
5fe10ab1 221static void __init h1940_init(void)
f92273c1 222{
71a9c424
AP
223 u32 tmp;
224
09fe75f6 225 s3c24xx_fb_set_platdata(&h1940_fb_info);
71a9c424
AP
226 s3c24xx_udc_set_platdata(&h1940_udc_cfg);
227
228 /* Turn off suspend on both USB ports, and switch the
229 * selectable USB port to USB device mode. */
230
231 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
232 S3C2410_MISCCR_USBSUSPND0 |
233 S3C2410_MISCCR_USBSUSPND1, 0x0);
234
235 tmp = (
236 0x78 << S3C2410_PLLCON_MDIVSHIFT)
237 | (0x02 << S3C2410_PLLCON_PDIVSHIFT)
238 | (0x03 << S3C2410_PLLCON_SDIVSHIFT);
239 writel(tmp, S3C2410_UPLLCON);
57e5171c
BD
240
241 platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices));
f92273c1
AP
242}
243
1da177e4 244MACHINE_START(H1940, "IPAQ-H1940")
e9dea0c6 245 /* Maintainer: Ben Dooks <ben@fluff.org> */
e9dea0c6
RK
246 .phys_io = S3C2410_PA_UART,
247 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
248 .boot_params = S3C2410_SDRAM_PA + 0x100,
249 .map_io = h1940_map_io,
250 .init_irq = h1940_init_irq,
71a9c424 251 .init_machine = h1940_init,
1da177e4
LT
252 .timer = &s3c24xx_timer,
253MACHINE_END
This page took 0.259882 seconds and 5 git commands to generate.