[deliverable/linux.git] / arch / arm / mach-s3c2410 / mach-vr1000.c

/* linux/arch/arm/mach-s3c2410/mach-vr1000.c
 *
 * Copyright (c) 2003-2005,2008 Simtec Electronics
 *   Ben Dooks <ben@simtec.co.uk>
 *
 * Machine support for Thorcom VR1000 board. Designed for Thorcom by
 * Simtec Electronics, http://www.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
*/

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/dm9000.h>
#include <linux/i2c.h>

#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/io.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <mach/bast-map.h>
#include <mach/vr1000-map.h>
#include <mach/vr1000-irq.h>
#include <mach/vr1000-cpld.h>

#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/mach-types.h>

#include <plat/regs-serial.h>
#include <mach/regs-gpio.h>
#include <mach/leds-gpio.h>

#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/iic.h>

#include "usb-simtec.h"
#include "nor-simtec.h"

/* macros for virtual address mods for the io space entries */
#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
#define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
#define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
#define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)

/* macros to modify the physical addresses for io space */

#define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
#define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
#define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
#define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))

static struct map_desc vr1000_iodesc[] __initdata = {
  /* ISA IO areas */
  {
	  .virtual	= (u32)S3C24XX_VA_ISA_BYTE,
	  .pfn		= PA_CS2(BAST_PA_ISAIO),
	  .length	= SZ_16M,
	  .type		= MT_DEVICE,
  }, {
	  .virtual	= (u32)S3C24XX_VA_ISA_WORD,
	  .pfn		= PA_CS3(BAST_PA_ISAIO),
	  .length	= SZ_16M,
	  .type		= MT_DEVICE,
  },

  /*  CPLD control registers, and external interrupt controls */
  {
	  .virtual	= (u32)VR1000_VA_CTRL1,
	  .pfn		= __phys_to_pfn(VR1000_PA_CTRL1),
	  .length	= SZ_1M,
	  .type		= MT_DEVICE,
  }, {
	  .virtual	= (u32)VR1000_VA_CTRL2,
	  .pfn		= __phys_to_pfn(VR1000_PA_CTRL2),
	  .length	= SZ_1M,
	  .type		= MT_DEVICE,
  }, {
	  .virtual	= (u32)VR1000_VA_CTRL3,
	  .pfn		= __phys_to_pfn(VR1000_PA_CTRL3),
	  .length	= SZ_1M,
	  .type		= MT_DEVICE,
  }, {
	  .virtual	= (u32)VR1000_VA_CTRL4,
	  .pfn		= __phys_to_pfn(VR1000_PA_CTRL4),
	  .length	= SZ_1M,
	  .type		= MT_DEVICE,
  },
};

#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE

/* uart clock source(s) */

static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
	[0] = {
		.name		= "uclk",
		.divisor	= 1,
		.min_baud	= 0,
		.max_baud	= 0,
	},
	[1] = {
		.name		= "pclk",
		.divisor	= 1,
		.min_baud	= 0,
		.max_baud	= 0.
	}
};

static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
	[0] = {
		.hwport	     = 0,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
		.clocks	     = vr1000_serial_clocks,
		.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
	},
	[1] = {
		.hwport	     = 1,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
		.clocks	     = vr1000_serial_clocks,
		.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
	},
	/* port 2 is not actually used */
	[2] = {
		.hwport	     = 2,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
		.clocks	     = vr1000_serial_clocks,
		.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),

	}
};

/* definitions for the vr1000 extra 16550 serial ports */

#define VR1000_BAUDBASE (3692307)

#define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))

static struct plat_serial8250_port serial_platform_data[] = {
	[0] = {
		.mapbase	= VR1000_SERIAL_MAPBASE(0),
		.irq		= IRQ_VR1000_SERIAL + 0,
		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
		.iotype		= UPIO_MEM,
		.regshift	= 0,
		.uartclk	= VR1000_BAUDBASE,
	},
	[1] = {
		.mapbase	= VR1000_SERIAL_MAPBASE(1),
		.irq		= IRQ_VR1000_SERIAL + 1,
		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
		.iotype		= UPIO_MEM,
		.regshift	= 0,
		.uartclk	= VR1000_BAUDBASE,
	},
	[2] = {
		.mapbase	= VR1000_SERIAL_MAPBASE(2),
		.irq		= IRQ_VR1000_SERIAL + 2,
		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
		.iotype		= UPIO_MEM,
		.regshift	= 0,
		.uartclk	= VR1000_BAUDBASE,
	},
	[3] = {
		.mapbase	= VR1000_SERIAL_MAPBASE(3),
		.irq		= IRQ_VR1000_SERIAL + 3,
		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
		.iotype		= UPIO_MEM,
		.regshift	= 0,
		.uartclk	= VR1000_BAUDBASE,
	},
	{ },
};

static struct platform_device serial_device = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev			= {
		.platform_data	= serial_platform_data,
	},
};

/* DM9000 ethernet devices */

static struct resource vr1000_dm9k0_resource[] = {
	[0] = {
		.start = S3C2410_CS5 + VR1000_PA_DM9000,
		.end   = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
		.flags = IORESOURCE_MEM
	},
	[1] = {
		.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
		.end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
		.flags = IORESOURCE_MEM
	},
	[2] = {
		.start = IRQ_VR1000_DM9000A,
		.end   = IRQ_VR1000_DM9000A,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	}

};

static struct resource vr1000_dm9k1_resource[] = {
	[0] = {
		.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
		.end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
		.flags = IORESOURCE_MEM
	},
	[1] = {
		.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
		.end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
		.flags = IORESOURCE_MEM
	},
	[2] = {
		.start = IRQ_VR1000_DM9000N,
		.end   = IRQ_VR1000_DM9000N,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	}
};

/* for the moment we limit ourselves to 16bit IO until some
 * better IO routines can be written and tested
*/

static struct dm9000_plat_data vr1000_dm9k_platdata = {
	.flags		= DM9000_PLATF_16BITONLY,
};

static struct platform_device vr1000_dm9k0 = {
	.name		= "dm9000",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(vr1000_dm9k0_resource),
	.resource	= vr1000_dm9k0_resource,
	.dev		= {
		.platform_data = &vr1000_dm9k_platdata,
	}
};

static struct platform_device vr1000_dm9k1 = {
	.name		= "dm9000",
	.id		= 1,
	.num_resources	= ARRAY_SIZE(vr1000_dm9k1_resource),
	.resource	= vr1000_dm9k1_resource,
	.dev		= {
		.platform_data = &vr1000_dm9k_platdata,
	}
};

/* LEDS */

static struct s3c24xx_led_platdata vr1000_led1_pdata = {
	.name		= "led1",
	.gpio		= S3C2410_GPB0,
	.def_trigger	= "",
};

static struct s3c24xx_led_platdata vr1000_led2_pdata = {
	.name		= "led2",
	.gpio		= S3C2410_GPB1,
	.def_trigger	= "",
};

static struct s3c24xx_led_platdata vr1000_led3_pdata = {
	.name		= "led3",
	.gpio		= S3C2410_GPB2,
	.def_trigger	= "",
};

static struct platform_device vr1000_led1 = {
	.name		= "s3c24xx_led",
	.id		= 1,
	.dev		= {
		.platform_data	= &vr1000_led1_pdata,
	},
};

static struct platform_device vr1000_led2 = {
	.name		= "s3c24xx_led",
	.id		= 2,
	.dev		= {
		.platform_data	= &vr1000_led2_pdata,
	},
};

static struct platform_device vr1000_led3 = {
	.name		= "s3c24xx_led",
	.id		= 3,
	.dev		= {
		.platform_data	= &vr1000_led3_pdata,
	},
};

/* I2C devices. */

static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
	{
		I2C_BOARD_INFO("tlv320aic23", 0x1a),
	}, {
		I2C_BOARD_INFO("tmp101", 0x48),
	}, {
		I2C_BOARD_INFO("m41st87", 0x68),
	},
};

/* devices for this board */

static struct platform_device *vr1000_devices[] __initdata = {
	&s3c_device_usb,
	&s3c_device_lcd,
	&s3c_device_wdt,
	&s3c_device_i2c0,
	&s3c_device_adc,
	&serial_device,
	&vr1000_dm9k0,
	&vr1000_dm9k1,
	&vr1000_led1,
	&vr1000_led2,
	&vr1000_led3,
};

static struct clk *vr1000_clocks[] __initdata = {
	&s3c24xx_dclk0,
	&s3c24xx_dclk1,
	&s3c24xx_clkout0,
	&s3c24xx_clkout1,
	&s3c24xx_uclk,
};

static void vr1000_power_off(void)
{
	s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPIO_OUTPUT);
	s3c2410_gpio_setpin(S3C2410_GPB9, 1);
}

static void __init vr1000_map_io(void)
{
	/* initialise clock sources */

	s3c24xx_dclk0.parent = &clk_upll;
	s3c24xx_dclk0.rate   = 12*1000*1000;

	s3c24xx_dclk1.parent = NULL;
	s3c24xx_dclk1.rate   = 3692307;

	s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
	s3c24xx_clkout1.parent  = &s3c24xx_dclk1;

	s3c24xx_uclk.parent  = &s3c24xx_clkout1;

	s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));

	pm_power_off = vr1000_power_off;

	s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
	s3c24xx_init_clocks(0);
	s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
}

static void __init vr1000_init(void)
{
	s3c_i2c0_set_platdata(NULL);
	platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));

	i2c_register_board_info(0, vr1000_i2c_devs,
				ARRAY_SIZE(vr1000_i2c_devs));

	nor_simtec_init();
}

MACHINE_START(VR1000, "Thorcom-VR1000")
	/* Maintainer: Ben Dooks <ben@simtec.co.uk> */
	.phys_io	= S3C2410_PA_UART,
	.io_pg_offst	= (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
	.boot_params	= S3C2410_SDRAM_PA + 0x100,
	.map_io		= vr1000_map_io,
	.init_machine	= vr1000_init,
	.init_irq	= s3c24xx_init_irq,
	.timer		= &s3c24xx_timer,
MACHINE_END
Commit	Line	Data
1da177e4 LT	1	/* linux/arch/arm/mach-s3c2410/mach-vr1000.c
1da177e4 LT	2	*
60d6698b	3	* Copyright (c) 2003-2005,2008 Simtec Electronics
1da177e4 LT	4	* Ben Dooks <ben@simtec.co.uk>
	5	*
	6	* Machine support for Thorcom VR1000 board. Designed for Thorcom by
	7	* Simtec Electronics, http://www.simtec.co.uk/
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*
1da177e4 LT	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/types.h>
	17	#include <linux/interrupt.h>
	18	#include <linux/list.h>
	19	#include <linux/timer.h>
	20	#include <linux/init.h>
d97a666f	21	#include <linux/dm9000.h>
60d6698b	22	#include <linux/i2c.h>
1da177e4 LT	23
	24	#include <linux/serial.h>
	25	#include <linux/tty.h>
	26	#include <linux/serial_8250.h>
	27	#include <linux/serial_reg.h>
fced80c7	28	#include <linux/io.h>
1da177e4 LT	29
	30	#include <asm/mach/arch.h>
	31	#include <asm/mach/map.h>
	32	#include <asm/mach/irq.h>
	33
a09e64fb RK	34	#include <mach/bast-map.h>
	35	#include <mach/vr1000-map.h>
	36	#include <mach/vr1000-irq.h>
	37	#include <mach/vr1000-cpld.h>
1da177e4	38
a09e64fb	39	#include <mach/hardware.h>
1da177e4 LT	40	#include <asm/irq.h>
	41	#include <asm/mach-types.h>
	42
a2b7ba9c	43	#include <plat/regs-serial.h>
a09e64fb RK	44	#include <mach/regs-gpio.h>
a09e64fb RK	45	#include <mach/leds-gpio.h>
1da177e4	46
d5120ae7	47	#include <plat/clock.h>
a2b7ba9c BD	48	#include <plat/devs.h>
a2b7ba9c BD	49	#include <plat/cpu.h>
3e1b776c	50	#include <plat/iic.h>
9d529c6e	51
1da177e4	52	#include "usb-simtec.h"
9d529c6e	53	#include "nor-simtec.h"
1da177e4 LT	54
	55	/* macros for virtual address mods for the io space entries */
	56	#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
	57	#define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
	58	#define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
	59	#define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
	60
	61	/* macros to modify the physical addresses for io space */
	62
df1ec6de BD	63	#define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
	64	#define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
	65	#define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
	66	#define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
1da177e4 LT	67
	68	static struct map_desc vr1000_iodesc[] __initdata = {
	69	/* ISA IO areas */
df1ec6de BD	70	{
	71	.virtual = (u32)S3C24XX_VA_ISA_BYTE,
	72	.pfn = PA_CS2(BAST_PA_ISAIO),
	73	.length = SZ_16M,
	74	.type = MT_DEVICE,
	75	}, {
	76	.virtual = (u32)S3C24XX_VA_ISA_WORD,
	77	.pfn = PA_CS3(BAST_PA_ISAIO),
	78	.length = SZ_16M,
	79	.type = MT_DEVICE,
	80	},
	81
	82	/* CPLD control registers, and external interrupt controls */
	83	{
	84	.virtual = (u32)VR1000_VA_CTRL1,
	85	.pfn = __phys_to_pfn(VR1000_PA_CTRL1),
	86	.length = SZ_1M,
	87	.type = MT_DEVICE,
	88	}, {
	89	.virtual = (u32)VR1000_VA_CTRL2,
	90	.pfn = __phys_to_pfn(VR1000_PA_CTRL2),
	91	.length = SZ_1M,
	92	.type = MT_DEVICE,
	93	}, {
	94	.virtual = (u32)VR1000_VA_CTRL3,
	95	.pfn = __phys_to_pfn(VR1000_PA_CTRL3),
	96	.length = SZ_1M,
	97	.type = MT_DEVICE,
	98	}, {
	99	.virtual = (u32)VR1000_VA_CTRL4,
	100	.pfn = __phys_to_pfn(VR1000_PA_CTRL4),
	101	.length = SZ_1M,
	102	.type = MT_DEVICE,
	103	},
1da177e4 LT	104	};
	105
	106	#define UCON S3C2410_UCON_DEFAULT \| S3C2410_UCON_UCLK
	107	#define ULCON S3C2410_LCON_CS8 \| S3C2410_LCON_PNONE \| S3C2410_LCON_STOPB
	108	#define UFCON S3C2410_UFCON_RXTRIG8 \| S3C2410_UFCON_FIFOMODE
	109
	110	/* uart clock source(s) */
	111
	112	static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
	113	[0] = {
	114	.name = "uclk",
	115	.divisor = 1,
	116	.min_baud = 0,
	117	.max_baud = 0,
	118	},
	119	[1] = {
	120	.name = "pclk",
	121	.divisor = 1,
	122	.min_baud = 0,
	123	.max_baud = 0.
	124	}
	125	};
	126
66a9b49a	127	static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
1da177e4 LT	128	[0] = {
	129	.hwport = 0,
	130	.flags = 0,
	131	.ucon = UCON,
	132	.ulcon = ULCON,
	133	.ufcon = UFCON,
	134	.clocks = vr1000_serial_clocks,
	135	.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
	136	},
	137	[1] = {
	138	.hwport = 1,
	139	.flags = 0,
	140	.ucon = UCON,
	141	.ulcon = ULCON,
	142	.ufcon = UFCON,
	143	.clocks = vr1000_serial_clocks,
	144	.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
	145	},
	146	/* port 2 is not actually used */
	147	[2] = {
	148	.hwport = 2,
	149	.flags = 0,
	150	.ucon = UCON,
	151	.ulcon = ULCON,
	152	.ufcon = UFCON,
	153	.clocks = vr1000_serial_clocks,
	154	.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
	155
	156	}
	157	};
	158
	159	/* definitions for the vr1000 extra 16550 serial ports */
	160
	161	#define VR1000_BAUDBASE (3692307)
	162
	163	#define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
	164
	165	static struct plat_serial8250_port serial_platform_data[] = {
	166	[0] = {
	167	.mapbase = VR1000_SERIAL_MAPBASE(0),
	168	.irq = IRQ_VR1000_SERIAL + 0,
	169	.flags = UPF_BOOT_AUTOCONF \| UPF_IOREMAP,
	170	.iotype = UPIO_MEM,
	171	.regshift = 0,
	172	.uartclk = VR1000_BAUDBASE,
	173	},
	174	[1] = {
	175	.mapbase = VR1000_SERIAL_MAPBASE(1),
	176	.irq = IRQ_VR1000_SERIAL + 1,
	177	.flags = UPF_BOOT_AUTOCONF \| UPF_IOREMAP,
	178	.iotype = UPIO_MEM,
	179	.regshift = 0,
	180	.uartclk = VR1000_BAUDBASE,
	181	},
	182	[2] = {
	183	.mapbase = VR1000_SERIAL_MAPBASE(2),
	184	.irq = IRQ_VR1000_SERIAL + 2,
	185	.flags = UPF_BOOT_AUTOCONF \| UPF_IOREMAP,
	186	.iotype = UPIO_MEM,
	187	.regshift = 0,
	188	.uartclk = VR1000_BAUDBASE,
	189	},
	190	[3] = {
	191	.mapbase = VR1000_SERIAL_MAPBASE(3),
192	.irq = IRQ_VR1000_SERIAL + 3,
193	.flags = UPF_BOOT_AUTOCONF \| UPF_IOREMAP,
194	.iotype = UPIO_MEM,
195	.regshift = 0,
196	.uartclk = VR1000_BAUDBASE,
197	},
198	{ },
199	};
200
201	static struct platform_device serial_device = {
202	.name = "serial8250",
6df29deb	203	.id = PLAT8250_DEV_PLATFORM,
1da177e4 LT	204	.dev = {
	205	.platform_data = serial_platform_data,
	206	},
	207	};
	208
d97a666f BD	209	/* DM9000 ethernet devices */
	210
	211	static struct resource vr1000_dm9k0_resource[] = {
	212	[0] = {
	213	.start = S3C2410_CS5 + VR1000_PA_DM9000,
	214	.end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
	215	.flags = IORESOURCE_MEM
	216	},
	217	[1] = {
	218	.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
	219	.end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
	220	.flags = IORESOURCE_MEM
	221	},
	222	[2] = {
	223	.start = IRQ_VR1000_DM9000A,
	224	.end = IRQ_VR1000_DM9000A,
9cf345e3	225	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
d97a666f BD	226	}
	227
	228	};
	229
	230	static struct resource vr1000_dm9k1_resource[] = {
	231	[0] = {
	232	.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
	233	.end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
	234	.flags = IORESOURCE_MEM
	235	},
	236	[1] = {
	237	.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
	238	.end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
	239	.flags = IORESOURCE_MEM
	240	},
	241	[2] = {
	242	.start = IRQ_VR1000_DM9000N,
	243	.end = IRQ_VR1000_DM9000N,
9cf345e3	244	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
d97a666f BD	245	}
	246	};
	247
	248	/* for the moment we limit ourselves to 16bit IO until some
	249	* better IO routines can be written and tested
	250	*/
	251
9f693d7b	252	static struct dm9000_plat_data vr1000_dm9k_platdata = {
d97a666f BD	253	.flags = DM9000_PLATF_16BITONLY,
	254	};
	255
	256	static struct platform_device vr1000_dm9k0 = {
	257	.name = "dm9000",
	258	.id = 0,
	259	.num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
	260	.resource = vr1000_dm9k0_resource,
	261	.dev = {
	262	.platform_data = &vr1000_dm9k_platdata,
	263	}
	264	};
	265
	266	static struct platform_device vr1000_dm9k1 = {
	267	.name = "dm9000",
	268	.id = 1,
	269	.num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
	270	.resource = vr1000_dm9k1_resource,
	271	.dev = {
	272	.platform_data = &vr1000_dm9k_platdata,
	273	}
	274	};
	275
b2eba6bb BD	276	/* LEDS */
	277
	278	static struct s3c24xx_led_platdata vr1000_led1_pdata = {
	279	.name = "led1",
	280	.gpio = S3C2410_GPB0,
	281	.def_trigger = "",
	282	};
	283
	284	static struct s3c24xx_led_platdata vr1000_led2_pdata = {
	285	.name = "led2",
	286	.gpio = S3C2410_GPB1,
	287	.def_trigger = "",
	288	};
	289
	290	static struct s3c24xx_led_platdata vr1000_led3_pdata = {
	291	.name = "led3",
	292	.gpio = S3C2410_GPB2,
	293	.def_trigger = "",
	294	};
	295
	296	static struct platform_device vr1000_led1 = {
	297	.name = "s3c24xx_led",
	298	.id = 1,
	299	.dev = {
	300	.platform_data = &vr1000_led1_pdata,
	301	},
	302	};
	303
	304	static struct platform_device vr1000_led2 = {
	305	.name = "s3c24xx_led",
	306	.id = 2,
	307	.dev = {
	308	.platform_data = &vr1000_led2_pdata,
	309	},
	310	};
	311
	312	static struct platform_device vr1000_led3 = {
	313	.name = "s3c24xx_led",
abac08d7	314	.id = 3,
b2eba6bb BD	315	.dev = {
	316	.platform_data = &vr1000_led3_pdata,
	317	},
	318	};
	319
60d6698b BD	320	/* I2C devices. */
	321
	322	static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
	323	{
	324	I2C_BOARD_INFO("tlv320aic23", 0x1a),
9c3871ca BD	325	}, {
9c3871ca BD	326	I2C_BOARD_INFO("tmp101", 0x48),
60d6698b BD	327	}, {
	328	I2C_BOARD_INFO("m41st87", 0x68),
	329	},
	330	};
	331
d97a666f	332	/* devices for this board */
1da177e4 LT	333
	334	static struct platform_device *vr1000_devices[] __initdata = {
	335	&s3c_device_usb,
	336	&s3c_device_lcd,
	337	&s3c_device_wdt,
3e1b776c	338	&s3c_device_i2c0,
d97a666f	339	&s3c_device_adc,
1da177e4	340	&serial_device,
d97a666f	341	&vr1000_dm9k0,
b2eba6bb BD	342	&vr1000_dm9k1,
	343	&vr1000_led1,
	344	&vr1000_led2,
	345	&vr1000_led3,
1da177e4 LT	346	};
1da177e4 LT	347
2bc7509f	348	static struct clk *vr1000_clocks[] __initdata = {
1da177e4 LT	349	&s3c24xx_dclk0,
	350	&s3c24xx_dclk1,
	351	&s3c24xx_clkout0,
	352	&s3c24xx_clkout1,
	353	&s3c24xx_uclk,
	354	};
	355
1da177e4 LT	356	static void vr1000_power_off(void)
1da177e4 LT	357	{
9f05f6a9	358	s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPIO_OUTPUT);
1da177e4 LT	359	s3c2410_gpio_setpin(S3C2410_GPB9, 1);
	360	}
	361
5fe10ab1	362	static void __init vr1000_map_io(void)
1da177e4 LT	363	{
	364	/* initialise clock sources */
	365
d96a9804	366	s3c24xx_dclk0.parent = &clk_upll;
1da177e4 LT	367	s3c24xx_dclk0.rate = 1210001000;
	368
	369	s3c24xx_dclk1.parent = NULL;
	370	s3c24xx_dclk1.rate = 3692307;
	371
	372	s3c24xx_clkout0.parent = &s3c24xx_dclk0;
	373	s3c24xx_clkout1.parent = &s3c24xx_dclk1;
	374
	375	s3c24xx_uclk.parent = &s3c24xx_clkout1;
	376
ce89c206 BD	377	s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
ce89c206 BD	378
1da177e4 LT	379	pm_power_off = vr1000_power_off;
	380
	381	s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
	382	s3c24xx_init_clocks(0);
	383	s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
1da177e4 LT	384	}
1da177e4 LT	385
57e5171c BD	386	static void __init vr1000_init(void)
57e5171c BD	387	{
3e1b776c	388	s3c_i2c0_set_platdata(NULL);
57e5171c	389	platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
9d529c6e	390
60d6698b BD	391	i2c_register_board_info(0, vr1000_i2c_devs,
	392	ARRAY_SIZE(vr1000_i2c_devs));
	393
9d529c6e	394	nor_simtec_init();
57e5171c	395	}
1da177e4 LT	396
1da177e4 LT	397	MACHINE_START(VR1000, "Thorcom-VR1000")
e9dea0c6	398	/* Maintainer: Ben Dooks <ben@simtec.co.uk> */
e9dea0c6 RK	399	.phys_io = S3C2410_PA_UART,
	400	.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
	401	.boot_params = S3C2410_SDRAM_PA + 0x100,
6904b246	402	.map_io = vr1000_map_io,
57e5171c	403	.init_machine = vr1000_init,
6904b246	404	.init_irq = s3c24xx_init_irq,
1da177e4 LT	405	.timer = &s3c24xx_timer,
1da177e4 LT	406	MACHINE_END