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1da177e4 LT |
1 | /* linux/arch/arm/mach-s3c2410/pm.c |
2 | * | |
a21765a7 | 3 | * Copyright (c) 2006 Simtec Electronics |
1da177e4 LT |
4 | * Ben Dooks <ben@simtec.co.uk> |
5 | * | |
a21765a7 | 6 | * S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support |
1da177e4 LT |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
1da177e4 LT |
21 | */ |
22 | ||
1da177e4 LT |
23 | #include <linux/init.h> |
24 | #include <linux/suspend.h> | |
25 | #include <linux/errno.h> | |
26 | #include <linux/time.h> | |
a21765a7 | 27 | #include <linux/sysdev.h> |
ec976d6e | 28 | #include <linux/gpio.h> |
fced80c7 | 29 | #include <linux/io.h> |
1da177e4 | 30 | |
a09e64fb | 31 | #include <mach/hardware.h> |
1da177e4 | 32 | |
a21765a7 | 33 | #include <asm/mach-types.h> |
1da177e4 | 34 | |
a09e64fb RK |
35 | #include <mach/regs-gpio.h> |
36 | #include <mach/h1940.h> | |
1da177e4 | 37 | |
a2b7ba9c BD |
38 | #include <plat/cpu.h> |
39 | #include <plat/pm.h> | |
1da177e4 | 40 | |
a21765a7 | 41 | static void s3c2410_pm_prepare(void) |
1da177e4 | 42 | { |
a21765a7 | 43 | /* ensure at least GSTATUS3 has the resume address */ |
1da177e4 | 44 | |
ef30e144 | 45 | __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2410_GSTATUS3); |
1da177e4 | 46 | |
6419711a BD |
47 | S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3)); |
48 | S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4)); | |
1da177e4 | 49 | |
a21765a7 BD |
50 | if (machine_is_h1940()) { |
51 | void *base = phys_to_virt(H1940_SUSPEND_CHECK); | |
52 | unsigned long ptr; | |
53 | unsigned long calc = 0; | |
1da177e4 | 54 | |
a21765a7 | 55 | /* generate check for the bootloader to check on resume */ |
1da177e4 | 56 | |
a21765a7 BD |
57 | for (ptr = 0; ptr < 0x40000; ptr += 0x400) |
58 | calc += __raw_readl(base+ptr); | |
1da177e4 | 59 | |
a21765a7 | 60 | __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); |
1da177e4 LT |
61 | } |
62 | ||
0741b7d2 | 63 | /* RX3715 and RX1950 use similar to H1940 code and the |
a21765a7 | 64 | * same offsets for resume and checksum pointers */ |
1da177e4 | 65 | |
0741b7d2 | 66 | if (machine_is_rx3715() || machine_is_rx1950()) { |
a21765a7 BD |
67 | void *base = phys_to_virt(H1940_SUSPEND_CHECK); |
68 | unsigned long ptr; | |
69 | unsigned long calc = 0; | |
1da177e4 | 70 | |
a21765a7 | 71 | /* generate check for the bootloader to check on resume */ |
1da177e4 | 72 | |
a21765a7 BD |
73 | for (ptr = 0; ptr < 0x40000; ptr += 0x4) |
74 | calc += __raw_readl(base+ptr); | |
1da177e4 | 75 | |
a21765a7 | 76 | __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); |
1da177e4 LT |
77 | } |
78 | ||
a21765a7 | 79 | if ( machine_is_aml_m5900() ) |
070276d5 | 80 | s3c2410_gpio_setpin(S3C2410_GPF(2), 1); |
1da177e4 | 81 | |
1da177e4 LT |
82 | } |
83 | ||
a21765a7 | 84 | static int s3c2410_pm_resume(struct sys_device *dev) |
1da177e4 | 85 | { |
a21765a7 | 86 | unsigned long tmp; |
1da177e4 | 87 | |
a21765a7 | 88 | /* unset the return-from-sleep flag, to ensure reset */ |
1da177e4 | 89 | |
a21765a7 BD |
90 | tmp = __raw_readl(S3C2410_GSTATUS2); |
91 | tmp &= S3C2410_GSTATUS2_OFFRESET; | |
92 | __raw_writel(tmp, S3C2410_GSTATUS2); | |
1da177e4 | 93 | |
a21765a7 | 94 | if ( machine_is_aml_m5900() ) |
070276d5 | 95 | s3c2410_gpio_setpin(S3C2410_GPF(2), 0); |
1da177e4 | 96 | |
a21765a7 | 97 | return 0; |
1da177e4 LT |
98 | } |
99 | ||
a21765a7 | 100 | static int s3c2410_pm_add(struct sys_device *dev) |
1da177e4 | 101 | { |
a21765a7 BD |
102 | pm_cpu_prep = s3c2410_pm_prepare; |
103 | pm_cpu_sleep = s3c2410_cpu_suspend; | |
1da177e4 | 104 | |
a21765a7 | 105 | return 0; |
1da177e4 LT |
106 | } |
107 | ||
a21765a7 BD |
108 | #if defined(CONFIG_CPU_S3C2410) |
109 | static struct sysdev_driver s3c2410_pm_driver = { | |
110 | .add = s3c2410_pm_add, | |
111 | .resume = s3c2410_pm_resume, | |
112 | }; | |
1da177e4 | 113 | |
a21765a7 | 114 | /* register ourselves */ |
1da177e4 | 115 | |
a21765a7 | 116 | static int __init s3c2410_pm_drvinit(void) |
1da177e4 | 117 | { |
a21765a7 | 118 | return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_pm_driver); |
1da177e4 LT |
119 | } |
120 | ||
a21765a7 | 121 | arch_initcall(s3c2410_pm_drvinit); |
f0176794 BD |
122 | |
123 | static struct sysdev_driver s3c2410a_pm_driver = { | |
124 | .add = s3c2410_pm_add, | |
125 | .resume = s3c2410_pm_resume, | |
126 | }; | |
127 | ||
128 | static int __init s3c2410a_pm_drvinit(void) | |
129 | { | |
130 | return sysdev_driver_register(&s3c2410a_sysclass, &s3c2410a_pm_driver); | |
131 | } | |
132 | ||
133 | arch_initcall(s3c2410a_pm_drvinit); | |
a21765a7 | 134 | #endif |
1da177e4 | 135 | |
a21765a7 BD |
136 | #if defined(CONFIG_CPU_S3C2440) |
137 | static struct sysdev_driver s3c2440_pm_driver = { | |
138 | .add = s3c2410_pm_add, | |
139 | .resume = s3c2410_pm_resume, | |
140 | }; | |
1da177e4 | 141 | |
a21765a7 | 142 | static int __init s3c2440_pm_drvinit(void) |
1da177e4 | 143 | { |
a21765a7 | 144 | return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_pm_driver); |
1da177e4 LT |
145 | } |
146 | ||
a21765a7 BD |
147 | arch_initcall(s3c2440_pm_drvinit); |
148 | #endif | |
1da177e4 | 149 | |
a21765a7 BD |
150 | #if defined(CONFIG_CPU_S3C2442) |
151 | static struct sysdev_driver s3c2442_pm_driver = { | |
152 | .add = s3c2410_pm_add, | |
153 | .resume = s3c2410_pm_resume, | |
1da177e4 LT |
154 | }; |
155 | ||
a21765a7 | 156 | static int __init s3c2442_pm_drvinit(void) |
1da177e4 | 157 | { |
a21765a7 | 158 | return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_pm_driver); |
1da177e4 | 159 | } |
a21765a7 BD |
160 | |
161 | arch_initcall(s3c2442_pm_drvinit); | |
162 | #endif |