[ARM] S3C: Rename s3c2410_pm_init to s3c_pm_init.
[deliverable/linux.git] / arch / arm / mach-s3c2410 / pm.c
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1da177e4
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1/* linux/arch/arm/mach-s3c2410/pm.c
2 *
a21765a7 3 * Copyright (c) 2006 Simtec Electronics
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4 * Ben Dooks <ben@simtec.co.uk>
5 *
a21765a7 6 * S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support
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7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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21*/
22
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23#include <linux/init.h>
24#include <linux/suspend.h>
25#include <linux/errno.h>
26#include <linux/time.h>
a21765a7 27#include <linux/sysdev.h>
fced80c7 28#include <linux/io.h>
1da177e4 29
a09e64fb 30#include <mach/hardware.h>
1da177e4 31
a21765a7 32#include <asm/mach-types.h>
1da177e4 33
a09e64fb
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34#include <mach/regs-gpio.h>
35#include <mach/h1940.h>
1da177e4 36
a2b7ba9c
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37#include <plat/cpu.h>
38#include <plat/pm.h>
1da177e4 39
a21765a7 40static void s3c2410_pm_prepare(void)
1da177e4 41{
a21765a7 42 /* ensure at least GSTATUS3 has the resume address */
1da177e4 43
a21765a7 44 __raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2410_GSTATUS3);
1da177e4 45
6419711a
BD
46 S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
47 S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));
1da177e4 48
a21765a7
BD
49 if (machine_is_h1940()) {
50 void *base = phys_to_virt(H1940_SUSPEND_CHECK);
51 unsigned long ptr;
52 unsigned long calc = 0;
1da177e4 53
a21765a7 54 /* generate check for the bootloader to check on resume */
1da177e4 55
a21765a7
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56 for (ptr = 0; ptr < 0x40000; ptr += 0x400)
57 calc += __raw_readl(base+ptr);
1da177e4 58
a21765a7 59 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
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60 }
61
a21765a7
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62 /* the RX3715 uses similar code and the same H1940 and the
63 * same offsets for resume and checksum pointers */
1da177e4 64
a21765a7
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65 if (machine_is_rx3715()) {
66 void *base = phys_to_virt(H1940_SUSPEND_CHECK);
67 unsigned long ptr;
68 unsigned long calc = 0;
1da177e4 69
a21765a7 70 /* generate check for the bootloader to check on resume */
1da177e4 71
a21765a7
BD
72 for (ptr = 0; ptr < 0x40000; ptr += 0x4)
73 calc += __raw_readl(base+ptr);
1da177e4 74
a21765a7 75 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
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76 }
77
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78 if ( machine_is_aml_m5900() )
79 s3c2410_gpio_setpin(S3C2410_GPF2, 1);
1da177e4 80
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81}
82
a21765a7 83static int s3c2410_pm_resume(struct sys_device *dev)
1da177e4 84{
a21765a7 85 unsigned long tmp;
1da177e4 86
a21765a7 87 /* unset the return-from-sleep flag, to ensure reset */
1da177e4 88
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BD
89 tmp = __raw_readl(S3C2410_GSTATUS2);
90 tmp &= S3C2410_GSTATUS2_OFFRESET;
91 __raw_writel(tmp, S3C2410_GSTATUS2);
1da177e4 92
a21765a7
BD
93 if ( machine_is_aml_m5900() )
94 s3c2410_gpio_setpin(S3C2410_GPF2, 0);
1da177e4 95
a21765a7 96 return 0;
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97}
98
a21765a7 99static int s3c2410_pm_add(struct sys_device *dev)
1da177e4 100{
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101 pm_cpu_prep = s3c2410_pm_prepare;
102 pm_cpu_sleep = s3c2410_cpu_suspend;
1da177e4 103
a21765a7 104 return 0;
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105}
106
a21765a7
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107#if defined(CONFIG_CPU_S3C2410)
108static struct sysdev_driver s3c2410_pm_driver = {
109 .add = s3c2410_pm_add,
110 .resume = s3c2410_pm_resume,
111};
1da177e4 112
a21765a7 113/* register ourselves */
1da177e4 114
a21765a7 115static int __init s3c2410_pm_drvinit(void)
1da177e4 116{
a21765a7 117 return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_pm_driver);
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118}
119
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120arch_initcall(s3c2410_pm_drvinit);
121#endif
1da177e4 122
a21765a7
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123#if defined(CONFIG_CPU_S3C2440)
124static struct sysdev_driver s3c2440_pm_driver = {
125 .add = s3c2410_pm_add,
126 .resume = s3c2410_pm_resume,
127};
1da177e4 128
a21765a7 129static int __init s3c2440_pm_drvinit(void)
1da177e4 130{
a21765a7 131 return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_pm_driver);
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132}
133
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134arch_initcall(s3c2440_pm_drvinit);
135#endif
1da177e4 136
a21765a7
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137#if defined(CONFIG_CPU_S3C2442)
138static struct sysdev_driver s3c2442_pm_driver = {
139 .add = s3c2410_pm_add,
140 .resume = s3c2410_pm_resume,
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141};
142
a21765a7 143static int __init s3c2442_pm_drvinit(void)
1da177e4 144{
a21765a7 145 return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_pm_driver);
1da177e4 146}
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147
148arch_initcall(s3c2442_pm_drvinit);
149#endif
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