[deliverable/linux.git] / arch / arm / mach-s3c2410 / s3c2410-pm.c

/* linux/arch/arm/mach-s3c2410/s3c2410-pm.c
 *
 * Copyright (c) 2006 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*/

#include <linux/init.h>
#include <linux/suspend.h>
#include <linux/errno.h>
#include <linux/time.h>
#include <linux/sysdev.h>

#include <asm/hardware.h>
#include <asm/io.h>

#include <asm/mach-types.h>

#include <asm/arch/regs-gpio.h>
#include <asm/arch/h1940.h>

#include "cpu.h"
#include "pm.h"

#ifdef CONFIG_S3C2410_PM_DEBUG
extern void pm_dbg(const char *fmt, ...);
#define DBG(fmt...) pm_dbg(fmt)
#else
#define DBG(fmt...) printk(KERN_DEBUG fmt)
#endif

static void s3c2410_pm_prepare(void)
{
	/* ensure at least GSTATUS3 has the resume address */

	__raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2410_GSTATUS3);

	DBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
	DBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));

	if (machine_is_h1940()) {
		void *base = phys_to_virt(H1940_SUSPEND_CHECK);
		unsigned long ptr;
		unsigned long calc = 0;

		/* generate check for the bootloader to check on resume */

		for (ptr = 0; ptr < 0x40000; ptr += 0x400)
			calc += __raw_readl(base+ptr);

		__raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
	}

	/* the RX3715 uses similar code and the same H1940 and the
	 * same offsets for resume and checksum pointers */

	if (machine_is_rx3715()) {
		void *base = phys_to_virt(H1940_SUSPEND_CHECK);
		unsigned long ptr;
		unsigned long calc = 0;

		/* generate check for the bootloader to check on resume */

		for (ptr = 0; ptr < 0x40000; ptr += 0x4)
			calc += __raw_readl(base+ptr);

		__raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
	}

	if ( machine_is_aml_m5900() )
		s3c2410_gpio_setpin(S3C2410_GPF2, 1);

}

static int s3c2410_pm_resume(struct sys_device *dev)
{
	unsigned long tmp;

	/* unset the return-from-sleep flag, to ensure reset */

	tmp = __raw_readl(S3C2410_GSTATUS2);
	tmp &= S3C2410_GSTATUS2_OFFRESET;
	__raw_writel(tmp, S3C2410_GSTATUS2);

	if ( machine_is_aml_m5900() )
		s3c2410_gpio_setpin(S3C2410_GPF2, 0);

	return 0;
}

static int s3c2410_pm_add(struct sys_device *dev)
{
	pm_cpu_prep = s3c2410_pm_prepare;
	pm_cpu_sleep = s3c2410_cpu_suspend;

	return 0;
}

#if defined(CONFIG_CPU_S3C2410)
static struct sysdev_driver s3c2410_pm_driver = {
	.add		= s3c2410_pm_add,
	.resume		= s3c2410_pm_resume,
};

/* register ourselves */

static int __init s3c2410_pm_drvinit(void)
{
	return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_pm_driver);
}

arch_initcall(s3c2410_pm_drvinit);
#endif

#if defined(CONFIG_CPU_S3C2440)
static struct sysdev_driver s3c2440_pm_driver = {
	.add		= s3c2410_pm_add,
	.resume		= s3c2410_pm_resume,
};

static int __init s3c2440_pm_drvinit(void)
{
	return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_pm_driver);
}

arch_initcall(s3c2440_pm_drvinit);
#endif

#if defined(CONFIG_CPU_S3C2442)
static struct sysdev_driver s3c2442_pm_driver = {
	.add		= s3c2410_pm_add,
	.resume		= s3c2410_pm_resume,
};

static int __init s3c2442_pm_drvinit(void)
{
	return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_pm_driver);
}

arch_initcall(s3c2442_pm_drvinit);
#endif
Commit	Line	Data
0033a2f0 BD	1	/* linux/arch/arm/mach-s3c2410/s3c2410-pm.c
	2	*
	3	* Copyright (c) 2006 Simtec Electronics
	4	* Ben Dooks <ben@simtec.co.uk>
	5	*
	6	* S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	*/
	22
	23	#include <linux/init.h>
	24	#include <linux/suspend.h>
	25	#include <linux/errno.h>
	26	#include <linux/time.h>
	27	#include <linux/sysdev.h>
	28
	29	#include <asm/hardware.h>
	30	#include <asm/io.h>
	31
26f90818 DA	32	#include <asm/mach-types.h>
26f90818 DA	33
0033a2f0	34	#include <asm/arch/regs-gpio.h>
9073341c	35	#include <asm/arch/h1940.h>
0033a2f0 BD	36
	37	#include "cpu.h"
	38	#include "pm.h"
	39
	40	#ifdef CONFIG_S3C2410_PM_DEBUG
	41	extern void pm_dbg(const char *fmt, ...);
	42	#define DBG(fmt...) pm_dbg(fmt)
	43	#else
	44	#define DBG(fmt...) printk(KERN_DEBUG fmt)
	45	#endif
	46
	47	static void s3c2410_pm_prepare(void)
	48	{
	49	/* ensure at least GSTATUS3 has the resume address */
	50
	51	__raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2410_GSTATUS3);
	52
	53	DBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
	54	DBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));
26f90818	55
9073341c BD	56	if (machine_is_h1940()) {
	57	void *base = phys_to_virt(H1940_SUSPEND_CHECK);
	58	unsigned long ptr;
	59	unsigned long calc = 0;
	60
	61	/* generate check for the bootloader to check on resume */
	62
	63	for (ptr = 0; ptr < 0x40000; ptr += 0x400)
	64	calc += __raw_readl(base+ptr);
	65
	66	__raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
	67	}
	68
bbf6f280 BD	69	/* the RX3715 uses similar code and the same H1940 and the
	70	* same offsets for resume and checksum pointers */
	71
	72	if (machine_is_rx3715()) {
	73	void *base = phys_to_virt(H1940_SUSPEND_CHECK);
	74	unsigned long ptr;
	75	unsigned long calc = 0;
	76
	77	/* generate check for the bootloader to check on resume */
	78
	79	for (ptr = 0; ptr < 0x40000; ptr += 0x4)
	80	calc += __raw_readl(base+ptr);
	81
	82	__raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
	83	}
	84
26f90818 DA	85	if ( machine_is_aml_m5900() )
	86	s3c2410_gpio_setpin(S3C2410_GPF2, 1);
	87
0033a2f0 BD	88	}
0033a2f0 BD	89
9162b7db	90	static int s3c2410_pm_resume(struct sys_device *dev)
0033a2f0 BD	91	{
	92	unsigned long tmp;
	93
	94	/* unset the return-from-sleep flag, to ensure reset */
	95
	96	tmp = __raw_readl(S3C2410_GSTATUS2);
	97	tmp &= S3C2410_GSTATUS2_OFFRESET;
	98	__raw_writel(tmp, S3C2410_GSTATUS2);
	99
26f90818 DA	100	if ( machine_is_aml_m5900() )
	101	s3c2410_gpio_setpin(S3C2410_GPF2, 0);
	102
0033a2f0 BD	103	return 0;
	104	}
	105
	106	static int s3c2410_pm_add(struct sys_device *dev)
	107	{
	108	pm_cpu_prep = s3c2410_pm_prepare;
	109	pm_cpu_sleep = s3c2410_cpu_suspend;
	110
	111	return 0;
	112	}
	113
0f7d667b	114	#if defined(CONFIG_CPU_S3C2410)
0033a2f0 BD	115	static struct sysdev_driver s3c2410_pm_driver = {
	116	.add = s3c2410_pm_add,
	117	.resume = s3c2410_pm_resume,
	118	};
	119
	120	/* register ourselves */
	121
	122	static int __init s3c2410_pm_drvinit(void)
	123	{
	124	return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_pm_driver);
	125	}
	126
	127	arch_initcall(s3c2410_pm_drvinit);
0f7d667b	128	#endif
0033a2f0	129
0f7d667b	130	#if defined(CONFIG_CPU_S3C2440)
0033a2f0 BD	131	static struct sysdev_driver s3c2440_pm_driver = {
	132	.add = s3c2410_pm_add,
	133	.resume = s3c2410_pm_resume,
	134	};
	135
	136	static int __init s3c2440_pm_drvinit(void)
	137	{
	138	return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_pm_driver);
	139	}
	140
	141	arch_initcall(s3c2440_pm_drvinit);
0f7d667b	142	#endif
0033a2f0	143
0f7d667b	144	#if defined(CONFIG_CPU_S3C2442)
0033a2f0 BD	145	static struct sysdev_driver s3c2442_pm_driver = {
	146	.add = s3c2410_pm_add,
	147	.resume = s3c2410_pm_resume,
	148	};
	149
	150	static int __init s3c2442_pm_drvinit(void)
	151	{
	152	return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_pm_driver);
	153	}
	154
	155	arch_initcall(s3c2442_pm_drvinit);
0f7d667b	156	#endif