ARM: imx: move mx1 support to mach-imx
[deliverable/linux.git] / arch / arm / mach-s3c2410 / s3c2410.c
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1da177e4
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1/* linux/arch/arm/mach-s3c2410/s3c2410.c
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.simtec.co.uk/products/EB2410ITX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
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11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
1ec7269f 19#include <linux/gpio.h>
e425382e 20#include <linux/clk.h>
a341305e 21#include <linux/sysdev.h>
b6d1f542 22#include <linux/serial_core.h>
d052d1be 23#include <linux/platform_device.h>
fced80c7 24#include <linux/io.h>
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25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
a09e64fb 30#include <mach/hardware.h>
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31#include <asm/irq.h>
32
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33#include <plat/cpu-freq.h>
34
a09e64fb 35#include <mach/regs-clock.h>
a2b7ba9c 36#include <plat/regs-serial.h>
1da177e4 37
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38#include <plat/s3c2410.h>
39#include <plat/cpu.h>
40#include <plat/devs.h>
d5120ae7 41#include <plat/clock.h>
e24b864a 42#include <plat/pll.h>
1da177e4 43
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44#include <plat/gpio-core.h>
45#include <plat/gpio-cfg.h>
46#include <plat/gpio-cfg-helpers.h>
47
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48/* Initial IO mappings */
49
50static struct map_desc s3c2410_iodesc[] __initdata = {
1da177e4 51 IODESC_ENT(CLKPWR),
1da177e4 52 IODESC_ENT(TIMER),
62ee914e 53 IODESC_ENT(WATCHDOG),
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54};
55
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56/* our uart devices */
57
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58/* uart registration process */
59
60void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
61{
66a9b49a 62 s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no);
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63}
64
65/* s3c2410_map_io
66 *
67 * register the standard cpu IO areas, and any passed in from the
68 * machine specific initialisation.
69*/
70
74b265d4 71void __init s3c2410_map_io(void)
1da177e4 72{
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73 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up;
74 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up;
75
1da177e4 76 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
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77}
78
e425382e 79void __init_or_cpufreq s3c2410_setup_clocks(void)
1da177e4 80{
e425382e 81 struct clk *xtal_clk;
1da177e4 82 unsigned long tmp;
e425382e 83 unsigned long xtal;
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84 unsigned long fclk;
85 unsigned long hclk;
86 unsigned long pclk;
87
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88 xtal_clk = clk_get(NULL, "xtal");
89 xtal = clk_get_rate(xtal_clk);
90 clk_put(xtal_clk);
91
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92 /* now we've got our machine bits initialised, work out what
93 * clocks we've got */
94
e24b864a 95 fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
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96
97 tmp = __raw_readl(S3C2410_CLKDIVN);
98
99 /* work out clock scalings */
100
101 hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
102 pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
103
104 /* print brieft summary of clocks, etc */
105
106 printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
107 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
108
109 /* initialise the clocks here, to allow other things like the
110 * console to use them
111 */
112
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113 s3c24xx_setup_clocks(fclk, hclk, pclk);
114}
115
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116/* fake ARMCLK for use with cpufreq, etc. */
117
118static struct clk s3c2410_armclk = {
119 .name = "armclk",
120 .parent = &clk_f,
121 .id = -1,
122};
123
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124void __init s3c2410_init_clocks(int xtal)
125{
126 s3c24xx_register_baseclocks(xtal);
127 s3c2410_setup_clocks();
99c13853 128 s3c2410_baseclk_add();
ad787595 129 s3c24xx_register_clock(&s3c2410_armclk);
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130}
131
a341305e 132struct sysdev_class s3c2410_sysclass = {
af5ca3f4 133 .name = "s3c2410-core",
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134};
135
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136/* Note, we would have liked to name this s3c2410-core, but we cannot
137 * register two sysdev_class with the same name.
138 */
139struct sysdev_class s3c2410a_sysclass = {
140 .name = "s3c2410a-core",
141};
142
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143static struct sys_device s3c2410_sysdev = {
144 .cls = &s3c2410_sysclass,
145};
146
147/* need to register class before we actually register the device, and
148 * we also need to ensure that it has been initialised before any of the
6db3eee4 149 * drivers even try to use it (even if not on an s3c2410 based system)
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150 * as a driver which may support both 2410 and 2440 may try and use it.
151*/
152
153static int __init s3c2410_core_init(void)
154{
155 return sysdev_class_register(&s3c2410_sysclass);
156}
157
158core_initcall(s3c2410_core_init);
159
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160static int __init s3c2410a_core_init(void)
161{
162 return sysdev_class_register(&s3c2410a_sysclass);
163}
164
165core_initcall(s3c2410a_core_init);
166
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167int __init s3c2410_init(void)
168{
169 printk("S3C2410: Initialising architecture\n");
170
a341305e 171 return sysdev_register(&s3c2410_sysdev);
1da177e4 172}
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173
174int __init s3c2410a_init(void)
175{
176 s3c2410_sysdev.cls = &s3c2410a_sysclass;
177 return s3c2410_init();
178}
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