[ARM] S3C24XX: Additional include moves
[deliverable/linux.git] / arch / arm / mach-s3c2410 / s3c2410.c
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1/* linux/arch/arm/mach-s3c2410/s3c2410.c
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.simtec.co.uk/products/EB2410ITX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
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11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
a341305e 19#include <linux/sysdev.h>
b6d1f542 20#include <linux/serial_core.h>
d052d1be 21#include <linux/platform_device.h>
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22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/irq.h>
26
a09e64fb 27#include <mach/hardware.h>
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28#include <asm/io.h>
29#include <asm/irq.h>
30
a09e64fb 31#include <mach/regs-clock.h>
a2b7ba9c 32#include <plat/regs-serial.h>
1da177e4 33
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34#include <plat/s3c2410.h>
35#include <plat/cpu.h>
36#include <plat/devs.h>
d5120ae7 37#include <plat/clock.h>
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38
39/* Initial IO mappings */
40
41static struct map_desc s3c2410_iodesc[] __initdata = {
1da177e4 42 IODESC_ENT(CLKPWR),
1da177e4 43 IODESC_ENT(TIMER),
62ee914e 44 IODESC_ENT(WATCHDOG),
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45};
46
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47/* our uart devices */
48
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49/* uart registration process */
50
51void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
52{
66a9b49a 53 s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no);
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54}
55
56/* s3c2410_map_io
57 *
58 * register the standard cpu IO areas, and any passed in from the
59 * machine specific initialisation.
60*/
61
62void __init s3c2410_map_io(struct map_desc *mach_desc, int mach_size)
63{
64 /* register our io-tables */
65
66 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
67 iotable_init(mach_desc, mach_size);
68}
69
70void __init s3c2410_init_clocks(int xtal)
71{
72 unsigned long tmp;
73 unsigned long fclk;
74 unsigned long hclk;
75 unsigned long pclk;
76
77 /* now we've got our machine bits initialised, work out what
78 * clocks we've got */
79
80 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
81
82 tmp = __raw_readl(S3C2410_CLKDIVN);
83
84 /* work out clock scalings */
85
86 hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
87 pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
88
89 /* print brieft summary of clocks, etc */
90
91 printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
92 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
93
94 /* initialise the clocks here, to allow other things like the
95 * console to use them
96 */
97
98 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
99c13853 99 s3c2410_baseclk_add();
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100}
101
a341305e 102struct sysdev_class s3c2410_sysclass = {
af5ca3f4 103 .name = "s3c2410-core",
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104};
105
106static struct sys_device s3c2410_sysdev = {
107 .cls = &s3c2410_sysclass,
108};
109
110/* need to register class before we actually register the device, and
111 * we also need to ensure that it has been initialised before any of the
6db3eee4 112 * drivers even try to use it (even if not on an s3c2410 based system)
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113 * as a driver which may support both 2410 and 2440 may try and use it.
114*/
115
116static int __init s3c2410_core_init(void)
117{
118 return sysdev_class_register(&s3c2410_sysclass);
119}
120
121core_initcall(s3c2410_core_init);
122
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123int __init s3c2410_init(void)
124{
125 printk("S3C2410: Initialising architecture\n");
126
a341305e 127 return sysdev_register(&s3c2410_sysdev);
1da177e4 128}
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