[deliverable/linux.git] / arch / arm / mach-s3c2410 / s3c2440.c

/* linux/arch/arm/mach-s3c2410/s3c2440.c
 *
 * Copyright (c) 2004-2005 Simtec Electronics
 *   Ben Dooks <ben@simtec.co.uk>
 *
 * Samsung S3C2440 Mobile CPU support
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Modifications:
 *	24-Aug-2004 BJD  Start of s3c2440 support
 *	12-Oct-2004 BJD	 Moved clock info out to clock.c
 *	01-Nov-2004 BJD  Fixed clock build code
 *	09-Nov-2004 BJD  Added sysdev for power management
 *	04-Nov-2004 BJD  New serial registration
 *	15-Nov-2004 BJD  Rename the i2c device for the s3c2440
 *	14-Jan-2005 BJD  Moved clock init code into seperate function
 *	14-Jan-2005 BJD  Removed un-used clock bits
*/

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/hardware/clock.h>

#include <asm/arch/regs-clock.h>
#include <asm/arch/regs-serial.h>
#include <asm/arch/regs-gpio.h>
#include <asm/arch/regs-gpioj.h>
#include <asm/arch/regs-dsc.h>

#include "s3c2440.h"
#include "clock.h"
#include "devs.h"
#include "cpu.h"
#include "pm.h"


static struct map_desc s3c2440_iodesc[] __initdata = {
	IODESC_ENT(USBHOST),
	IODESC_ENT(CLKPWR),
	IODESC_ENT(LCD),
	IODESC_ENT(TIMER),
	IODESC_ENT(ADC),
	IODESC_ENT(WATCHDOG),
};

static struct resource s3c_uart0_resource[] = {
	[0] = {
		.start = S3C2410_PA_UART0,
		.end   = S3C2410_PA_UART0 + 0x3fff,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = IRQ_S3CUART_RX0,
		.end   = IRQ_S3CUART_ERR0,
		.flags = IORESOURCE_IRQ,
	}

};

static struct resource s3c_uart1_resource[] = {
	[0] = {
		.start = S3C2410_PA_UART1,
		.end   = S3C2410_PA_UART1 + 0x3fff,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = IRQ_S3CUART_RX1,
		.end   = IRQ_S3CUART_ERR1,
		.flags = IORESOURCE_IRQ,
	}
};

static struct resource s3c_uart2_resource[] = {
	[0] = {
		.start = S3C2410_PA_UART2,
		.end   = S3C2410_PA_UART2 + 0x3fff,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = IRQ_S3CUART_RX2,
		.end   = IRQ_S3CUART_ERR2,
		.flags = IORESOURCE_IRQ,
	}
};

/* our uart devices */

static struct platform_device s3c_uart0 = {
	.name		  = "s3c2440-uart",
	.id		  = 0,
	.num_resources	  = ARRAY_SIZE(s3c_uart0_resource),
	.resource	  = s3c_uart0_resource,
};

static struct platform_device s3c_uart1 = {
	.name		  = "s3c2440-uart",
	.id		  = 1,
	.num_resources	  = ARRAY_SIZE(s3c_uart1_resource),
	.resource	  = s3c_uart1_resource,
};

static struct platform_device s3c_uart2 = {
	.name		  = "s3c2440-uart",
	.id		  = 2,
	.num_resources	  = ARRAY_SIZE(s3c_uart2_resource),
	.resource	  = s3c_uart2_resource,
};

static struct platform_device *uart_devices[] __initdata = {
	&s3c_uart0,
	&s3c_uart1,
	&s3c_uart2
};

/* uart initialisation */

static int __initdata s3c2440_uart_count;

void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{
	struct platform_device *platdev;
	int uart;

	for (uart = 0; uart < no; uart++, cfg++) {
		platdev = uart_devices[cfg->hwport];

		s3c24xx_uart_devs[uart] = platdev;
		platdev->dev.platform_data = cfg;
	}

	s3c2440_uart_count = uart;
}


#ifdef CONFIG_PM

static struct sleep_save s3c2440_sleep[] = {
	SAVE_ITEM(S3C2440_DSC0),
	SAVE_ITEM(S3C2440_DSC1),
	SAVE_ITEM(S3C2440_GPJDAT),
	SAVE_ITEM(S3C2440_GPJCON),
	SAVE_ITEM(S3C2440_GPJUP)
};

static int s3c2440_suspend(struct sys_device *dev, pm_message_t state)
{
	s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
	return 0;
}

static int s3c2440_resume(struct sys_device *dev)
{
	s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
	return 0;
}

#else
#define s3c2440_suspend NULL
#define s3c2440_resume  NULL
#endif

struct sysdev_class s3c2440_sysclass = {
	set_kset_name("s3c2440-core"),
	.suspend	= s3c2440_suspend,
	.resume		= s3c2440_resume
};

static struct sys_device s3c2440_sysdev = {
	.cls		= &s3c2440_sysclass,
};

void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
{
	/* register our io-tables */

	iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
	iotable_init(mach_desc, size);

	/* rename any peripherals used differing from the s3c2410 */

	s3c_device_i2c.name  = "s3c2440-i2c";
	s3c_device_nand.name = "s3c2440-nand";

	/* change irq for watchdog */

	s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
	s3c_device_wdt.resource[1].end   = IRQ_S3C2440_WDT;
}

void __init s3c2440_init_clocks(int xtal)
{
	unsigned long clkdiv;
	unsigned long camdiv;
	unsigned long hclk, fclk, pclk;
	int hdiv = 1;

	/* now we've got our machine bits initialised, work out what
	 * clocks we've got */

	fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;

	clkdiv = __raw_readl(S3C2410_CLKDIVN);
	camdiv = __raw_readl(S3C2440_CAMDIVN);

	/* work out clock scalings */

	switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
	case S3C2440_CLKDIVN_HDIVN_1:
		hdiv = 1;
		break;

	case S3C2440_CLKDIVN_HDIVN_2:
		hdiv = 2;
		break;

	case S3C2440_CLKDIVN_HDIVN_4_8:
		hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
		break;

	case S3C2440_CLKDIVN_HDIVN_3_6:
		hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
		break;
	}

	hclk = fclk / hdiv;
	pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);

	/* print brief summary of clocks, etc */

	printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
	       print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));

	/* initialise the clocks here, to allow other things like the
	 * console to use them, and to add new ones after the initialisation
	 */

	s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
}

/* need to register class before we actually register the device, and
 * we also need to ensure that it has been initialised before any of the
 * drivers even try to use it (even if not on an s3c2440 based system)
 * as a driver which may support both 2410 and 2440 may try and use it.
*/

static int __init s3c2440_core_init(void)
{
	return sysdev_class_register(&s3c2440_sysclass);
}

core_initcall(s3c2440_core_init);

int __init s3c2440_init(void)
{
	int ret;

	printk("S3C2440: Initialising architecture\n");

	ret = sysdev_register(&s3c2440_sysdev);
	if (ret != 0)
		printk(KERN_ERR "failed to register sysdev for s3c2440\n");
	else
		ret = platform_add_devices(s3c24xx_uart_devs, s3c2440_uart_count);

	return ret;
}
Commit	Line	Data
1da177e4 LT	1	/* linux/arch/arm/mach-s3c2410/s3c2440.c
	2	*
	3	* Copyright (c) 2004-2005 Simtec Electronics
	4	* Ben Dooks <ben@simtec.co.uk>
	5	*
	6	* Samsung S3C2440 Mobile CPU support
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	* Modifications:
	13	* 24-Aug-2004 BJD Start of s3c2440 support
	14	* 12-Oct-2004 BJD Moved clock info out to clock.c
	15	* 01-Nov-2004 BJD Fixed clock build code
	16	* 09-Nov-2004 BJD Added sysdev for power management
	17	* 04-Nov-2004 BJD New serial registration
	18	* 15-Nov-2004 BJD Rename the i2c device for the s3c2440
	19	* 14-Jan-2005 BJD Moved clock init code into seperate function
	20	* 14-Jan-2005 BJD Removed un-used clock bits
	21	*/
	22
	23	#include <linux/kernel.h>
	24	#include <linux/types.h>
	25	#include <linux/interrupt.h>
	26	#include <linux/list.h>
	27	#include <linux/timer.h>
	28	#include <linux/init.h>
d052d1be	29	#include <linux/platform_device.h>
1da177e4 LT	30	#include <linux/sysdev.h>
	31
	32	#include <asm/mach/arch.h>
	33	#include <asm/mach/map.h>
	34	#include <asm/mach/irq.h>
	35
	36	#include <asm/hardware.h>
	37	#include <asm/io.h>
	38	#include <asm/irq.h>
	39	#include <asm/hardware/clock.h>
	40
	41	#include <asm/arch/regs-clock.h>
	42	#include <asm/arch/regs-serial.h>
	43	#include <asm/arch/regs-gpio.h>
	44	#include <asm/arch/regs-gpioj.h>
	45	#include <asm/arch/regs-dsc.h>
	46
	47	#include "s3c2440.h"
	48	#include "clock.h"
	49	#include "devs.h"
	50	#include "cpu.h"
	51	#include "pm.h"
	52
	53
	54	static struct map_desc s3c2440_iodesc[] __initdata = {
	55	IODESC_ENT(USBHOST),
	56	IODESC_ENT(CLKPWR),
	57	IODESC_ENT(LCD),
	58	IODESC_ENT(TIMER),
	59	IODESC_ENT(ADC),
	60	IODESC_ENT(WATCHDOG),
	61	};
	62
	63	static struct resource s3c_uart0_resource[] = {
	64	[0] = {
	65	.start = S3C2410_PA_UART0,
	66	.end = S3C2410_PA_UART0 + 0x3fff,
	67	.flags = IORESOURCE_MEM,
	68	},
	69	[1] = {
	70	.start = IRQ_S3CUART_RX0,
	71	.end = IRQ_S3CUART_ERR0,
	72	.flags = IORESOURCE_IRQ,
	73	}
	74
	75	};
	76
	77	static struct resource s3c_uart1_resource[] = {
	78	[0] = {
	79	.start = S3C2410_PA_UART1,
	80	.end = S3C2410_PA_UART1 + 0x3fff,
	81	.flags = IORESOURCE_MEM,
	82	},
	83	[1] = {
	84	.start = IRQ_S3CUART_RX1,
	85	.end = IRQ_S3CUART_ERR1,
	86	.flags = IORESOURCE_IRQ,
	87	}
	88	};
	89
	90	static struct resource s3c_uart2_resource[] = {
	91	[0] = {
	92	.start = S3C2410_PA_UART2,
	93	.end = S3C2410_PA_UART2 + 0x3fff,
94	.flags = IORESOURCE_MEM,
95	},
96	[1] = {
97	.start = IRQ_S3CUART_RX2,
98	.end = IRQ_S3CUART_ERR2,
99	.flags = IORESOURCE_IRQ,
100	}
101	};
102
103	/* our uart devices */
104
105	static struct platform_device s3c_uart0 = {
106	.name = "s3c2440-uart",
107	.id = 0,
108	.num_resources = ARRAY_SIZE(s3c_uart0_resource),
109	.resource = s3c_uart0_resource,
110	};
111
112	static struct platform_device s3c_uart1 = {
113	.name = "s3c2440-uart",
114	.id = 1,
115	.num_resources = ARRAY_SIZE(s3c_uart1_resource),
116	.resource = s3c_uart1_resource,
117	};
118
119	static struct platform_device s3c_uart2 = {
120	.name = "s3c2440-uart",
121	.id = 2,
122	.num_resources = ARRAY_SIZE(s3c_uart2_resource),
123	.resource = s3c_uart2_resource,
124	};
125
126	static struct platform_device *uart_devices[] __initdata = {
127	&s3c_uart0,
128	&s3c_uart1,
129	&s3c_uart2
130	};
131
132	/* uart initialisation */
133
134	static int __initdata s3c2440_uart_count;
135
136	void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
137	{
138	struct platform_device *platdev;
139	int uart;
140
141	for (uart = 0; uart < no; uart++, cfg++) {
142	platdev = uart_devices[cfg->hwport];
143
144	s3c24xx_uart_devs[uart] = platdev;
145	platdev->dev.platform_data = cfg;
146	}
147
148	s3c2440_uart_count = uart;
149	}
150
151
152	#ifdef CONFIG_PM
153
3a8f675c	154	static struct sleep_save s3c2440_sleep[] = {
1da177e4 LT	155	SAVE_ITEM(S3C2440_DSC0),
	156	SAVE_ITEM(S3C2440_DSC1),
	157	SAVE_ITEM(S3C2440_GPJDAT),
	158	SAVE_ITEM(S3C2440_GPJCON),
	159	SAVE_ITEM(S3C2440_GPJUP)
	160	};
	161
	162	static int s3c2440_suspend(struct sys_device *dev, pm_message_t state)
	163	{
	164	s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
	165	return 0;
	166	}
	167
	168	static int s3c2440_resume(struct sys_device *dev)
	169	{
	170	s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
	171	return 0;
	172	}
	173
	174	#else
	175	#define s3c2440_suspend NULL
	176	#define s3c2440_resume NULL
	177	#endif
	178
	179	struct sysdev_class s3c2440_sysclass = {
	180	set_kset_name("s3c2440-core"),
	181	.suspend = s3c2440_suspend,
	182	.resume = s3c2440_resume
	183	};
	184
	185	static struct sys_device s3c2440_sysdev = {
	186	.cls = &s3c2440_sysclass,
	187	};
	188
	189	void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
	190	{
	191	/* register our io-tables */
	192
	193	iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
	194	iotable_init(mach_desc, size);
bfd4e070	195
1da177e4 LT	196	/* rename any peripherals used differing from the s3c2410 */
1da177e4 LT	197
bfd4e070 BD	198	s3c_device_i2c.name = "s3c2440-i2c";
bfd4e070 BD	199	s3c_device_nand.name = "s3c2440-nand";
1da177e4 LT	200
	201	/* change irq for watchdog */
	202
	203	s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
	204	s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT;
	205	}
	206
	207	void __init s3c2440_init_clocks(int xtal)
	208	{
	209	unsigned long clkdiv;
	210	unsigned long camdiv;
	211	unsigned long hclk, fclk, pclk;
	212	int hdiv = 1;
	213
	214	/* now we've got our machine bits initialised, work out what
	215	* clocks we've got */
	216
	217	fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
	218
	219	clkdiv = __raw_readl(S3C2410_CLKDIVN);
	220	camdiv = __raw_readl(S3C2440_CAMDIVN);
	221
	222	/* work out clock scalings */
	223
	224	switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
	225	case S3C2440_CLKDIVN_HDIVN_1:
	226	hdiv = 1;
	227	break;
	228
	229	case S3C2440_CLKDIVN_HDIVN_2:
bfd4e070	230	hdiv = 2;
1da177e4 LT	231	break;
	232
	233	case S3C2440_CLKDIVN_HDIVN_4_8:
	234	hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
	235	break;
	236
	237	case S3C2440_CLKDIVN_HDIVN_3_6:
	238	hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
	239	break;
	240	}
	241
	242	hclk = fclk / hdiv;
	243	pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
	244
	245	/* print brief summary of clocks, etc */
	246
	247	printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
	248	print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
	249
	250	/* initialise the clocks here, to allow other things like the
	251	* console to use them, and to add new ones after the initialisation
	252	*/
	253
	254	s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
	255	}
	256
	257	/* need to register class before we actually register the device, and
	258	* we also need to ensure that it has been initialised before any of the
	259	* drivers even try to use it (even if not on an s3c2440 based system)
	260	* as a driver which may support both 2410 and 2440 may try and use it.
	261	*/
	262
3a8f675c	263	static int __init s3c2440_core_init(void)
1da177e4 LT	264	{
	265	return sysdev_class_register(&s3c2440_sysclass);
	266	}
	267
	268	core_initcall(s3c2440_core_init);
	269
	270	int __init s3c2440_init(void)
	271	{
	272	int ret;
	273
	274	printk("S3C2440: Initialising architecture\n");
	275
	276	ret = sysdev_register(&s3c2440_sysdev);
	277	if (ret != 0)
	278	printk(KERN_ERR "failed to register sysdev for s3c2440\n");
	279	else
	280	ret = platform_add_devices(s3c24xx_uart_devs, s3c2440_uart_count);
	281
	282	return ret;
	283	}