[deliverable/linux.git] / arch / arm / mach-s3c2412 / dma.c

/* linux/arch/arm/mach-s3c2412/dma.c
 *
 * Copyright (c) 2006 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * S3C2412 DMA selection
 *
 * http://armlinux.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sysdev.h>
#include <linux/serial_core.h>

#include <asm/dma.h>
#include <mach/dma.h>
#include <asm/io.h>

#include <plat/dma.h>
#include <plat/cpu.h>

#include <plat/regs-serial.h>
#include <mach/regs-gpio.h>
#include <asm/plat-s3c/regs-ac97.h>
#include <mach/regs-mem.h>
#include <mach/regs-lcd.h>
#include <mach/regs-sdi.h>
#include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
#include <asm/plat-s3c24xx/regs-iis.h>
#include <asm/plat-s3c24xx/regs-spi.h>

#define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }

static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
	[DMACH_XD0] = {
		.name		= "xdreq0",
		.channels	= MAP(S3C2412_DMAREQSEL_XDREQ0),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_XDREQ0),
	},
	[DMACH_XD1] = {
		.name		= "xdreq1",
		.channels	= MAP(S3C2412_DMAREQSEL_XDREQ1),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_XDREQ1),
	},
	[DMACH_SDI] = {
		.name		= "sdi",
		.channels	= MAP(S3C2412_DMAREQSEL_SDI),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_SDI),
		.hw_addr.to	= S3C2410_PA_SDI + S3C2410_SDIDATA,
		.hw_addr.from	= S3C2410_PA_SDI + S3C2410_SDIDATA,
	},
	[DMACH_SPI0] = {
		.name		= "spi0",
		.channels	= MAP(S3C2412_DMAREQSEL_SPI0TX),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_SPI0RX),
		.hw_addr.to	= S3C2410_PA_SPI + S3C2410_SPTDAT,
		.hw_addr.from	= S3C2410_PA_SPI + S3C2410_SPRDAT,
	},
	[DMACH_SPI1] = {
		.name		= "spi1",
		.channels	= MAP(S3C2412_DMAREQSEL_SPI1TX),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_SPI1RX),
		.hw_addr.to	= S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT,
		.hw_addr.from	= S3C2410_PA_SPI + S3C2412_SPI1  + S3C2410_SPRDAT,
	},
	[DMACH_UART0] = {
		.name		= "uart0",
		.channels	= MAP(S3C2412_DMAREQSEL_UART0_0),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_UART0_0),
		.hw_addr.to	= S3C2410_PA_UART0 + S3C2410_UTXH,
		.hw_addr.from	= S3C2410_PA_UART0 + S3C2410_URXH,
	},
	[DMACH_UART1] = {
		.name		= "uart1",
		.channels	= MAP(S3C2412_DMAREQSEL_UART1_0),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_UART1_0),
		.hw_addr.to	= S3C2410_PA_UART1 + S3C2410_UTXH,
		.hw_addr.from	= S3C2410_PA_UART1 + S3C2410_URXH,
	},
      	[DMACH_UART2] = {
		.name		= "uart2",
		.channels	= MAP(S3C2412_DMAREQSEL_UART2_0),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_UART2_0),
		.hw_addr.to	= S3C2410_PA_UART2 + S3C2410_UTXH,
		.hw_addr.from	= S3C2410_PA_UART2 + S3C2410_URXH,
	},
	[DMACH_UART0_SRC2] = {
		.name		= "uart0",
		.channels	= MAP(S3C2412_DMAREQSEL_UART0_1),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_UART0_1),
		.hw_addr.to	= S3C2410_PA_UART0 + S3C2410_UTXH,
		.hw_addr.from	= S3C2410_PA_UART0 + S3C2410_URXH,
	},
	[DMACH_UART1_SRC2] = {
		.name		= "uart1",
		.channels	= MAP(S3C2412_DMAREQSEL_UART1_1),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_UART1_1),
		.hw_addr.to	= S3C2410_PA_UART1 + S3C2410_UTXH,
		.hw_addr.from	= S3C2410_PA_UART1 + S3C2410_URXH,
	},
      	[DMACH_UART2_SRC2] = {
		.name		= "uart2",
		.channels	= MAP(S3C2412_DMAREQSEL_UART2_1),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_UART2_1),
		.hw_addr.to	= S3C2410_PA_UART2 + S3C2410_UTXH,
		.hw_addr.from	= S3C2410_PA_UART2 + S3C2410_URXH,
	},
	[DMACH_TIMER] = {
		.name		= "timer",
		.channels	= MAP(S3C2412_DMAREQSEL_TIMER),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_TIMER),
	},
	[DMACH_I2S_IN] = {
		.name		= "i2s-sdi",
		.channels	= MAP(S3C2412_DMAREQSEL_I2SRX),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_I2SRX),
		.hw_addr.from	= S3C2410_PA_IIS + S3C2412_IISRXD,
	},
	[DMACH_I2S_OUT] = {
		.name		= "i2s-sdo",
		.channels	= MAP(S3C2412_DMAREQSEL_I2STX),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_I2STX),
		.hw_addr.to	= S3C2410_PA_IIS + S3C2412_IISTXD,
	},
	[DMACH_USB_EP1] = {
		.name		= "usb-ep1",
		.channels	= MAP(S3C2412_DMAREQSEL_USBEP1),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_USBEP1),
	},
	[DMACH_USB_EP2] = {
		.name		= "usb-ep2",
		.channels	= MAP(S3C2412_DMAREQSEL_USBEP2),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_USBEP2),
	},
	[DMACH_USB_EP3] = {
		.name		= "usb-ep3",
		.channels	= MAP(S3C2412_DMAREQSEL_USBEP3),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_USBEP3),
	},
	[DMACH_USB_EP4] = {
		.name		= "usb-ep4",
		.channels	= MAP(S3C2412_DMAREQSEL_USBEP4),
		.channels_rx	= MAP(S3C2412_DMAREQSEL_USBEP4),
	},
};

static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
				  struct s3c24xx_dma_map *map,
				  enum s3c2410_dmasrc dir)
{
	unsigned long chsel;

	if (dir == S3C2410_DMASRC_HW)
		chsel = map->channels_rx[0];
	else
		chsel = map->channels[0];

	chsel &= ~DMA_CH_VALID;
	chsel |= S3C2412_DMAREQSEL_HW;

	writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
}

static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
			       struct s3c24xx_dma_map *map)
{
	s3c2412_dma_direction(chan, map, chan->source);
}

static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
	.select		= s3c2412_dma_select,
	.direction	= s3c2412_dma_direction,
	.dcon_mask	= 0,
	.map		= s3c2412_dma_mappings,
	.map_size	= ARRAY_SIZE(s3c2412_dma_mappings),
};

static int __init s3c2412_dma_add(struct sys_device *sysdev)
{
	s3c2410_dma_init();
	return s3c24xx_dma_init_map(&s3c2412_dma_sel);
}

static struct sysdev_driver s3c2412_dma_driver = {
	.add	= s3c2412_dma_add,
};

static int __init s3c2412_dma_init(void)
{
	return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_dma_driver);
}

arch_initcall(s3c2412_dma_init);
Commit	Line	Data
a21765a7	1	/* linux/arch/arm/mach-s3c2412/dma.c
34348012	2	*
c16f7bd8	3	* Copyright (c) 2006 Simtec Electronics
34348012 BD	4	* Ben Dooks <ben@simtec.co.uk>
	5	*
	6	* S3C2412 DMA selection
	7	*
	8	* http://armlinux.simtec.co.uk/
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/sysdev.h>
b6d1f542	18	#include <linux/serial_core.h>
34348012 BD	19
34348012 BD	20	#include <asm/dma.h>
a09e64fb	21	#include <mach/dma.h>
34348012 BD	22	#include <asm/io.h>
34348012 BD	23
d5120ae7	24	#include <plat/dma.h>
a2b7ba9c	25	#include <plat/cpu.h>
34348012	26
a2b7ba9c	27	#include <plat/regs-serial.h>
a09e64fb	28	#include <mach/regs-gpio.h>
06cfa556	29	#include <asm/plat-s3c/regs-ac97.h>
a09e64fb RK	30	#include <mach/regs-mem.h>
	31	#include <mach/regs-lcd.h>
	32	#include <mach/regs-sdi.h>
d45c30cb	33	#include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
06cfa556 BD	34	#include <asm/plat-s3c24xx/regs-iis.h>
06cfa556 BD	35	#include <asm/plat-s3c24xx/regs-spi.h>
34348012 BD	36
	37	#define MAP(x) { (x)\| DMA_CH_VALID, (x)\| DMA_CH_VALID, (x)\| DMA_CH_VALID, (x)\| DMA_CH_VALID }
	38
	39	static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
	40	[DMACH_XD0] = {
	41	.name = "xdreq0",
	42	.channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
c6709e8e	43	.channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0),
34348012 BD	44	},
	45	[DMACH_XD1] = {
	46	.name = "xdreq1",
	47	.channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
c6709e8e	48	.channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1),
34348012 BD	49	},
	50	[DMACH_SDI] = {
	51	.name = "sdi",
	52	.channels = MAP(S3C2412_DMAREQSEL_SDI),
c6709e8e	53	.channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
d45c30cb BD	54	.hw_addr.to = S3C2410_PA_SDI + S3C2410_SDIDATA,
d45c30cb BD	55	.hw_addr.from = S3C2410_PA_SDI + S3C2410_SDIDATA,
34348012 BD	56	},
	57	[DMACH_SPI0] = {
	58	.name = "spi0",
	59	.channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
c6709e8e	60	.channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
34348012 BD	61	.hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
	62	.hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
	63	},
	64	[DMACH_SPI1] = {
	65	.name = "spi1",
	66	.channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
c6709e8e	67	.channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
e903382c SSP	68	.hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT,
e903382c SSP	69	.hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT,
34348012 BD	70	},
	71	[DMACH_UART0] = {
	72	.name = "uart0",
	73	.channels = MAP(S3C2412_DMAREQSEL_UART0_0),
c6709e8e	74	.channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
34348012 BD	75	.hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
	76	.hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
	77	},
	78	[DMACH_UART1] = {
	79	.name = "uart1",
	80	.channels = MAP(S3C2412_DMAREQSEL_UART1_0),
c6709e8e	81	.channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
34348012 BD	82	.hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
	83	.hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
	84	},
	85	[DMACH_UART2] = {
	86	.name = "uart2",
	87	.channels = MAP(S3C2412_DMAREQSEL_UART2_0),
c6709e8e	88	.channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
34348012 BD	89	.hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
	90	.hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
	91	},
	92	[DMACH_UART0_SRC2] = {
	93	.name = "uart0",
	94	.channels = MAP(S3C2412_DMAREQSEL_UART0_1),
c6709e8e	95	.channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
34348012 BD	96	.hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
	97	.hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
	98	},
	99	[DMACH_UART1_SRC2] = {
	100	.name = "uart1",
	101	.channels = MAP(S3C2412_DMAREQSEL_UART1_1),
c6709e8e	102	.channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
34348012 BD	103	.hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
	104	.hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
	105	},
	106	[DMACH_UART2_SRC2] = {
	107	.name = "uart2",
	108	.channels = MAP(S3C2412_DMAREQSEL_UART2_1),
c6709e8e	109	.channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
34348012 BD	110	.hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
	111	.hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
	112	},
	113	[DMACH_TIMER] = {
	114	.name = "timer",
	115	.channels = MAP(S3C2412_DMAREQSEL_TIMER),
c6709e8e	116	.channels_rx = MAP(S3C2412_DMAREQSEL_TIMER),
34348012 BD	117	},
	118	[DMACH_I2S_IN] = {
	119	.name = "i2s-sdi",
	120	.channels = MAP(S3C2412_DMAREQSEL_I2SRX),
c6709e8e	121	.channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
d45c30cb	122	.hw_addr.from = S3C2410_PA_IIS + S3C2412_IISRXD,
34348012 BD	123	},
	124	[DMACH_I2S_OUT] = {
	125	.name = "i2s-sdo",
	126	.channels = MAP(S3C2412_DMAREQSEL_I2STX),
c6709e8e	127	.channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
d45c30cb	128	.hw_addr.to = S3C2410_PA_IIS + S3C2412_IISTXD,
34348012 BD	129	},
	130	[DMACH_USB_EP1] = {
	131	.name = "usb-ep1",
	132	.channels = MAP(S3C2412_DMAREQSEL_USBEP1),
c6709e8e	133	.channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1),
34348012 BD	134	},
	135	[DMACH_USB_EP2] = {
	136	.name = "usb-ep2",
	137	.channels = MAP(S3C2412_DMAREQSEL_USBEP2),
c6709e8e	138	.channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2),
34348012 BD	139	},
	140	[DMACH_USB_EP3] = {
	141	.name = "usb-ep3",
	142	.channels = MAP(S3C2412_DMAREQSEL_USBEP3),
c6709e8e	143	.channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3),
34348012 BD	144	},
	145	[DMACH_USB_EP4] = {
	146	.name = "usb-ep4",
	147	.channels = MAP(S3C2412_DMAREQSEL_USBEP4),
c6709e8e	148	.channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4),
34348012 BD	149	},
	150	};
	151
c6709e8e BD	152	static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
	153	struct s3c24xx_dma_map *map,
	154	enum s3c2410_dmasrc dir)
	155	{
	156	unsigned long chsel;
	157
	158	if (dir == S3C2410_DMASRC_HW)
	159	chsel = map->channels_rx[0];
	160	else
	161	chsel = map->channels[0];
	162
	163	chsel &= ~DMA_CH_VALID;
	164	chsel \|= S3C2412_DMAREQSEL_HW;
	165
	166	writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
	167	}
	168
34348012 BD	169	static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
	170	struct s3c24xx_dma_map *map)
	171	{
c6709e8e	172	s3c2412_dma_direction(chan, map, chan->source);
34348012 BD	173	}
	174
	175	static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
	176	.select = s3c2412_dma_select,
c6709e8e	177	.direction = s3c2412_dma_direction,
34348012 BD	178	.dcon_mask = 0,
	179	.map = s3c2412_dma_mappings,
	180	.map_size = ARRAY_SIZE(s3c2412_dma_mappings),
	181	};
	182
f2c10d6c	183	static int __init s3c2412_dma_add(struct sys_device *sysdev)
34348012	184	{
48adbcf3	185	s3c2410_dma_init();
34348012 BD	186	return s3c24xx_dma_init_map(&s3c2412_dma_sel);
	187	}
	188
	189	static struct sysdev_driver s3c2412_dma_driver = {
	190	.add = s3c2412_dma_add,
	191	};
	192
	193	static int __init s3c2412_dma_init(void)
	194	{
	195	return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_dma_driver);
	196	}
	197
	198	arch_initcall(s3c2412_dma_init);