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a21765a7 | 1 | /* linux/arch/arm/mach-s3c2412/mach-vstms.c |
b6c440a9 BD |
2 | * |
3 | * (C) 2006 Thomas Gleixner <tglx@linutronix.de> | |
4 | * | |
5 | * Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/types.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/list.h> | |
16 | #include <linux/timer.h> | |
17 | #include <linux/init.h> | |
b6d1f542 | 18 | #include <linux/serial_core.h> |
b6c440a9 | 19 | #include <linux/platform_device.h> |
fced80c7 | 20 | #include <linux/io.h> |
b6c440a9 BD |
21 | #include <linux/mtd/mtd.h> |
22 | #include <linux/mtd/nand.h> | |
23 | #include <linux/mtd/nand_ecc.h> | |
24 | #include <linux/mtd/partitions.h> | |
25 | ||
26 | #include <asm/mach/arch.h> | |
27 | #include <asm/mach/map.h> | |
28 | #include <asm/mach/irq.h> | |
29 | ||
a09e64fb | 30 | #include <mach/hardware.h> |
b6c440a9 | 31 | #include <asm/setup.h> |
b6c440a9 BD |
32 | #include <asm/irq.h> |
33 | #include <asm/mach-types.h> | |
34 | ||
a2b7ba9c | 35 | #include <plat/regs-serial.h> |
a09e64fb RK |
36 | #include <mach/regs-gpio.h> |
37 | #include <mach/regs-lcd.h> | |
b6c440a9 | 38 | |
a09e64fb RK |
39 | #include <mach/idle.h> |
40 | #include <mach/fb.h> | |
b6c440a9 | 41 | |
3e1b776c | 42 | #include <plat/iic.h> |
7926b5a3 | 43 | #include <plat/nand.h> |
b6c440a9 | 44 | |
a2b7ba9c | 45 | #include <plat/s3c2410.h> |
d5120ae7 BD |
46 | #include <plat/s3c2412.h> |
47 | #include <plat/clock.h> | |
a2b7ba9c BD |
48 | #include <plat/devs.h> |
49 | #include <plat/cpu.h> | |
b6c440a9 BD |
50 | |
51 | ||
52 | static struct map_desc vstms_iodesc[] __initdata = { | |
53 | }; | |
54 | ||
55 | static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = { | |
56 | [0] = { | |
57 | .hwport = 0, | |
58 | .flags = 0, | |
59 | .ucon = 0x3c5, | |
60 | .ulcon = 0x03, | |
61 | .ufcon = 0x51, | |
62 | }, | |
63 | [1] = { | |
64 | .hwport = 1, | |
65 | .flags = 0, | |
66 | .ucon = 0x3c5, | |
67 | .ulcon = 0x03, | |
68 | .ufcon = 0x51, | |
69 | }, | |
70 | [2] = { | |
71 | .hwport = 2, | |
72 | .flags = 0, | |
73 | .ucon = 0x3c5, | |
74 | .ulcon = 0x03, | |
75 | .ufcon = 0x51, | |
76 | } | |
77 | }; | |
78 | ||
2a3a1804 | 79 | static struct mtd_partition __initdata vstms_nand_part[] = { |
b6c440a9 BD |
80 | [0] = { |
81 | .name = "Boot Agent", | |
82 | .size = 0x7C000, | |
83 | .offset = 0, | |
84 | }, | |
85 | [1] = { | |
86 | .name = "UBoot Config", | |
87 | .offset = 0x7C000, | |
88 | .size = 0x4000, | |
89 | }, | |
90 | [2] = { | |
91 | .name = "Kernel", | |
92 | .offset = 0x80000, | |
93 | .size = 0x200000, | |
94 | }, | |
95 | [3] = { | |
96 | .name = "RFS", | |
97 | .offset = 0x280000, | |
98 | .size = 0x3d80000, | |
99 | }, | |
100 | }; | |
101 | ||
2a3a1804 | 102 | static struct s3c2410_nand_set __initdata vstms_nand_sets[] = { |
b6c440a9 BD |
103 | [0] = { |
104 | .name = "NAND", | |
105 | .nr_chips = 1, | |
106 | .nr_partitions = ARRAY_SIZE(vstms_nand_part), | |
107 | .partitions = vstms_nand_part, | |
108 | }, | |
109 | }; | |
110 | ||
111 | /* choose a set of timings which should suit most 512Mbit | |
112 | * chips and beyond. | |
113 | */ | |
114 | ||
2a3a1804 | 115 | static struct s3c2410_platform_nand __initdata vstms_nand_info = { |
b6c440a9 BD |
116 | .tacls = 20, |
117 | .twrph0 = 60, | |
118 | .twrph1 = 20, | |
119 | .nr_sets = ARRAY_SIZE(vstms_nand_sets), | |
120 | .sets = vstms_nand_sets, | |
121 | }; | |
122 | ||
123 | static struct platform_device *vstms_devices[] __initdata = { | |
b813248c | 124 | &s3c_device_ohci, |
b6c440a9 | 125 | &s3c_device_wdt, |
3e1b776c | 126 | &s3c_device_i2c0, |
b6c440a9 BD |
127 | &s3c_device_iis, |
128 | &s3c_device_rtc, | |
129 | &s3c_device_nand, | |
130 | }; | |
131 | ||
0744a3ee RK |
132 | static void __init vstms_fixup(struct tag *tags, char **cmdline, |
133 | struct meminfo *mi) | |
b6c440a9 BD |
134 | { |
135 | if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) { | |
136 | mi->nr_banks=1; | |
137 | mi->bank[0].start = 0x30000000; | |
138 | mi->bank[0].size = SZ_64M; | |
b6c440a9 BD |
139 | } |
140 | } | |
141 | ||
142 | static void __init vstms_map_io(void) | |
143 | { | |
b6c440a9 BD |
144 | s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc)); |
145 | s3c24xx_init_clocks(12000000); | |
146 | s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs)); | |
57e5171c BD |
147 | } |
148 | ||
149 | static void __init vstms_init(void) | |
150 | { | |
3e1b776c | 151 | s3c_i2c0_set_platdata(NULL); |
2a3a1804 BD |
152 | s3c_nand_set_platdata(&vstms_nand_info); |
153 | ||
57e5171c | 154 | platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices)); |
b6c440a9 BD |
155 | } |
156 | ||
157 | MACHINE_START(VSTMS, "VSTMS") | |
69d50710 | 158 | .atag_offset = 0x100, |
b6c440a9 BD |
159 | |
160 | .fixup = vstms_fixup, | |
161 | .init_irq = s3c24xx_init_irq, | |
57e5171c | 162 | .init_machine = vstms_init, |
b6c440a9 BD |
163 | .map_io = vstms_map_io, |
164 | .timer = &s3c24xx_timer, | |
165 | MACHINE_END |