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1da177e4 LT |
1 | /* linux/arch/arm/mach-s3c2410/bast-irq.c |
2 | * | |
ccae941e | 3 | * Copyright 2003-2005 Simtec Electronics |
1da177e4 LT |
4 | * Ben Dooks <ben@simtec.co.uk> |
5 | * | |
6 | * http://www.simtec.co.uk/products/EB2410ITX/ | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
bafa49cc | 21 | */ |
1da177e4 LT |
22 | |
23 | ||
24 | #include <linux/init.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/ioport.h> | |
edbaa603 | 27 | #include <linux/device.h> |
fced80c7 | 28 | #include <linux/io.h> |
1da177e4 | 29 | |
1da177e4 | 30 | #include <asm/irq.h> |
bbd7e5e1 | 31 | #include <asm/mach-types.h> |
1da177e4 | 32 | #include <asm/mach/irq.h> |
bafa49cc | 33 | |
bbd7e5e1 | 34 | #include <mach/hardware.h> |
a09e64fb | 35 | #include <mach/regs-irq.h> |
bafa49cc | 36 | |
bbd7e5e1 | 37 | #include "bast.h" |
1da177e4 LT |
38 | |
39 | #define irqdbf(x...) | |
40 | #define irqdbf2(x...) | |
41 | ||
1da177e4 LT |
42 | /* handle PC104 ISA interrupts from the system CPLD */ |
43 | ||
44 | /* table of ISA irq nos to the relevant mask... zero means | |
45 | * the irq is not implemented | |
46 | */ | |
47 | static unsigned char bast_pc104_irqmasks[] = { | |
48 | 0, /* 0 */ | |
49 | 0, /* 1 */ | |
50 | 0, /* 2 */ | |
51 | 1, /* 3 */ | |
52 | 0, /* 4 */ | |
53 | 2, /* 5 */ | |
54 | 0, /* 6 */ | |
55 | 4, /* 7 */ | |
56 | 0, /* 8 */ | |
57 | 0, /* 9 */ | |
58 | 8, /* 10 */ | |
59 | 0, /* 11 */ | |
60 | 0, /* 12 */ | |
61 | 0, /* 13 */ | |
62 | 0, /* 14 */ | |
63 | 0, /* 15 */ | |
64 | }; | |
65 | ||
66 | static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 }; | |
67 | ||
68 | static void | |
57436c2d | 69 | bast_pc104_mask(struct irq_data *data) |
1da177e4 LT |
70 | { |
71 | unsigned long temp; | |
72 | ||
73 | temp = __raw_readb(BAST_VA_PC104_IRQMASK); | |
57436c2d | 74 | temp &= ~bast_pc104_irqmasks[data->irq]; |
1da177e4 | 75 | __raw_writeb(temp, BAST_VA_PC104_IRQMASK); |
1da177e4 LT |
76 | } |
77 | ||
78 | static void | |
57436c2d | 79 | bast_pc104_maskack(struct irq_data *data) |
1da177e4 | 80 | { |
bbd7e5e1 | 81 | struct irq_desc *desc = irq_desc + BAST_IRQ_ISA; |
bafa49cc | 82 | |
57436c2d LB |
83 | bast_pc104_mask(data); |
84 | desc->irq_data.chip->irq_ack(&desc->irq_data); | |
1da177e4 LT |
85 | } |
86 | ||
87 | static void | |
57436c2d | 88 | bast_pc104_unmask(struct irq_data *data) |
1da177e4 LT |
89 | { |
90 | unsigned long temp; | |
91 | ||
92 | temp = __raw_readb(BAST_VA_PC104_IRQMASK); | |
57436c2d | 93 | temp |= bast_pc104_irqmasks[data->irq]; |
1da177e4 | 94 | __raw_writeb(temp, BAST_VA_PC104_IRQMASK); |
1da177e4 LT |
95 | } |
96 | ||
10dd5ce2 | 97 | static struct irq_chip bast_pc104_chip = { |
57436c2d LB |
98 | .irq_mask = bast_pc104_mask, |
99 | .irq_unmask = bast_pc104_unmask, | |
100 | .irq_ack = bast_pc104_maskack | |
1da177e4 LT |
101 | }; |
102 | ||
bd0b9ac4 | 103 | static void bast_irq_pc104_demux(struct irq_desc *desc) |
1da177e4 LT |
104 | { |
105 | unsigned int stat; | |
106 | unsigned int irqno; | |
107 | int i; | |
108 | ||
109 | stat = __raw_readb(BAST_VA_PC104_IRQREQ) & 0xf; | |
110 | ||
bafa49cc BD |
111 | if (unlikely(stat == 0)) { |
112 | /* ack if we get an irq with nothing (ie, startup) */ | |
113 | ||
bbd7e5e1 | 114 | desc = irq_desc + BAST_IRQ_ISA; |
57436c2d | 115 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
bafa49cc BD |
116 | } else { |
117 | /* handle the IRQ */ | |
118 | ||
119 | for (i = 0; stat != 0; i++, stat >>= 1) { | |
120 | if (stat & 1) { | |
121 | irqno = bast_pc104_irqs[i]; | |
d8aa0251 | 122 | generic_handle_irq(irqno); |
bafa49cc | 123 | } |
1da177e4 | 124 | } |
bafa49cc BD |
125 | } |
126 | } | |
1da177e4 | 127 | |
bafa49cc BD |
128 | static __init int bast_irq_init(void) |
129 | { | |
130 | unsigned int i; | |
131 | ||
132 | if (machine_is_bast()) { | |
50f430e3 | 133 | printk(KERN_INFO "BAST PC104 IRQ routing, Copyright 2005 Simtec Electronics\n"); |
bafa49cc BD |
134 | |
135 | /* zap all the IRQs */ | |
136 | ||
137 | __raw_writeb(0x0, BAST_VA_PC104_IRQMASK); | |
138 | ||
bbd7e5e1 | 139 | irq_set_chained_handler(BAST_IRQ_ISA, bast_irq_pc104_demux); |
bafa49cc | 140 | |
544b46de | 141 | /* register our IRQs */ |
bafa49cc BD |
142 | |
143 | for (i = 0; i < 4; i++) { | |
144 | unsigned int irqno = bast_pc104_irqs[i]; | |
145 | ||
f38c02f3 TG |
146 | irq_set_chip_and_handler(irqno, &bast_pc104_chip, |
147 | handle_level_irq); | |
e8d36d5d | 148 | irq_clear_status_flags(irqno, IRQ_NOREQUEST); |
bafa49cc | 149 | } |
1da177e4 | 150 | } |
bafa49cc BD |
151 | |
152 | return 0; | |
1da177e4 | 153 | } |
bafa49cc BD |
154 | |
155 | arch_initcall(bast_irq_init); |