ARM: S3C24XX: make bast-cpld.h, bast-irq.h and bast-map.h local
[deliverable/linux.git] / arch / arm / mach-s3c24xx / bast-irq.c
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1da177e4
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1/* linux/arch/arm/mach-s3c2410/bast-irq.c
2 *
ccae941e 3 * Copyright 2003-2005 Simtec Electronics
1da177e4
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4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.simtec.co.uk/products/EB2410ITX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
bafa49cc 21*/
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22
23
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/ioport.h>
edbaa603 27#include <linux/device.h>
fced80c7 28#include <linux/io.h>
1da177e4 29
1da177e4 30#include <asm/irq.h>
bbd7e5e1 31#include <asm/mach-types.h>
1da177e4 32#include <asm/mach/irq.h>
bafa49cc 33
bbd7e5e1 34#include <mach/hardware.h>
a09e64fb 35#include <mach/regs-irq.h>
bafa49cc 36
a2b7ba9c 37#include <plat/irq.h>
1da177e4 38
bbd7e5e1 39#include "bast.h"
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40
41#define irqdbf(x...)
42#define irqdbf2(x...)
43
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44/* handle PC104 ISA interrupts from the system CPLD */
45
46/* table of ISA irq nos to the relevant mask... zero means
47 * the irq is not implemented
48*/
49static unsigned char bast_pc104_irqmasks[] = {
50 0, /* 0 */
51 0, /* 1 */
52 0, /* 2 */
53 1, /* 3 */
54 0, /* 4 */
55 2, /* 5 */
56 0, /* 6 */
57 4, /* 7 */
58 0, /* 8 */
59 0, /* 9 */
60 8, /* 10 */
61 0, /* 11 */
62 0, /* 12 */
63 0, /* 13 */
64 0, /* 14 */
65 0, /* 15 */
66};
67
68static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 };
69
70static void
57436c2d 71bast_pc104_mask(struct irq_data *data)
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72{
73 unsigned long temp;
74
75 temp = __raw_readb(BAST_VA_PC104_IRQMASK);
57436c2d 76 temp &= ~bast_pc104_irqmasks[data->irq];
1da177e4 77 __raw_writeb(temp, BAST_VA_PC104_IRQMASK);
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78}
79
80static void
57436c2d 81bast_pc104_maskack(struct irq_data *data)
1da177e4 82{
bbd7e5e1 83 struct irq_desc *desc = irq_desc + BAST_IRQ_ISA;
bafa49cc 84
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LB
85 bast_pc104_mask(data);
86 desc->irq_data.chip->irq_ack(&desc->irq_data);
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87}
88
89static void
57436c2d 90bast_pc104_unmask(struct irq_data *data)
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91{
92 unsigned long temp;
93
94 temp = __raw_readb(BAST_VA_PC104_IRQMASK);
57436c2d 95 temp |= bast_pc104_irqmasks[data->irq];
1da177e4 96 __raw_writeb(temp, BAST_VA_PC104_IRQMASK);
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97}
98
10dd5ce2 99static struct irq_chip bast_pc104_chip = {
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100 .irq_mask = bast_pc104_mask,
101 .irq_unmask = bast_pc104_unmask,
102 .irq_ack = bast_pc104_maskack
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103};
104
105static void
106bast_irq_pc104_demux(unsigned int irq,
10dd5ce2 107 struct irq_desc *desc)
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108{
109 unsigned int stat;
110 unsigned int irqno;
111 int i;
112
113 stat = __raw_readb(BAST_VA_PC104_IRQREQ) & 0xf;
114
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115 if (unlikely(stat == 0)) {
116 /* ack if we get an irq with nothing (ie, startup) */
117
bbd7e5e1 118 desc = irq_desc + BAST_IRQ_ISA;
57436c2d 119 desc->irq_data.chip->irq_ack(&desc->irq_data);
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120 } else {
121 /* handle the IRQ */
122
123 for (i = 0; stat != 0; i++, stat >>= 1) {
124 if (stat & 1) {
125 irqno = bast_pc104_irqs[i];
d8aa0251 126 generic_handle_irq(irqno);
bafa49cc 127 }
1da177e4 128 }
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129 }
130}
1da177e4 131
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132static __init int bast_irq_init(void)
133{
134 unsigned int i;
135
136 if (machine_is_bast()) {
50f430e3 137 printk(KERN_INFO "BAST PC104 IRQ routing, Copyright 2005 Simtec Electronics\n");
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138
139 /* zap all the IRQs */
140
141 __raw_writeb(0x0, BAST_VA_PC104_IRQMASK);
142
bbd7e5e1 143 irq_set_chained_handler(BAST_IRQ_ISA, bast_irq_pc104_demux);
bafa49cc 144
544b46de 145 /* register our IRQs */
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146
147 for (i = 0; i < 4; i++) {
148 unsigned int irqno = bast_pc104_irqs[i];
149
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150 irq_set_chip_and_handler(irqno, &bast_pc104_chip,
151 handle_level_irq);
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152 set_irq_flags(irqno, IRQF_VALID);
153 }
1da177e4 154 }
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155
156 return 0;
1da177e4 157}
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158
159arch_initcall(bast_irq_init);
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