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1 | /* arch/arm/mach-s3c2410/include/mach/gpio-nrs.h |
2 | * | |
3 | * Copyright (c) 2008 Simtec Electronics | |
4 | * http://armlinux.simtec.co.uk/ | |
5 | * Ben Dooks <ben@simtec.co.uk> | |
6 | * | |
7 | * S3C2410 - GPIO bank numbering | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
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14 | #ifndef __MACH_GPIONRS_H |
15 | #define __MACH_GPIONRS_H | |
16 | ||
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17 | #define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) |
18 | ||
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19 | #define S3C2410_GPIO_BANKG (32*6) |
20 | #define S3C2410_GPIO_BANKH (32*7) | |
75cbcff3 | 21 | |
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22 | /* GPIO sizes for various SoCs: |
23 | * | |
24 | * 2442 | |
25 | * 2410 2412 2440 2443 2416 | |
26 | * ---- ---- ---- ---- ---- | |
27 | * A 23 22 25 16 25 | |
28 | * B 11 11 11 11 9 | |
29 | * C 16 15 16 16 16 | |
30 | * D 16 16 16 16 16 | |
31 | * E 16 16 16 16 16 | |
32 | * F 8 8 8 8 8 | |
33 | * G 16 16 16 16 8 | |
34 | * H 11 11 9 15 15 | |
35 | * J -- -- 13 16 -- | |
36 | * K -- -- -- -- 16 | |
37 | * L -- -- -- 15 7 | |
38 | * M -- -- -- 2 2 | |
39 | */ | |
40 | ||
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41 | /* GPIO bank sizes */ |
42 | #define S3C2410_GPIO_A_NR (32) | |
43 | #define S3C2410_GPIO_B_NR (32) | |
44 | #define S3C2410_GPIO_C_NR (32) | |
45 | #define S3C2410_GPIO_D_NR (32) | |
46 | #define S3C2410_GPIO_E_NR (32) | |
47 | #define S3C2410_GPIO_F_NR (32) | |
48 | #define S3C2410_GPIO_G_NR (32) | |
49 | #define S3C2410_GPIO_H_NR (32) | |
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50 | #define S3C2410_GPIO_J_NR (32) /* technically 16. */ |
51 | #define S3C2410_GPIO_K_NR (32) /* technically 16. */ | |
52 | #define S3C2410_GPIO_L_NR (32) /* technically 15. */ | |
53 | #define S3C2410_GPIO_M_NR (32) /* technically 2. */ | |
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54 | |
55 | #if CONFIG_S3C_GPIO_SPACE != 0 | |
ce19de02 | 56 | #error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment |
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57 | #endif |
58 | ||
59 | #define S3C2410_GPIO_NEXT(__gpio) \ | |
60 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0) | |
61 | ||
62 | #ifndef __ASSEMBLY__ | |
63 | ||
64 | enum s3c_gpio_number { | |
65 | S3C2410_GPIO_A_START = 0, | |
66 | S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A), | |
67 | S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B), | |
68 | S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C), | |
69 | S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D), | |
70 | S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E), | |
71 | S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F), | |
72 | S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G), | |
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73 | S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H), |
74 | S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J), | |
75 | S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K), | |
76 | S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L), | |
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77 | }; |
78 | ||
79 | #endif /* __ASSEMBLY__ */ | |
80 | ||
81 | /* S3C2410 GPIO number definitions. */ | |
82 | ||
83 | #define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr)) | |
84 | #define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr)) | |
85 | #define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr)) | |
86 | #define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr)) | |
87 | #define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr)) | |
88 | #define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr)) | |
89 | #define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr)) | |
90 | #define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr)) | |
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91 | #define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr)) |
92 | #define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr)) | |
93 | #define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr)) | |
94 | #define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr)) | |
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95 | |
96 | #endif /* __MACH_GPIONRS_H */ | |
97 |