Merge tag 'ext4_for_linue' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso...
[deliverable/linux.git] / arch / arm / mach-s3c24xx / irq-s3c2440.c
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a21765a7 1/* linux/arch/arm/mach-s3c2440/irq.c
7fcc113c 2 *
e02f8664 3 * Copyright (c) 2003-2004 Simtec Electronics
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4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
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20*/
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/ioport.h>
4a858cfc 26#include <linux/device.h>
fced80c7 27#include <linux/io.h>
7fcc113c 28
a09e64fb 29#include <mach/hardware.h>
7fcc113c 30#include <asm/irq.h>
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31
32#include <asm/mach/irq.h>
33
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34#include <mach/regs-irq.h>
35#include <mach/regs-gpio.h>
7fcc113c 36
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37#include <plat/cpu.h>
38#include <plat/pm.h>
39#include <plat/irq.h>
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40
41/* WDT/AC97 */
42
43static void s3c_irq_demux_wdtac97(unsigned int irq,
10dd5ce2 44 struct irq_desc *desc)
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45{
46 unsigned int subsrc, submsk;
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47
48 /* read the current pending interrupts, and the mask
49 * for what it is available */
50
51 subsrc = __raw_readl(S3C2410_SUBSRCPND);
52 submsk = __raw_readl(S3C2410_INTSUBMSK);
53
54 subsrc &= ~submsk;
55 subsrc >>= 13;
56 subsrc &= 3;
57
58 if (subsrc != 0) {
59 if (subsrc & 1) {
d8aa0251 60 generic_handle_irq(IRQ_S3C2440_WDT);
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61 }
62 if (subsrc & 2) {
d8aa0251 63 generic_handle_irq(IRQ_S3C2440_AC97);
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64 }
65 }
66}
67
68
69#define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
70
71static void
57436c2d 72s3c_irq_wdtac97_mask(struct irq_data *data)
7fcc113c 73{
57436c2d 74 s3c_irqsub_mask(data->irq, INTMSK_WDT, 3 << 13);
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75}
76
77static void
57436c2d 78s3c_irq_wdtac97_unmask(struct irq_data *data)
7fcc113c 79{
57436c2d 80 s3c_irqsub_unmask(data->irq, INTMSK_WDT);
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81}
82
83static void
57436c2d 84s3c_irq_wdtac97_ack(struct irq_data *data)
7fcc113c 85{
57436c2d 86 s3c_irqsub_maskack(data->irq, INTMSK_WDT, 3 << 13);
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87}
88
10dd5ce2 89static struct irq_chip s3c_irq_wdtac97 = {
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90 .irq_mask = s3c_irq_wdtac97_mask,
91 .irq_unmask = s3c_irq_wdtac97_unmask,
92 .irq_ack = s3c_irq_wdtac97_ack,
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93};
94
04511a6f 95static int s3c2440_irq_add(struct device *dev, struct subsys_interface *sif)
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96{
97 unsigned int irqno;
98
99 printk("S3C2440: IRQ Support\n");
100
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101 /* add new chained handler for wdt, ac7 */
102
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103 irq_set_chip_and_handler(IRQ_WDT, &s3c_irq_level_chip,
104 handle_level_irq);
6845664a 105 irq_set_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
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106
107 for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
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108 irq_set_chip_and_handler(irqno, &s3c_irq_wdtac97,
109 handle_level_irq);
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110 set_irq_flags(irqno, IRQF_VALID);
111 }
112
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113 return 0;
114}
115
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116static struct subsys_interface s3c2440_irq_interface = {
117 .name = "s3c2440_irq",
118 .subsys = &s3c2440_subsys,
119 .add_dev = s3c2440_irq_add,
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120};
121
96ce2385 122static int s3c2440_irq_init(void)
7fcc113c 123{
4a858cfc 124 return subsys_interface_register(&s3c2440_irq_interface);
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125}
126
96ce2385 127arch_initcall(s3c2440_irq_init);
7fcc113c 128
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