[deliverable/linux.git] / arch / arm / mach-s3c24xx / irq-s3c244x.c

/* linux/arch/arm/plat-s3c24xx/s3c244x-irq.c
 *
 * Copyright (c) 2003-2004 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
*/

#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/device.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <asm/irq.h>

#include <asm/mach/irq.h>

#include <mach/regs-irq.h>
#include <mach/regs-gpio.h>

#include <plat/cpu.h>
#include <plat/pm.h>
#include <plat/irq.h>

/* camera irq */

static void s3c_irq_demux_cam(unsigned int irq,
			      struct irq_desc *desc)
{
	unsigned int subsrc, submsk;

	/* read the current pending interrupts, and the mask
	 * for what it is available */

	subsrc = __raw_readl(S3C2410_SUBSRCPND);
	submsk = __raw_readl(S3C2410_INTSUBMSK);

	subsrc &= ~submsk;
	subsrc >>= 11;
	subsrc &= 3;

	if (subsrc != 0) {
		if (subsrc & 1) {
			generic_handle_irq(IRQ_S3C2440_CAM_C);
		}
		if (subsrc & 2) {
			generic_handle_irq(IRQ_S3C2440_CAM_P);
		}
	}
}

#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))

static void
s3c_irq_cam_mask(struct irq_data *data)
{
	s3c_irqsub_mask(data->irq, INTMSK_CAM, 3 << 11);
}

static void
s3c_irq_cam_unmask(struct irq_data *data)
{
	s3c_irqsub_unmask(data->irq, INTMSK_CAM);
}

static void
s3c_irq_cam_ack(struct irq_data *data)
{
	s3c_irqsub_maskack(data->irq, INTMSK_CAM, 3 << 11);
}

static struct irq_chip s3c_irq_cam = {
	.irq_mask	= s3c_irq_cam_mask,
	.irq_unmask	= s3c_irq_cam_unmask,
	.irq_ack	= s3c_irq_cam_ack,
};

static int s3c244x_irq_add(struct device *dev, struct subsys_interface *sif)
{
	unsigned int irqno;

	irq_set_chip_and_handler(IRQ_NFCON, &s3c_irq_level_chip,
				 handle_level_irq);
	set_irq_flags(IRQ_NFCON, IRQF_VALID);

	/* add chained handler for camera */

	irq_set_chip_and_handler(IRQ_CAM, &s3c_irq_level_chip,
				 handle_level_irq);
	irq_set_chained_handler(IRQ_CAM, s3c_irq_demux_cam);

	for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
		irq_set_chip_and_handler(irqno, &s3c_irq_cam,
					 handle_level_irq);
		set_irq_flags(irqno, IRQF_VALID);
	}

	return 0;
}

static struct subsys_interface s3c2440_irq_interface = {
	.name		= "s3c2440_irq",
	.subsys		= &s3c2440_subsys,
	.add_dev	= s3c244x_irq_add,
};

static int s3c2440_irq_init(void)
{
	return subsys_interface_register(&s3c2440_irq_interface);
}

arch_initcall(s3c2440_irq_init);

static struct subsys_interface s3c2442_irq_interface = {
	.name		= "s3c2442_irq",
	.subsys		= &s3c2442_subsys,
	.add_dev	= s3c244x_irq_add,
};


static int s3c2442_irq_init(void)
{
	return subsys_interface_register(&s3c2442_irq_interface);
}

arch_initcall(s3c2442_irq_init);
Commit	Line	Data
a21765a7	1	/* linux/arch/arm/plat-s3c24xx/s3c244x-irq.c
96ce2385	2	*
e02f8664	3	* Copyright (c) 2003-2004 Simtec Electronics
96ce2385 BD	4	* Ben Dooks <ben@simtec.co.uk>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*
96ce2385 BD	20	*/
	21
	22	#include <linux/init.h>
	23	#include <linux/module.h>
	24	#include <linux/interrupt.h>
	25	#include <linux/ioport.h>
4a858cfc	26	#include <linux/device.h>
fced80c7	27	#include <linux/io.h>
96ce2385	28
a09e64fb	29	#include <mach/hardware.h>
96ce2385	30	#include <asm/irq.h>
96ce2385 BD	31
	32	#include <asm/mach/irq.h>
	33
a09e64fb RK	34	#include <mach/regs-irq.h>
a09e64fb RK	35	#include <mach/regs-gpio.h>
96ce2385	36
a2b7ba9c BD	37	#include <plat/cpu.h>
	38	#include <plat/pm.h>
	39	#include <plat/irq.h>
96ce2385 BD	40
	41	/* camera irq */
	42
	43	static void s3c_irq_demux_cam(unsigned int irq,
10dd5ce2	44	struct irq_desc *desc)
96ce2385 BD	45	{
96ce2385 BD	46	unsigned int subsrc, submsk;
96ce2385 BD	47
	48	/* read the current pending interrupts, and the mask
	49	* for what it is available */
	50
	51	subsrc = __raw_readl(S3C2410_SUBSRCPND);
	52	submsk = __raw_readl(S3C2410_INTSUBMSK);
	53
	54	subsrc &= ~submsk;
	55	subsrc >>= 11;
	56	subsrc &= 3;
	57
	58	if (subsrc != 0) {
	59	if (subsrc & 1) {
d8aa0251	60	generic_handle_irq(IRQ_S3C2440_CAM_C);
96ce2385 BD	61	}
96ce2385 BD	62	if (subsrc & 2) {
d8aa0251	63	generic_handle_irq(IRQ_S3C2440_CAM_P);
96ce2385 BD	64	}
	65	}
	66	}
	67
	68	#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
	69
	70	static void
57436c2d	71	s3c_irq_cam_mask(struct irq_data *data)
96ce2385	72	{
57436c2d	73	s3c_irqsub_mask(data->irq, INTMSK_CAM, 3 << 11);
96ce2385 BD	74	}
	75
	76	static void
57436c2d	77	s3c_irq_cam_unmask(struct irq_data *data)
96ce2385	78	{
57436c2d	79	s3c_irqsub_unmask(data->irq, INTMSK_CAM);
96ce2385 BD	80	}
	81
	82	static void
57436c2d	83	s3c_irq_cam_ack(struct irq_data *data)
96ce2385	84	{
57436c2d	85	s3c_irqsub_maskack(data->irq, INTMSK_CAM, 3 << 11);
96ce2385 BD	86	}
96ce2385 BD	87
10dd5ce2	88	static struct irq_chip s3c_irq_cam = {
57436c2d LB	89	.irq_mask = s3c_irq_cam_mask,
	90	.irq_unmask = s3c_irq_cam_unmask,
	91	.irq_ack = s3c_irq_cam_ack,
96ce2385 BD	92	};
96ce2385 BD	93
04511a6f	94	static int s3c244x_irq_add(struct device dev, struct subsys_interface sif)
96ce2385 BD	95	{
	96	unsigned int irqno;
	97
f38c02f3 TG	98	irq_set_chip_and_handler(IRQ_NFCON, &s3c_irq_level_chip,
f38c02f3 TG	99	handle_level_irq);
96ce2385 BD	100	set_irq_flags(IRQ_NFCON, IRQF_VALID);
	101
	102	/* add chained handler for camera */
	103
f38c02f3 TG	104	irq_set_chip_and_handler(IRQ_CAM, &s3c_irq_level_chip,
f38c02f3 TG	105	handle_level_irq);
6845664a	106	irq_set_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
96ce2385 BD	107
96ce2385 BD	108	for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
f38c02f3 TG	109	irq_set_chip_and_handler(irqno, &s3c_irq_cam,
f38c02f3 TG	110	handle_level_irq);
96ce2385 BD	111	set_irq_flags(irqno, IRQF_VALID);
	112	}
	113
	114	return 0;
	115	}
	116
4a858cfc KS	117	static struct subsys_interface s3c2440_irq_interface = {
	118	.name = "s3c2440_irq",
	119	.subsys = &s3c2440_subsys,
	120	.add_dev = s3c244x_irq_add,
96ce2385 BD	121	};
	122
	123	static int s3c2440_irq_init(void)
	124	{
4a858cfc	125	return subsys_interface_register(&s3c2440_irq_interface);
96ce2385 BD	126	}
	127
	128	arch_initcall(s3c2440_irq_init);
	129
4a858cfc KS	130	static struct subsys_interface s3c2442_irq_interface = {
	131	.name = "s3c2442_irq",
	132	.subsys = &s3c2442_subsys,
	133	.add_dev = s3c244x_irq_add,
189e74ee	134	};
96ce2385	135
1e582fc7	136
96ce2385 BD	137	static int s3c2442_irq_init(void)
96ce2385 BD	138	{
4a858cfc	139	return subsys_interface_register(&s3c2442_irq_interface);
96ce2385 BD	140	}
	141
	142	arch_initcall(s3c2442_irq_init);