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1 | /* linux/arch/arm/mach-s3c2440/mach-at2440evb.c |
2 | * | |
3 | * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com> | |
4 | * Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk> | |
5 | * and modifications by SBZ <sbz@spgui.org> and | |
6 | * Weibing <http://weibing.blogbus.com> | |
7 | * | |
50a23e6e | 8 | * For product information, visit http://www.arm.com/ |
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9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/types.h> | |
0a2691da | 17 | #include <linux/gpio.h> |
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18 | #include <linux/interrupt.h> |
19 | #include <linux/list.h> | |
20 | #include <linux/timer.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/io.h> | |
23 | #include <linux/serial_core.h> | |
334a1c70 | 24 | #include <linux/serial_s3c.h> |
66493c2d | 25 | #include <linux/dm9000.h> |
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26 | #include <linux/platform_device.h> |
27 | ||
28 | #include <asm/mach/arch.h> | |
29 | #include <asm/mach/map.h> | |
30 | #include <asm/mach/irq.h> | |
31 | ||
a09e64fb | 32 | #include <mach/hardware.h> |
1d19fdba | 33 | #include <mach/fb.h> |
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34 | #include <asm/irq.h> |
35 | #include <asm/mach-types.h> | |
36 | ||
a09e64fb | 37 | #include <mach/regs-gpio.h> |
a09e64fb | 38 | #include <mach/regs-lcd.h> |
b0161caa | 39 | #include <mach/gpio-samsung.h> |
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40 | #include <linux/platform_data/mtd-nand-s3c2410.h> |
41 | #include <linux/platform_data/i2c-s3c2410.h> | |
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42 | |
43 | #include <linux/mtd/mtd.h> | |
44 | #include <linux/mtd/nand.h> | |
45 | #include <linux/mtd/nand_ecc.h> | |
46 | #include <linux/mtd/partitions.h> | |
47 | ||
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48 | #include <plat/devs.h> |
49 | #include <plat/cpu.h> | |
436d42c6 | 50 | #include <linux/platform_data/mmc-s3cmci.h> |
7f78b6eb | 51 | #include <plat/samsung-time.h> |
4ab98971 | 52 | |
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53 | #include "common.h" |
54 | ||
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55 | static struct map_desc at2440evb_iodesc[] __initdata = { |
56 | /* Nothing here */ | |
57 | }; | |
58 | ||
59 | #define UCON S3C2410_UCON_DEFAULT | |
60 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) | |
61 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | |
62 | ||
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63 | static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { |
64 | [0] = { | |
65 | .hwport = 0, | |
66 | .flags = 0, | |
67 | .ucon = UCON, | |
68 | .ulcon = ULCON, | |
69 | .ufcon = UFCON, | |
afba7f91 | 70 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
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71 | }, |
72 | [1] = { | |
73 | .hwport = 1, | |
74 | .flags = 0, | |
75 | .ucon = UCON, | |
76 | .ulcon = ULCON, | |
77 | .ufcon = UFCON, | |
afba7f91 | 78 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
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79 | }, |
80 | }; | |
81 | ||
82 | /* NAND Flash on AT2440EVB board */ | |
83 | ||
2a3a1804 | 84 | static struct mtd_partition __initdata at2440evb_default_nand_part[] = { |
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85 | [0] = { |
86 | .name = "Boot Agent", | |
87 | .size = SZ_256K, | |
88 | .offset = 0, | |
89 | }, | |
90 | [1] = { | |
91 | .name = "Kernel", | |
92 | .size = SZ_2M, | |
93 | .offset = SZ_256K, | |
94 | }, | |
95 | [2] = { | |
96 | .name = "Root", | |
97 | .offset = SZ_256K + SZ_2M, | |
98 | .size = MTDPART_SIZ_FULL, | |
99 | }, | |
100 | }; | |
101 | ||
2a3a1804 | 102 | static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = { |
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103 | [0] = { |
104 | .name = "nand", | |
105 | .nr_chips = 1, | |
106 | .nr_partitions = ARRAY_SIZE(at2440evb_default_nand_part), | |
107 | .partitions = at2440evb_default_nand_part, | |
108 | }, | |
109 | }; | |
110 | ||
2a3a1804 | 111 | static struct s3c2410_platform_nand __initdata at2440evb_nand_info = { |
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112 | .tacls = 25, |
113 | .twrph0 = 55, | |
114 | .twrph1 = 40, | |
115 | .nr_sets = ARRAY_SIZE(at2440evb_nand_sets), | |
116 | .sets = at2440evb_nand_sets, | |
117 | }; | |
118 | ||
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119 | /* DM9000AEP 10/100 ethernet controller */ |
120 | ||
121 | static struct resource at2440evb_dm9k_resource[] = { | |
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122 | [0] = DEFINE_RES_MEM(S3C2410_CS3, 4), |
123 | [1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4), | |
124 | [2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \ | |
125 | | IORESOURCE_IRQ_HIGHEDGE), | |
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126 | }; |
127 | ||
128 | static struct dm9000_plat_data at2440evb_dm9k_pdata = { | |
129 | .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), | |
130 | }; | |
131 | ||
132 | static struct platform_device at2440evb_device_eth = { | |
133 | .name = "dm9000", | |
134 | .id = -1, | |
135 | .num_resources = ARRAY_SIZE(at2440evb_dm9k_resource), | |
136 | .resource = at2440evb_dm9k_resource, | |
137 | .dev = { | |
138 | .platform_data = &at2440evb_dm9k_pdata, | |
139 | }, | |
140 | }; | |
141 | ||
22c810ab | 142 | static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = { |
070276d5 | 143 | .gpio_detect = S3C2410_GPG(10), |
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144 | }; |
145 | ||
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146 | /* 7" LCD panel */ |
147 | ||
148 | static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = { | |
149 | ||
150 | .lcdcon5 = S3C2410_LCDCON5_FRM565 | | |
151 | S3C2410_LCDCON5_INVVLINE | | |
152 | S3C2410_LCDCON5_INVVFRAME | | |
153 | S3C2410_LCDCON5_PWREN | | |
154 | S3C2410_LCDCON5_HWSWP, | |
155 | ||
156 | .type = S3C2410_LCDCON1_TFT, | |
157 | ||
158 | .width = 800, | |
159 | .height = 480, | |
160 | ||
161 | .pixclock = 33333, /* HCLK 60 MHz, divisor 2 */ | |
162 | .xres = 800, | |
163 | .yres = 480, | |
164 | .bpp = 16, | |
165 | .left_margin = 88, | |
166 | .right_margin = 40, | |
167 | .hsync_len = 128, | |
168 | .upper_margin = 32, | |
169 | .lower_margin = 11, | |
170 | .vsync_len = 2, | |
171 | }; | |
172 | ||
173 | static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = { | |
174 | .displays = &at2440evb_lcd_cfg, | |
175 | .num_displays = 1, | |
176 | .default_display = 0, | |
177 | }; | |
178 | ||
4ab98971 | 179 | static struct platform_device *at2440evb_devices[] __initdata = { |
b813248c | 180 | &s3c_device_ohci, |
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181 | &s3c_device_wdt, |
182 | &s3c_device_adc, | |
3e1b776c | 183 | &s3c_device_i2c0, |
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184 | &s3c_device_rtc, |
185 | &s3c_device_nand, | |
4a045cb3 | 186 | &s3c_device_sdi, |
1d19fdba | 187 | &s3c_device_lcd, |
66493c2d | 188 | &at2440evb_device_eth, |
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189 | }; |
190 | ||
191 | static void __init at2440evb_map_io(void) | |
192 | { | |
4ab98971 | 193 | s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc)); |
4ab98971 | 194 | s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs)); |
7f78b6eb | 195 | samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); |
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196 | } |
197 | ||
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198 | static void __init at2440evb_init_time(void) |
199 | { | |
200 | s3c2440_init_clocks(16934400); | |
201 | samsung_timer_init(); | |
202 | } | |
203 | ||
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204 | static void __init at2440evb_init(void) |
205 | { | |
1d19fdba | 206 | s3c24xx_fb_set_platdata(&at2440evb_fb_info); |
22c810ab | 207 | s3c24xx_mci_set_platdata(&at2440evb_mci_pdata); |
2a3a1804 | 208 | s3c_nand_set_platdata(&at2440evb_nand_info); |
3e1b776c | 209 | s3c_i2c0_set_platdata(NULL); |
56c035c9 | 210 | |
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211 | platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices)); |
212 | } | |
213 | ||
214 | ||
215 | MACHINE_START(AT2440EVB, "AT2440EVB") | |
69d50710 | 216 | .atag_offset = 0x100, |
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217 | .map_io = at2440evb_map_io, |
218 | .init_machine = at2440evb_init, | |
ce6c164b | 219 | .init_irq = s3c2440_init_irq, |
a28d618e | 220 | .init_time = at2440evb_init_time, |
4ab98971 | 221 | MACHINE_END |