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db8304ed | 1 | /* |
ccae941e | 2 | * Copyright (c) 2003-2008 Simtec Electronics |
1da177e4 LT |
3 | * Ben Dooks <ben@simtec.co.uk> |
4 | * | |
5 | * Machine support for Thorcom VR1000 board. Designed for Thorcom by | |
6 | * Simtec Electronics, http://www.simtec.co.uk/ | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
1da177e4 LT |
12 | */ |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/timer.h> | |
19 | #include <linux/init.h> | |
ec976d6e | 20 | #include <linux/gpio.h> |
d97a666f | 21 | #include <linux/dm9000.h> |
60d6698b | 22 | #include <linux/i2c.h> |
1da177e4 LT |
23 | |
24 | #include <linux/serial.h> | |
25 | #include <linux/tty.h> | |
26 | #include <linux/serial_8250.h> | |
27 | #include <linux/serial_reg.h> | |
334a1c70 | 28 | #include <linux/serial_s3c.h> |
fced80c7 | 29 | #include <linux/io.h> |
1da177e4 LT |
30 | |
31 | #include <asm/mach/arch.h> | |
32 | #include <asm/mach/map.h> | |
33 | #include <asm/mach/irq.h> | |
34 | ||
1da177e4 LT |
35 | #include <asm/irq.h> |
36 | #include <asm/mach-types.h> | |
37 | ||
436d42c6 | 38 | #include <linux/platform_data/leds-s3c24xx.h> |
db8304ed KK |
39 | #include <linux/platform_data/i2c-s3c2410.h> |
40 | #include <linux/platform_data/asoc-s3c24xx_simtec.h> | |
41 | ||
42 | #include <mach/hardware.h> | |
43 | #include <mach/regs-gpio.h> | |
b0161caa | 44 | #include <mach/gpio-samsung.h> |
1da177e4 | 45 | |
a2b7ba9c | 46 | #include <plat/cpu.h> |
db8304ed | 47 | #include <plat/devs.h> |
7f78b6eb | 48 | #include <plat/samsung-time.h> |
9d529c6e | 49 | |
bbd7e5e1 | 50 | #include "bast.h" |
b27b0727 | 51 | #include "common.h" |
bbd7e5e1 | 52 | #include "simtec.h" |
db8304ed | 53 | #include "vr1000.h" |
1da177e4 LT |
54 | |
55 | /* macros for virtual address mods for the io space entries */ | |
56 | #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) | |
57 | #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4) | |
58 | #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3) | |
59 | #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2) | |
60 | ||
61 | /* macros to modify the physical addresses for io space */ | |
62 | ||
df1ec6de BD |
63 | #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2)) |
64 | #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3)) | |
65 | #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4)) | |
66 | #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5)) | |
1da177e4 LT |
67 | |
68 | static struct map_desc vr1000_iodesc[] __initdata = { | |
69 | /* ISA IO areas */ | |
df1ec6de BD |
70 | { |
71 | .virtual = (u32)S3C24XX_VA_ISA_BYTE, | |
72 | .pfn = PA_CS2(BAST_PA_ISAIO), | |
73 | .length = SZ_16M, | |
74 | .type = MT_DEVICE, | |
75 | }, { | |
76 | .virtual = (u32)S3C24XX_VA_ISA_WORD, | |
77 | .pfn = PA_CS3(BAST_PA_ISAIO), | |
78 | .length = SZ_16M, | |
79 | .type = MT_DEVICE, | |
80 | }, | |
81 | ||
82 | /* CPLD control registers, and external interrupt controls */ | |
83 | { | |
84 | .virtual = (u32)VR1000_VA_CTRL1, | |
85 | .pfn = __phys_to_pfn(VR1000_PA_CTRL1), | |
86 | .length = SZ_1M, | |
87 | .type = MT_DEVICE, | |
88 | }, { | |
89 | .virtual = (u32)VR1000_VA_CTRL2, | |
90 | .pfn = __phys_to_pfn(VR1000_PA_CTRL2), | |
91 | .length = SZ_1M, | |
92 | .type = MT_DEVICE, | |
93 | }, { | |
94 | .virtual = (u32)VR1000_VA_CTRL3, | |
95 | .pfn = __phys_to_pfn(VR1000_PA_CTRL3), | |
96 | .length = SZ_1M, | |
97 | .type = MT_DEVICE, | |
98 | }, { | |
99 | .virtual = (u32)VR1000_VA_CTRL4, | |
100 | .pfn = __phys_to_pfn(VR1000_PA_CTRL4), | |
101 | .length = SZ_1M, | |
102 | .type = MT_DEVICE, | |
103 | }, | |
1da177e4 LT |
104 | }; |
105 | ||
106 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | |
107 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | |
108 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | |
109 | ||
66a9b49a | 110 | static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { |
1da177e4 LT |
111 | [0] = { |
112 | .hwport = 0, | |
113 | .flags = 0, | |
114 | .ucon = UCON, | |
115 | .ulcon = ULCON, | |
116 | .ufcon = UFCON, | |
1da177e4 LT |
117 | }, |
118 | [1] = { | |
119 | .hwport = 1, | |
120 | .flags = 0, | |
121 | .ucon = UCON, | |
122 | .ulcon = ULCON, | |
123 | .ufcon = UFCON, | |
1da177e4 LT |
124 | }, |
125 | /* port 2 is not actually used */ | |
126 | [2] = { | |
127 | .hwport = 2, | |
128 | .flags = 0, | |
129 | .ucon = UCON, | |
130 | .ulcon = ULCON, | |
131 | .ufcon = UFCON, | |
1da177e4 LT |
132 | } |
133 | }; | |
134 | ||
135 | /* definitions for the vr1000 extra 16550 serial ports */ | |
136 | ||
137 | #define VR1000_BAUDBASE (3692307) | |
138 | ||
139 | #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5)) | |
140 | ||
141 | static struct plat_serial8250_port serial_platform_data[] = { | |
142 | [0] = { | |
143 | .mapbase = VR1000_SERIAL_MAPBASE(0), | |
db8304ed | 144 | .irq = VR1000_IRQ_SERIAL + 0, |
1da177e4 LT |
145 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, |
146 | .iotype = UPIO_MEM, | |
147 | .regshift = 0, | |
148 | .uartclk = VR1000_BAUDBASE, | |
149 | }, | |
150 | [1] = { | |
151 | .mapbase = VR1000_SERIAL_MAPBASE(1), | |
db8304ed | 152 | .irq = VR1000_IRQ_SERIAL + 1, |
1da177e4 LT |
153 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, |
154 | .iotype = UPIO_MEM, | |
155 | .regshift = 0, | |
156 | .uartclk = VR1000_BAUDBASE, | |
157 | }, | |
158 | [2] = { | |
159 | .mapbase = VR1000_SERIAL_MAPBASE(2), | |
db8304ed | 160 | .irq = VR1000_IRQ_SERIAL + 2, |
1da177e4 LT |
161 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, |
162 | .iotype = UPIO_MEM, | |
163 | .regshift = 0, | |
164 | .uartclk = VR1000_BAUDBASE, | |
165 | }, | |
166 | [3] = { | |
167 | .mapbase = VR1000_SERIAL_MAPBASE(3), | |
db8304ed | 168 | .irq = VR1000_IRQ_SERIAL + 3, |
1da177e4 LT |
169 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, |
170 | .iotype = UPIO_MEM, | |
171 | .regshift = 0, | |
172 | .uartclk = VR1000_BAUDBASE, | |
173 | }, | |
174 | { }, | |
175 | }; | |
176 | ||
177 | static struct platform_device serial_device = { | |
178 | .name = "serial8250", | |
6df29deb | 179 | .id = PLAT8250_DEV_PLATFORM, |
1da177e4 LT |
180 | .dev = { |
181 | .platform_data = serial_platform_data, | |
182 | }, | |
183 | }; | |
184 | ||
d97a666f BD |
185 | /* DM9000 ethernet devices */ |
186 | ||
187 | static struct resource vr1000_dm9k0_resource[] = { | |
940e46ae TB |
188 | [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4), |
189 | [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40), | |
db8304ed | 190 | [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000A, 1, NULL, IORESOURCE_IRQ \ |
940e46ae | 191 | | IORESOURCE_IRQ_HIGHLEVEL), |
d97a666f BD |
192 | }; |
193 | ||
194 | static struct resource vr1000_dm9k1_resource[] = { | |
940e46ae TB |
195 | [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4), |
196 | [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40), | |
db8304ed | 197 | [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000N, 1, NULL, IORESOURCE_IRQ \ |
940e46ae | 198 | | IORESOURCE_IRQ_HIGHLEVEL), |
d97a666f BD |
199 | }; |
200 | ||
201 | /* for the moment we limit ourselves to 16bit IO until some | |
202 | * better IO routines can be written and tested | |
203 | */ | |
204 | ||
9f693d7b | 205 | static struct dm9000_plat_data vr1000_dm9k_platdata = { |
d97a666f BD |
206 | .flags = DM9000_PLATF_16BITONLY, |
207 | }; | |
208 | ||
209 | static struct platform_device vr1000_dm9k0 = { | |
210 | .name = "dm9000", | |
211 | .id = 0, | |
212 | .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource), | |
213 | .resource = vr1000_dm9k0_resource, | |
214 | .dev = { | |
215 | .platform_data = &vr1000_dm9k_platdata, | |
216 | } | |
217 | }; | |
218 | ||
219 | static struct platform_device vr1000_dm9k1 = { | |
220 | .name = "dm9000", | |
221 | .id = 1, | |
222 | .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource), | |
223 | .resource = vr1000_dm9k1_resource, | |
224 | .dev = { | |
225 | .platform_data = &vr1000_dm9k_platdata, | |
226 | } | |
227 | }; | |
228 | ||
b2eba6bb BD |
229 | /* LEDS */ |
230 | ||
231 | static struct s3c24xx_led_platdata vr1000_led1_pdata = { | |
232 | .name = "led1", | |
070276d5 | 233 | .gpio = S3C2410_GPB(0), |
b2eba6bb BD |
234 | .def_trigger = "", |
235 | }; | |
236 | ||
237 | static struct s3c24xx_led_platdata vr1000_led2_pdata = { | |
238 | .name = "led2", | |
070276d5 | 239 | .gpio = S3C2410_GPB(1), |
b2eba6bb BD |
240 | .def_trigger = "", |
241 | }; | |
242 | ||
243 | static struct s3c24xx_led_platdata vr1000_led3_pdata = { | |
244 | .name = "led3", | |
070276d5 | 245 | .gpio = S3C2410_GPB(2), |
b2eba6bb BD |
246 | .def_trigger = "", |
247 | }; | |
248 | ||
249 | static struct platform_device vr1000_led1 = { | |
250 | .name = "s3c24xx_led", | |
251 | .id = 1, | |
252 | .dev = { | |
253 | .platform_data = &vr1000_led1_pdata, | |
254 | }, | |
255 | }; | |
256 | ||
257 | static struct platform_device vr1000_led2 = { | |
258 | .name = "s3c24xx_led", | |
259 | .id = 2, | |
260 | .dev = { | |
261 | .platform_data = &vr1000_led2_pdata, | |
262 | }, | |
263 | }; | |
264 | ||
265 | static struct platform_device vr1000_led3 = { | |
266 | .name = "s3c24xx_led", | |
abac08d7 | 267 | .id = 3, |
b2eba6bb BD |
268 | .dev = { |
269 | .platform_data = &vr1000_led3_pdata, | |
270 | }, | |
271 | }; | |
272 | ||
60d6698b BD |
273 | /* I2C devices. */ |
274 | ||
275 | static struct i2c_board_info vr1000_i2c_devs[] __initdata = { | |
276 | { | |
277 | I2C_BOARD_INFO("tlv320aic23", 0x1a), | |
9c3871ca BD |
278 | }, { |
279 | I2C_BOARD_INFO("tmp101", 0x48), | |
60d6698b BD |
280 | }, { |
281 | I2C_BOARD_INFO("m41st87", 0x68), | |
282 | }, | |
283 | }; | |
284 | ||
d97a666f | 285 | /* devices for this board */ |
1da177e4 LT |
286 | |
287 | static struct platform_device *vr1000_devices[] __initdata = { | |
51cb1289 | 288 | &s3c2410_device_dclk, |
b813248c | 289 | &s3c_device_ohci, |
1da177e4 LT |
290 | &s3c_device_lcd, |
291 | &s3c_device_wdt, | |
3e1b776c | 292 | &s3c_device_i2c0, |
d97a666f | 293 | &s3c_device_adc, |
1da177e4 | 294 | &serial_device, |
d97a666f | 295 | &vr1000_dm9k0, |
b2eba6bb BD |
296 | &vr1000_dm9k1, |
297 | &vr1000_led1, | |
298 | &vr1000_led2, | |
299 | &vr1000_led3, | |
1da177e4 LT |
300 | }; |
301 | ||
1da177e4 LT |
302 | static void vr1000_power_off(void) |
303 | { | |
7614e1d9 | 304 | gpio_direction_output(S3C2410_GPB(9), 1); |
1da177e4 LT |
305 | } |
306 | ||
5fe10ab1 | 307 | static void __init vr1000_map_io(void) |
1da177e4 | 308 | { |
1da177e4 LT |
309 | pm_power_off = vr1000_power_off; |
310 | ||
311 | s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc)); | |
1da177e4 | 312 | s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs)); |
7f78b6eb | 313 | samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); |
1da177e4 LT |
314 | } |
315 | ||
07ee5e7c HS |
316 | static void __init vr1000_init_time(void) |
317 | { | |
318 | s3c2410_init_clocks(12000000); | |
319 | samsung_timer_init(); | |
320 | } | |
321 | ||
57e5171c BD |
322 | static void __init vr1000_init(void) |
323 | { | |
3e1b776c | 324 | s3c_i2c0_set_platdata(NULL); |
57e5171c | 325 | platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices)); |
9d529c6e | 326 | |
60d6698b BD |
327 | i2c_register_board_info(0, vr1000_i2c_devs, |
328 | ARRAY_SIZE(vr1000_i2c_devs)); | |
329 | ||
9d529c6e | 330 | nor_simtec_init(); |
4d3a3469 | 331 | simtec_audio_add(NULL, true, NULL); |
7614e1d9 BD |
332 | |
333 | WARN_ON(gpio_request(S3C2410_GPB(9), "power off")); | |
57e5171c | 334 | } |
1da177e4 LT |
335 | |
336 | MACHINE_START(VR1000, "Thorcom-VR1000") | |
e9dea0c6 | 337 | /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ |
69d50710 | 338 | .atag_offset = 0x100, |
6904b246 | 339 | .map_io = vr1000_map_io, |
57e5171c | 340 | .init_machine = vr1000_init, |
f182aa1d | 341 | .init_irq = s3c2410_init_irq, |
07ee5e7c | 342 | .init_time = vr1000_init_time, |
1da177e4 | 343 | MACHINE_END |