ARM: S3C24XX: make anubis-cpld, anubis-irq and anubis-map local
[deliverable/linux.git] / arch / arm / mach-s3c24xx / mach-vr1000.c
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1da177e4
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1/* linux/arch/arm/mach-s3c2410/mach-vr1000.c
2 *
ccae941e 3 * Copyright (c) 2003-2008 Simtec Electronics
1da177e4
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4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Machine support for Thorcom VR1000 board. Designed for Thorcom by
7 * Simtec Electronics, http://www.simtec.co.uk/
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
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13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/list.h>
19#include <linux/timer.h>
20#include <linux/init.h>
ec976d6e 21#include <linux/gpio.h>
d97a666f 22#include <linux/dm9000.h>
60d6698b 23#include <linux/i2c.h>
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24
25#include <linux/serial.h>
26#include <linux/tty.h>
27#include <linux/serial_8250.h>
28#include <linux/serial_reg.h>
fced80c7 29#include <linux/io.h>
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30
31#include <asm/mach/arch.h>
32#include <asm/mach/map.h>
33#include <asm/mach/irq.h>
34
a09e64fb
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35#include <mach/bast-map.h>
36#include <mach/vr1000-map.h>
37#include <mach/vr1000-irq.h>
38#include <mach/vr1000-cpld.h>
1da177e4 39
a09e64fb 40#include <mach/hardware.h>
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41#include <asm/irq.h>
42#include <asm/mach-types.h>
43
a2b7ba9c 44#include <plat/regs-serial.h>
a09e64fb 45#include <mach/regs-gpio.h>
436d42c6 46#include <linux/platform_data/leds-s3c24xx.h>
1da177e4 47
d5120ae7 48#include <plat/clock.h>
a2b7ba9c
BD
49#include <plat/devs.h>
50#include <plat/cpu.h>
436d42c6
AB
51#include <linux/platform_data/i2c-s3c2410.h>
52#include <linux/platform_data/asoc-s3c24xx_simtec.h>
9d529c6e 53
ec2cc753 54#include "simtec.h"
b27b0727 55#include "common.h"
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56
57/* macros for virtual address mods for the io space entries */
58#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
59#define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
60#define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
61#define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
62
63/* macros to modify the physical addresses for io space */
64
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BD
65#define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
66#define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
67#define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
68#define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
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69
70static struct map_desc vr1000_iodesc[] __initdata = {
71 /* ISA IO areas */
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72 {
73 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
74 .pfn = PA_CS2(BAST_PA_ISAIO),
75 .length = SZ_16M,
76 .type = MT_DEVICE,
77 }, {
78 .virtual = (u32)S3C24XX_VA_ISA_WORD,
79 .pfn = PA_CS3(BAST_PA_ISAIO),
80 .length = SZ_16M,
81 .type = MT_DEVICE,
82 },
83
84 /* CPLD control registers, and external interrupt controls */
85 {
86 .virtual = (u32)VR1000_VA_CTRL1,
87 .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
88 .length = SZ_1M,
89 .type = MT_DEVICE,
90 }, {
91 .virtual = (u32)VR1000_VA_CTRL2,
92 .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
93 .length = SZ_1M,
94 .type = MT_DEVICE,
95 }, {
96 .virtual = (u32)VR1000_VA_CTRL3,
97 .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
98 .length = SZ_1M,
99 .type = MT_DEVICE,
100 }, {
101 .virtual = (u32)VR1000_VA_CTRL4,
102 .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
103 .length = SZ_1M,
104 .type = MT_DEVICE,
105 },
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106};
107
108#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
109#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
110#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
111
66a9b49a 112static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
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113 [0] = {
114 .hwport = 0,
115 .flags = 0,
116 .ucon = UCON,
117 .ulcon = ULCON,
118 .ufcon = UFCON,
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119 },
120 [1] = {
121 .hwport = 1,
122 .flags = 0,
123 .ucon = UCON,
124 .ulcon = ULCON,
125 .ufcon = UFCON,
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126 },
127 /* port 2 is not actually used */
128 [2] = {
129 .hwport = 2,
130 .flags = 0,
131 .ucon = UCON,
132 .ulcon = ULCON,
133 .ufcon = UFCON,
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134 }
135};
136
137/* definitions for the vr1000 extra 16550 serial ports */
138
139#define VR1000_BAUDBASE (3692307)
140
141#define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
142
143static struct plat_serial8250_port serial_platform_data[] = {
144 [0] = {
145 .mapbase = VR1000_SERIAL_MAPBASE(0),
146 .irq = IRQ_VR1000_SERIAL + 0,
147 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
148 .iotype = UPIO_MEM,
149 .regshift = 0,
150 .uartclk = VR1000_BAUDBASE,
151 },
152 [1] = {
153 .mapbase = VR1000_SERIAL_MAPBASE(1),
154 .irq = IRQ_VR1000_SERIAL + 1,
155 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
156 .iotype = UPIO_MEM,
157 .regshift = 0,
158 .uartclk = VR1000_BAUDBASE,
159 },
160 [2] = {
161 .mapbase = VR1000_SERIAL_MAPBASE(2),
162 .irq = IRQ_VR1000_SERIAL + 2,
163 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
164 .iotype = UPIO_MEM,
165 .regshift = 0,
166 .uartclk = VR1000_BAUDBASE,
167 },
168 [3] = {
169 .mapbase = VR1000_SERIAL_MAPBASE(3),
170 .irq = IRQ_VR1000_SERIAL + 3,
171 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
172 .iotype = UPIO_MEM,
173 .regshift = 0,
174 .uartclk = VR1000_BAUDBASE,
175 },
176 { },
177};
178
179static struct platform_device serial_device = {
180 .name = "serial8250",
6df29deb 181 .id = PLAT8250_DEV_PLATFORM,
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182 .dev = {
183 .platform_data = serial_platform_data,
184 },
185};
186
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187/* DM9000 ethernet devices */
188
189static struct resource vr1000_dm9k0_resource[] = {
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TB
190 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4),
191 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40),
192 [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000A, 1, NULL, IORESOURCE_IRQ \
193 | IORESOURCE_IRQ_HIGHLEVEL),
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BD
194};
195
196static struct resource vr1000_dm9k1_resource[] = {
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197 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4),
198 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),
199 [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000N, 1, NULL, IORESOURCE_IRQ \
200 | IORESOURCE_IRQ_HIGHLEVEL),
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201};
202
203/* for the moment we limit ourselves to 16bit IO until some
204 * better IO routines can be written and tested
205*/
206
9f693d7b 207static struct dm9000_plat_data vr1000_dm9k_platdata = {
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BD
208 .flags = DM9000_PLATF_16BITONLY,
209};
210
211static struct platform_device vr1000_dm9k0 = {
212 .name = "dm9000",
213 .id = 0,
214 .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
215 .resource = vr1000_dm9k0_resource,
216 .dev = {
217 .platform_data = &vr1000_dm9k_platdata,
218 }
219};
220
221static struct platform_device vr1000_dm9k1 = {
222 .name = "dm9000",
223 .id = 1,
224 .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
225 .resource = vr1000_dm9k1_resource,
226 .dev = {
227 .platform_data = &vr1000_dm9k_platdata,
228 }
229};
230
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BD
231/* LEDS */
232
233static struct s3c24xx_led_platdata vr1000_led1_pdata = {
234 .name = "led1",
070276d5 235 .gpio = S3C2410_GPB(0),
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BD
236 .def_trigger = "",
237};
238
239static struct s3c24xx_led_platdata vr1000_led2_pdata = {
240 .name = "led2",
070276d5 241 .gpio = S3C2410_GPB(1),
b2eba6bb
BD
242 .def_trigger = "",
243};
244
245static struct s3c24xx_led_platdata vr1000_led3_pdata = {
246 .name = "led3",
070276d5 247 .gpio = S3C2410_GPB(2),
b2eba6bb
BD
248 .def_trigger = "",
249};
250
251static struct platform_device vr1000_led1 = {
252 .name = "s3c24xx_led",
253 .id = 1,
254 .dev = {
255 .platform_data = &vr1000_led1_pdata,
256 },
257};
258
259static struct platform_device vr1000_led2 = {
260 .name = "s3c24xx_led",
261 .id = 2,
262 .dev = {
263 .platform_data = &vr1000_led2_pdata,
264 },
265};
266
267static struct platform_device vr1000_led3 = {
268 .name = "s3c24xx_led",
abac08d7 269 .id = 3,
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270 .dev = {
271 .platform_data = &vr1000_led3_pdata,
272 },
273};
274
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BD
275/* I2C devices. */
276
277static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
278 {
279 I2C_BOARD_INFO("tlv320aic23", 0x1a),
9c3871ca
BD
280 }, {
281 I2C_BOARD_INFO("tmp101", 0x48),
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BD
282 }, {
283 I2C_BOARD_INFO("m41st87", 0x68),
284 },
285};
286
d97a666f 287/* devices for this board */
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288
289static struct platform_device *vr1000_devices[] __initdata = {
b813248c 290 &s3c_device_ohci,
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LT
291 &s3c_device_lcd,
292 &s3c_device_wdt,
3e1b776c 293 &s3c_device_i2c0,
d97a666f 294 &s3c_device_adc,
1da177e4 295 &serial_device,
d97a666f 296 &vr1000_dm9k0,
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BD
297 &vr1000_dm9k1,
298 &vr1000_led1,
299 &vr1000_led2,
300 &vr1000_led3,
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301};
302
2bc7509f 303static struct clk *vr1000_clocks[] __initdata = {
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LT
304 &s3c24xx_dclk0,
305 &s3c24xx_dclk1,
306 &s3c24xx_clkout0,
307 &s3c24xx_clkout1,
308 &s3c24xx_uclk,
309};
310
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LT
311static void vr1000_power_off(void)
312{
7614e1d9 313 gpio_direction_output(S3C2410_GPB(9), 1);
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LT
314}
315
5fe10ab1 316static void __init vr1000_map_io(void)
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LT
317{
318 /* initialise clock sources */
319
d96a9804 320 s3c24xx_dclk0.parent = &clk_upll;
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LT
321 s3c24xx_dclk0.rate = 12*1000*1000;
322
323 s3c24xx_dclk1.parent = NULL;
324 s3c24xx_dclk1.rate = 3692307;
325
326 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
327 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
328
329 s3c24xx_uclk.parent = &s3c24xx_clkout1;
330
ce89c206
BD
331 s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
332
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LT
333 pm_power_off = vr1000_power_off;
334
335 s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
336 s3c24xx_init_clocks(0);
337 s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
1da177e4
LT
338}
339
57e5171c
BD
340static void __init vr1000_init(void)
341{
3e1b776c 342 s3c_i2c0_set_platdata(NULL);
57e5171c 343 platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
9d529c6e 344
60d6698b
BD
345 i2c_register_board_info(0, vr1000_i2c_devs,
346 ARRAY_SIZE(vr1000_i2c_devs));
347
9d529c6e 348 nor_simtec_init();
4d3a3469 349 simtec_audio_add(NULL, true, NULL);
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BD
350
351 WARN_ON(gpio_request(S3C2410_GPB(9), "power off"));
57e5171c 352}
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LT
353
354MACHINE_START(VR1000, "Thorcom-VR1000")
e9dea0c6 355 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
69d50710 356 .atag_offset = 0x100,
6904b246 357 .map_io = vr1000_map_io,
57e5171c 358 .init_machine = vr1000_init,
6904b246 359 .init_irq = s3c24xx_init_irq,
1da177e4 360 .timer = &s3c24xx_timer,
b27b0727 361 .restart = s3c2410_restart,
1da177e4 362MACHINE_END
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