[deliverable/linux.git] / arch / arm / mach-s3c24xx / mach-vstms.c

/* linux/arch/arm/mach-s3c2412/mach-vstms.c
 *
 * (C) 2006 Thomas Gleixner <tglx@linutronix.de>
 *
 * Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/irq.h>
#include <asm/mach-types.h>

#include <plat/regs-serial.h>
#include <mach/regs-gpio.h>
#include <mach/regs-lcd.h>

#include <mach/fb.h>

#include <linux/platform_data/i2c-s3c2410.h>
#include <linux/platform_data/mtd-nand-s3c2410.h>

#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>

#include "common.h"

static struct map_desc vstms_iodesc[] __initdata = {
};

static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = {
	[0] = {
		.hwport	     = 0,
		.flags	     = 0,
		.ucon	     = 0x3c5,
		.ulcon	     = 0x03,
		.ufcon	     = 0x51,
	},
	[1] = {
		.hwport	     = 1,
		.flags	     = 0,
		.ucon	     = 0x3c5,
		.ulcon	     = 0x03,
		.ufcon	     = 0x51,
	},
	[2] = {
		.hwport	     = 2,
		.flags	     = 0,
		.ucon	     = 0x3c5,
		.ulcon	     = 0x03,
		.ufcon	     = 0x51,
	}
};

static struct mtd_partition __initdata vstms_nand_part[] = {
	[0] = {
		.name	= "Boot Agent",
		.size	= 0x7C000,
		.offset	= 0,
	},
	[1] = {
		.name	= "UBoot Config",
		.offset = 0x7C000,
		.size	= 0x4000,
	},
	[2] = {
		.name	= "Kernel",
		.offset = 0x80000,
		.size	= 0x200000,
	},
	[3] = {
		.name	= "RFS",
		.offset	= 0x280000,
		.size	= 0x3d80000,
	},
};

static struct s3c2410_nand_set __initdata vstms_nand_sets[] = {
	[0] = {
		.name		= "NAND",
		.nr_chips	= 1,
		.nr_partitions	= ARRAY_SIZE(vstms_nand_part),
		.partitions	= vstms_nand_part,
	},
};

/* choose a set of timings which should suit most 512Mbit
 * chips and beyond.
*/

static struct s3c2410_platform_nand __initdata vstms_nand_info = {
	.tacls		= 20,
	.twrph0		= 60,
	.twrph1		= 20,
	.nr_sets	= ARRAY_SIZE(vstms_nand_sets),
	.sets		= vstms_nand_sets,
};

static struct platform_device *vstms_devices[] __initdata = {
	&s3c_device_ohci,
	&s3c_device_wdt,
	&s3c_device_i2c0,
	&s3c_device_iis,
	&s3c_device_rtc,
	&s3c_device_nand,
};

static void __init vstms_fixup(struct tag *tags, char **cmdline,
			       struct meminfo *mi)
{
	if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
		mi->nr_banks=1;
		mi->bank[0].start = 0x30000000;
		mi->bank[0].size = SZ_64M;
	}
}

static void __init vstms_map_io(void)
{
	s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc));
	s3c24xx_init_clocks(12000000);
	s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs));
}

static void __init vstms_init(void)
{
	s3c_i2c0_set_platdata(NULL);
	s3c_nand_set_platdata(&vstms_nand_info);

	platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices));
}

MACHINE_START(VSTMS, "VSTMS")
	.atag_offset	= 0x100,

	.fixup		= vstms_fixup,
	.init_irq	= s3c24xx_init_irq,
	.init_machine	= vstms_init,
	.map_io		= vstms_map_io,
	.init_time	= s3c24xx_timer_init,
	.restart	= s3c2412_restart,
MACHINE_END
Commit	Line	Data
a21765a7	1	/* linux/arch/arm/mach-s3c2412/mach-vstms.c
b6c440a9 BD	2	*
	3	* (C) 2006 Thomas Gleixner <tglx@linutronix.de>
	4	*
	5	* Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
	12	#include <linux/kernel.h>
	13	#include <linux/types.h>
	14	#include <linux/interrupt.h>
	15	#include <linux/list.h>
	16	#include <linux/timer.h>
	17	#include <linux/init.h>
b6d1f542	18	#include <linux/serial_core.h>
b6c440a9	19	#include <linux/platform_device.h>
fced80c7	20	#include <linux/io.h>
b6c440a9 BD	21	#include <linux/mtd/mtd.h>
	22	#include <linux/mtd/nand.h>
	23	#include <linux/mtd/nand_ecc.h>
	24	#include <linux/mtd/partitions.h>
	25
	26	#include <asm/mach/arch.h>
	27	#include <asm/mach/map.h>
	28	#include <asm/mach/irq.h>
	29
a09e64fb	30	#include <mach/hardware.h>
b6c440a9	31	#include <asm/setup.h>
b6c440a9 BD	32	#include <asm/irq.h>
	33	#include <asm/mach-types.h>
	34
a2b7ba9c	35	#include <plat/regs-serial.h>
a09e64fb RK	36	#include <mach/regs-gpio.h>
a09e64fb RK	37	#include <mach/regs-lcd.h>
b6c440a9	38
a09e64fb	39	#include <mach/fb.h>
b6c440a9	40
436d42c6 AB	41	#include <linux/platform_data/i2c-s3c2410.h>
436d42c6 AB	42	#include <linux/platform_data/mtd-nand-s3c2410.h>
b6c440a9	43
d5120ae7	44	#include <plat/clock.h>
a2b7ba9c BD	45	#include <plat/devs.h>
a2b7ba9c BD	46	#include <plat/cpu.h>
b6c440a9	47
e1a621da	48	#include "common.h"
b6c440a9 BD	49
	50	static struct map_desc vstms_iodesc[] __initdata = {
	51	};
	52
	53	static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = {
	54	[0] = {
	55	.hwport = 0,
	56	.flags = 0,
	57	.ucon = 0x3c5,
	58	.ulcon = 0x03,
	59	.ufcon = 0x51,
	60	},
	61	[1] = {
	62	.hwport = 1,
	63	.flags = 0,
	64	.ucon = 0x3c5,
	65	.ulcon = 0x03,
	66	.ufcon = 0x51,
	67	},
	68	[2] = {
	69	.hwport = 2,
	70	.flags = 0,
	71	.ucon = 0x3c5,
	72	.ulcon = 0x03,
	73	.ufcon = 0x51,
	74	}
	75	};
	76
2a3a1804	77	static struct mtd_partition __initdata vstms_nand_part[] = {
b6c440a9 BD	78	[0] = {
	79	.name = "Boot Agent",
	80	.size = 0x7C000,
	81	.offset = 0,
	82	},
	83	[1] = {
	84	.name = "UBoot Config",
	85	.offset = 0x7C000,
	86	.size = 0x4000,
	87	},
	88	[2] = {
	89	.name = "Kernel",
	90	.offset = 0x80000,
	91	.size = 0x200000,
	92	},
	93	[3] = {
	94	.name = "RFS",
	95	.offset = 0x280000,
	96	.size = 0x3d80000,
	97	},
	98	};
	99
2a3a1804	100	static struct s3c2410_nand_set __initdata vstms_nand_sets[] = {
b6c440a9 BD	101	[0] = {
	102	.name = "NAND",
	103	.nr_chips = 1,
	104	.nr_partitions = ARRAY_SIZE(vstms_nand_part),
	105	.partitions = vstms_nand_part,
	106	},
	107	};
	108
	109	/* choose a set of timings which should suit most 512Mbit
	110	* chips and beyond.
	111	*/
	112
2a3a1804	113	static struct s3c2410_platform_nand __initdata vstms_nand_info = {
b6c440a9 BD	114	.tacls = 20,
	115	.twrph0 = 60,
	116	.twrph1 = 20,
	117	.nr_sets = ARRAY_SIZE(vstms_nand_sets),
	118	.sets = vstms_nand_sets,
	119	};
	120
	121	static struct platform_device *vstms_devices[] __initdata = {
b813248c	122	&s3c_device_ohci,
b6c440a9	123	&s3c_device_wdt,
3e1b776c	124	&s3c_device_i2c0,
b6c440a9 BD	125	&s3c_device_iis,
	126	&s3c_device_rtc,
	127	&s3c_device_nand,
	128	};
	129
0744a3ee RK	130	static void __init vstms_fixup(struct tag tags, char *cmdline,
0744a3ee RK	131	struct meminfo *mi)
b6c440a9 BD	132	{
	133	if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
	134	mi->nr_banks=1;
	135	mi->bank[0].start = 0x30000000;
	136	mi->bank[0].size = SZ_64M;
b6c440a9 BD	137	}
	138	}
	139
	140	static void __init vstms_map_io(void)
	141	{
b6c440a9 BD	142	s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc));
	143	s3c24xx_init_clocks(12000000);
	144	s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs));
57e5171c BD	145	}
	146
	147	static void __init vstms_init(void)
	148	{
3e1b776c	149	s3c_i2c0_set_platdata(NULL);
2a3a1804 BD	150	s3c_nand_set_platdata(&vstms_nand_info);
2a3a1804 BD	151
57e5171c	152	platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices));
b6c440a9 BD	153	}
	154
	155	MACHINE_START(VSTMS, "VSTMS")
69d50710	156	.atag_offset = 0x100,
b6c440a9 BD	157
	158	.fixup = vstms_fixup,
	159	.init_irq = s3c24xx_init_irq,
57e5171c	160	.init_machine = vstms_init,
b6c440a9	161	.map_io = vstms_map_io,
6bb27d73	162	.init_time = s3c24xx_timer_init,
57538975	163	.restart = s3c2412_restart,
b6c440a9	164	MACHINE_END