Merge tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux...
[deliverable/linux.git] / arch / arm / mach-s3c24xx / s3c2410.c
CommitLineData
1da177e4
LT
1/* linux/arch/arm/mach-s3c2410/s3c2410.c
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.simtec.co.uk/products/EB2410ITX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
1da177e4
LT
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
1ec7269f 19#include <linux/gpio.h>
e425382e 20#include <linux/clk.h>
4a858cfc 21#include <linux/device.h>
bb072c3c 22#include <linux/syscore_ops.h>
b6d1f542 23#include <linux/serial_core.h>
334a1c70 24#include <linux/serial_s3c.h>
d052d1be 25#include <linux/platform_device.h>
7b6d864b 26#include <linux/reboot.h>
fced80c7 27#include <linux/io.h>
1da177e4
LT
28
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31#include <asm/mach/irq.h>
32
a09e64fb 33#include <mach/hardware.h>
b0161caa 34#include <mach/gpio-samsung.h>
1da177e4 35#include <asm/irq.h>
9f97da78 36#include <asm/system_misc.h>
1da177e4 37
e425382e
BD
38#include <plat/cpu-freq.h>
39
a09e64fb 40#include <mach/regs-clock.h>
1da177e4 41
a2b7ba9c
BD
42#include <plat/cpu.h>
43#include <plat/devs.h>
bb072c3c 44#include <plat/pm.h>
b27b0727 45#include <plat/watchdog-reset.h>
1da177e4 46
1ec7269f
BD
47#include <plat/gpio-core.h>
48#include <plat/gpio-cfg.h>
49#include <plat/gpio-cfg-helpers.h>
50
d8fdec16
HS
51#include "common.h"
52
1da177e4
LT
53/* Initial IO mappings */
54
55static struct map_desc s3c2410_iodesc[] __initdata = {
1da177e4 56 IODESC_ENT(CLKPWR),
1da177e4 57 IODESC_ENT(TIMER),
62ee914e 58 IODESC_ENT(WATCHDOG),
1da177e4
LT
59};
60
1da177e4
LT
61/* our uart devices */
62
1da177e4
LT
63/* uart registration process */
64
65void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
66{
66a9b49a 67 s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no);
1da177e4
LT
68}
69
70/* s3c2410_map_io
71 *
72 * register the standard cpu IO areas, and any passed in from the
73 * machine specific initialisation.
74*/
75
74b265d4 76void __init s3c2410_map_io(void)
1da177e4 77{
782d8a3c
KK
78 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
79 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
1ec7269f 80
1da177e4 81 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
1da177e4
LT
82}
83
4a858cfc 84struct bus_type s3c2410_subsys = {
af5ca3f4 85 .name = "s3c2410-core",
4a858cfc 86 .dev_name = "s3c2410-core",
a341305e
BD
87};
88
f0176794 89/* Note, we would have liked to name this s3c2410-core, but we cannot
4a858cfc 90 * register two subsystems with the same name.
f0176794 91 */
4a858cfc 92struct bus_type s3c2410a_subsys = {
f0176794 93 .name = "s3c2410a-core",
4a858cfc 94 .dev_name = "s3c2410a-core",
f0176794
BD
95};
96
4a858cfc
KS
97static struct device s3c2410_dev = {
98 .bus = &s3c2410_subsys,
a341305e
BD
99};
100
4a858cfc 101/* need to register the subsystem before we actually register the device, and
a341305e 102 * we also need to ensure that it has been initialised before any of the
6db3eee4 103 * drivers even try to use it (even if not on an s3c2410 based system)
a341305e
BD
104 * as a driver which may support both 2410 and 2440 may try and use it.
105*/
106
107static int __init s3c2410_core_init(void)
108{
4a858cfc 109 return subsys_system_register(&s3c2410_subsys, NULL);
a341305e
BD
110}
111
112core_initcall(s3c2410_core_init);
113
f0176794
BD
114static int __init s3c2410a_core_init(void)
115{
4a858cfc 116 return subsys_system_register(&s3c2410a_subsys, NULL);
f0176794
BD
117}
118
119core_initcall(s3c2410a_core_init);
120
1da177e4
LT
121int __init s3c2410_init(void)
122{
123 printk("S3C2410: Initialising architecture\n");
124
fb630b9f 125#ifdef CONFIG_PM
bb072c3c
RW
126 register_syscore_ops(&s3c2410_pm_syscore_ops);
127 register_syscore_ops(&s3c24xx_irq_syscore_ops);
d8fdec16 128#endif
bb072c3c 129
4a858cfc 130 return device_register(&s3c2410_dev);
1da177e4 131}
f0176794
BD
132
133int __init s3c2410a_init(void)
134{
4a858cfc 135 s3c2410_dev.bus = &s3c2410a_subsys;
f0176794
BD
136 return s3c2410_init();
137}
b27b0727 138
7b6d864b 139void s3c2410_restart(enum reboot_mode mode, const char *cmd)
b27b0727 140{
7b6d864b 141 if (mode == REBOOT_SOFT) {
b27b0727
KK
142 soft_restart(0);
143 }
144
88f59738 145 samsung_wdt_reset();
b27b0727
KK
146
147 /* we'll take a jump through zero as a poor second */
148 soft_restart(0);
149}
This page took 0.686314 seconds and 5 git commands to generate.