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a21765a7 | 1 | /* linux/arch/arm/plat-s3c24xx/s3c244x.c |
96ce2385 BD |
2 | * |
3 | * Copyright (c) 2004-2006 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
e4d06e39 | 6 | * Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443) |
96ce2385 BD |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/types.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/timer.h> | |
18 | #include <linux/init.h> | |
b6d1f542 | 19 | #include <linux/serial_core.h> |
334a1c70 | 20 | #include <linux/serial_s3c.h> |
96ce2385 | 21 | #include <linux/platform_device.h> |
7b6d864b | 22 | #include <linux/reboot.h> |
4a858cfc | 23 | #include <linux/device.h> |
bb072c3c | 24 | #include <linux/syscore_ops.h> |
96ce2385 | 25 | #include <linux/clk.h> |
fced80c7 | 26 | #include <linux/io.h> |
96ce2385 | 27 | |
9f97da78 | 28 | #include <asm/system_misc.h> |
96ce2385 BD |
29 | #include <asm/mach/arch.h> |
30 | #include <asm/mach/map.h> | |
31 | #include <asm/mach/irq.h> | |
32 | ||
a09e64fb | 33 | #include <mach/hardware.h> |
96ce2385 BD |
34 | #include <asm/irq.h> |
35 | ||
e425382e BD |
36 | #include <plat/cpu-freq.h> |
37 | ||
a09e64fb | 38 | #include <mach/regs-clock.h> |
a09e64fb | 39 | #include <mach/regs-gpio.h> |
96ce2385 | 40 | |
a2b7ba9c BD |
41 | #include <plat/devs.h> |
42 | #include <plat/cpu.h> | |
43 | #include <plat/pm.h> | |
96ce2385 | 44 | |
51cb1289 | 45 | #include "common.h" |
f8eed6cd | 46 | #include "nand-core.h" |
b4353784 KK |
47 | #include "regs-dsc.h" |
48 | ||
96ce2385 BD |
49 | static struct map_desc s3c244x_iodesc[] __initdata = { |
50 | IODESC_ENT(CLKPWR), | |
51 | IODESC_ENT(TIMER), | |
52 | IODESC_ENT(WATCHDOG), | |
96ce2385 BD |
53 | }; |
54 | ||
55 | /* uart initialisation */ | |
56 | ||
57 | void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |
58 | { | |
59 | s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); | |
60 | } | |
61 | ||
74b265d4 | 62 | void __init s3c244x_map_io(void) |
96ce2385 BD |
63 | { |
64 | /* register our io-tables */ | |
65 | ||
66 | iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc)); | |
96ce2385 BD |
67 | |
68 | /* rename any peripherals used differing from the s3c2410 */ | |
69 | ||
90239bbd | 70 | s3c_device_sdi.name = "s3c2440-sdi"; |
3e1b776c | 71 | s3c_device_i2c0.name = "s3c2440-i2c"; |
ef3f2dd4 | 72 | s3c_nand_setname("s3c2440-nand"); |
ce8877b5 | 73 | s3c_device_ts.name = "s3c2440-ts"; |
b8ccca4a | 74 | s3c_device_usbgadget.name = "s3c2440-usbgadget"; |
51cb1289 | 75 | s3c2410_device_dclk.name = "s3c2440-dclk"; |
96ce2385 BD |
76 | } |
77 | ||
4a858cfc | 78 | /* Since the S3C2442 and S3C2440 share items, put both subsystems here */ |
96ce2385 | 79 | |
4a858cfc | 80 | struct bus_type s3c2440_subsys = { |
af5ca3f4 | 81 | .name = "s3c2440-core", |
4a858cfc | 82 | .dev_name = "s3c2440-core", |
96ce2385 BD |
83 | }; |
84 | ||
4a858cfc | 85 | struct bus_type s3c2442_subsys = { |
af5ca3f4 | 86 | .name = "s3c2442-core", |
4a858cfc | 87 | .dev_name = "s3c2442-core", |
96ce2385 BD |
88 | }; |
89 | ||
4a858cfc | 90 | /* need to register the subsystem before we actually register the device, and |
96ce2385 BD |
91 | * we also need to ensure that it has been initialised before any of the |
92 | * drivers even try to use it (even if not on an s3c2440 based system) | |
93 | * as a driver which may support both 2410 and 2440 may try and use it. | |
94 | */ | |
95 | ||
96 | static int __init s3c2440_core_init(void) | |
97 | { | |
4a858cfc | 98 | return subsys_system_register(&s3c2440_subsys, NULL); |
96ce2385 BD |
99 | } |
100 | ||
101 | core_initcall(s3c2440_core_init); | |
102 | ||
103 | static int __init s3c2442_core_init(void) | |
104 | { | |
4a858cfc | 105 | return subsys_system_register(&s3c2442_subsys, NULL); |
96ce2385 BD |
106 | } |
107 | ||
108 | core_initcall(s3c2442_core_init); | |
bb072c3c RW |
109 | |
110 | ||
4f506daf | 111 | #ifdef CONFIG_PM_SLEEP |
bb072c3c RW |
112 | static struct sleep_save s3c244x_sleep[] = { |
113 | SAVE_ITEM(S3C2440_DSC0), | |
114 | SAVE_ITEM(S3C2440_DSC1), | |
115 | SAVE_ITEM(S3C2440_GPJDAT), | |
116 | SAVE_ITEM(S3C2440_GPJCON), | |
117 | SAVE_ITEM(S3C2440_GPJUP) | |
118 | }; | |
119 | ||
120 | static int s3c244x_suspend(void) | |
121 | { | |
122 | s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); | |
123 | return 0; | |
124 | } | |
125 | ||
126 | static void s3c244x_resume(void) | |
127 | { | |
128 | s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); | |
129 | } | |
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130 | |
131 | struct syscore_ops s3c244x_pm_syscore_ops = { | |
132 | .suspend = s3c244x_suspend, | |
133 | .resume = s3c244x_resume, | |
134 | }; | |
4f506daf | 135 | #endif |