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d626aeed BD |
1 | /* linux/arch/arm/mach-s3c6410/cpu.c |
2 | * | |
3 | * Copyright 2008 Simtec Electronics | |
4 | * Copyright 2008 Simtec Electronics | |
5 | * Ben Dooks <ben@simtec.co.uk> | |
6 | * http://armlinux.simtec.co.uk/ | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/types.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/timer.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/clk.h> | |
20 | #include <linux/io.h> | |
21 | #include <linux/sysdev.h> | |
22 | #include <linux/serial_core.h> | |
23 | #include <linux/platform_device.h> | |
24 | ||
25 | #include <asm/mach/arch.h> | |
26 | #include <asm/mach/map.h> | |
27 | #include <asm/mach/irq.h> | |
28 | ||
29 | #include <mach/hardware.h> | |
30 | #include <asm/irq.h> | |
31 | ||
32 | #include <plat/cpu-freq.h> | |
33 | #include <plat/regs-serial.h> | |
34 | ||
35 | #include <plat/cpu.h> | |
36 | #include <plat/devs.h> | |
37 | #include <plat/clock.h> | |
cf18acf0 | 38 | #include <plat/s3c6400.h> |
d626aeed BD |
39 | #include <plat/s3c6410.h> |
40 | ||
41 | /* Initial IO mappings */ | |
42 | ||
43 | static struct map_desc s3c6410_iodesc[] __initdata = { | |
44 | }; | |
45 | ||
46 | /* s3c6410_map_io | |
47 | * | |
48 | * register the standard cpu IO areas | |
49 | */ | |
50 | ||
51 | void __init s3c6410_map_io(void) | |
52 | { | |
53 | iotable_init(s3c6410_iodesc, ARRAY_SIZE(s3c6410_iodesc)); | |
54 | } | |
55 | ||
56 | void __init s3c6410_init_clocks(int xtal) | |
57 | { | |
39669f59 | 58 | printk(KERN_DEBUG "%s: initialising clocks\n", __func__); |
d626aeed | 59 | s3c24xx_register_baseclocks(xtal); |
4b31d8b2 | 60 | s3c64xx_register_clocks(); |
cf18acf0 BD |
61 | s3c6400_register_clocks(); |
62 | s3c6400_setup_clocks(); | |
d626aeed BD |
63 | } |
64 | ||
d9b79fb5 BD |
65 | void __init s3c6410_init_irq(void) |
66 | { | |
67 | /* VIC0 is missing IRQ7, VIC1 is fully populated. */ | |
68 | s3c64xx_init_irq(~0 & ~(1 << 7), ~0); | |
69 | } | |
70 | ||
d626aeed BD |
71 | struct sysdev_class s3c6410_sysclass = { |
72 | .name = "s3c6410-core", | |
73 | }; | |
74 | ||
75 | static struct sys_device s3c6410_sysdev = { | |
76 | .cls = &s3c6410_sysclass, | |
77 | }; | |
78 | ||
79 | static int __init s3c6410_core_init(void) | |
80 | { | |
81 | return sysdev_class_register(&s3c6410_sysclass); | |
82 | } | |
83 | ||
84 | core_initcall(s3c6410_core_init); | |
85 | ||
86 | int __init s3c6410_init(void) | |
87 | { | |
88 | printk("S3C6410: Initialising architecture\n"); | |
89 | ||
90 | return sysdev_register(&s3c6410_sysdev); | |
91 | } |