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Linux 3.6-rc1
[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-crag6410.c
CommitLineData
e1a3c74f
MB		 1/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
66211f98 22#include <linux/leds.h>
e1a3c74f 23#include <linux/delay.h>
fb7f60f3 24#include <linux/mmc/host.h>
e1a3c74f 25#include <linux/regulator/machine.h>
ae24c263 26#include <linux/regulator/fixed.h>
e1a3c74f
MB		 27#include <linux/pwm_backlight.h>
28#include <linux/dm9000.h>
29#include <linux/gpio_keys.h>
30#include <linux/basic_mmio_gpio.h>
31#include <linux/spi/spi.h>
32
33#include <linux/i2c/pca953x.h>
126625e1 34#include <linux/platform_data/s3c-hsotg.h>
e1a3c74f
MB		 35
36#include <video/platform_lcd.h>
37
38#include <linux/mfd/wm831x/core.h>
39#include <linux/mfd/wm831x/pdata.h>
ae24c263 40#include <linux/mfd/wm831x/irq.h>
e1a3c74f
MB		 41#include <linux/mfd/wm831x/gpio.h>
42
8504a3cb
MB		 43#include <sound/wm1250-ev1.h>
44
774b51f8 45#include <asm/hardware/vic.h>
e1a3c74f
MB		 46#include <asm/mach/arch.h>
47#include <asm/mach-types.h>
48
49#include <mach/hardware.h>
50#include <mach/map.h>
51
e1a3c74f
MB		 52#include <mach/regs-sys.h>
53#include <mach/regs-gpio.h>
54#include <mach/regs-modem.h>
d0f0b43f 55#include <mach/crag6410.h>
e1a3c74f 56
e1a3c74f
MB		 57#include <mach/regs-gpio-memport.h>
58
59#include <plat/regs-serial.h>
60#include <plat/regs-fb-v4.h>
61#include <plat/fb.h>
62#include <plat/sdhci.h>
63#include <plat/gpio-cfg.h>
64#include <plat/s3c64xx-spi.h>
65
66#include <plat/keypad.h>
67#include <plat/clock.h>
68#include <plat/devs.h>
69#include <plat/cpu.h>
70#include <plat/adc.h>
71#include <plat/iic.h>
72#include <plat/pm.h>
73
b024043b
KK		 74#include "common.h"
75
e1a3c74f
MB		 76/* serial port setup */
77
78#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
79#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
80#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
81
82static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
83 [0] = {
ae24c263
MB		 84 .hwport = 0,
85 .flags = 0,
86 .ucon = UCON,
87 .ulcon = ULCON,
88 .ufcon = UFCON,
e1a3c74f
MB		 89 },
90 [1] = {
ae24c263
MB		 91 .hwport = 1,
92 .flags = 0,
93 .ucon = UCON,
94 .ulcon = ULCON,
95 .ufcon = UFCON,
e1a3c74f
MB		 96 },
97 [2] = {
ae24c263
MB		 98 .hwport = 2,
99 .flags = 0,
100 .ucon = UCON,
101 .ulcon = ULCON,
102 .ufcon = UFCON,
e1a3c74f
MB		 103 },
104 [3] = {
ae24c263
MB		 105 .hwport = 3,
106 .flags = 0,
107 .ucon = UCON,
108 .ulcon = ULCON,
109 .ufcon = UFCON,
e1a3c74f
MB		 110 },
111};
112
113static struct platform_pwm_backlight_data crag6410_backlight_data = {
114 .pwm_id = 0,
115 .max_brightness = 1000,
116 .dft_brightness = 600,
117 .pwm_period_ns = 100000, /* about 1kHz */
118};
119
120static struct platform_device crag6410_backlight_device = {
121 .name = "pwm-backlight",
122 .id = -1,
123 .dev = {
124 .parent = &s3c_device_timer[0].dev,
125 .platform_data = &crag6410_backlight_data,
126 },
127};
128
129static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
130{
131 pr_debug("%s: setting power %d\n", __func__, power);
132
133 if (power) {
134 gpio_set_value(S3C64XX_GPB(0), 1);
135 msleep(1);
136 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
137 } else {
138 gpio_direction_output(S3C64XX_GPF(14), 0);
139 gpio_set_value(S3C64XX_GPB(0), 0);
140 }
141}
142
143static struct platform_device crag6410_lcd_powerdev = {
144 .name = "platform-lcd",
145 .id = -1,
146 .dev.parent = &s3c_device_fb.dev,
147 .dev.platform_data = &(struct plat_lcd_data) {
148 .set_power = crag6410_lcd_power_set,
149 },
150};
151
152/* 640x480 URT */
153static struct s3c_fb_pd_win crag6410_fb_win0 = {
e1a3c74f
MB		 154 .max_bpp = 32,
155 .default_bpp = 16,
79d3c41a
TA		 156 .xres = 640,
157 .yres = 480,
e1a3c74f
MB		 158 .virtual_y = 480 * 2,
159 .virtual_x = 640,
160};
161
79d3c41a
TA		 162static struct fb_videomode crag6410_lcd_timing = {
163 .left_margin = 150,
164 .right_margin = 80,
165 .upper_margin = 40,
166 .lower_margin = 5,
167 .hsync_len = 40,
168 .vsync_len = 5,
169 .xres = 640,
170 .yres = 480,
171};
172
e1a3c74f 173/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
70660e5d 174static struct s3c_fb_platdata crag6410_lcd_pdata __devinitdata = {
e1a3c74f 175 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
79d3c41a 176 .vtiming = &crag6410_lcd_timing,
e1a3c74f
MB		 177 .win[0] = &crag6410_fb_win0,
178 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
179 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
180};
181
182/* 2x6 keypad */
183
70660e5d 184static uint32_t crag6410_keymap[] __devinitdata = {
e1a3c74f
MB		 185 /* KEY(row, col, keycode) */
186 KEY(0, 0, KEY_VOLUMEUP),
187 KEY(0, 1, KEY_HOME),
188 KEY(0, 2, KEY_VOLUMEDOWN),
189 KEY(0, 3, KEY_HELP),
190 KEY(0, 4, KEY_MENU),
191 KEY(0, 5, KEY_MEDIA),
192 KEY(1, 0, 232),
193 KEY(1, 1, KEY_DOWN),
194 KEY(1, 2, KEY_LEFT),
195 KEY(1, 3, KEY_UP),
196 KEY(1, 4, KEY_RIGHT),
197 KEY(1, 5, KEY_CAMERA),
198};
199
70660e5d 200static struct matrix_keymap_data crag6410_keymap_data __devinitdata = {
e1a3c74f
MB		 201 .keymap = crag6410_keymap,
202 .keymap_size = ARRAY_SIZE(crag6410_keymap),
203};
204
70660e5d 205static struct samsung_keypad_platdata crag6410_keypad_data __devinitdata = {
e1a3c74f
MB		 206 .keymap_data = &crag6410_keymap_data,
207 .rows = 2,
208 .cols = 6,
209};
210
211static struct gpio_keys_button crag6410_gpio_keys[] = {
212 [0] = {
213 .code = KEY_SUSPEND,
214 .gpio = S3C64XX_GPL(10), /* EINT 18 */
ae24c263 215 .type = EV_KEY,
e1a3c74f
MB		 216 .wakeup = 1,
217 .active_low = 1,
218 },
ae24c263
MB		 219 [1] = {
220 .code = SW_FRONT_PROXIMITY,
221 .gpio = S3C64XX_GPN(11), /* EINT 11 */
222 .type = EV_SW,
223 },
e1a3c74f
MB		 224};
225
226static struct gpio_keys_platform_data crag6410_gpio_keydata = {
227 .buttons = crag6410_gpio_keys,
228 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
229};
230
231static struct platform_device crag6410_gpio_keydev = {
232 .name = "gpio-keys",
233 .id = 0,
234 .dev.platform_data = &crag6410_gpio_keydata,
235};
236
237static struct resource crag6410_dm9k_resource[] = {
8ebf148a
TB		 238 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
239 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
240 [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
241 | IORESOURCE_IRQ_HIGHLEVEL),
e1a3c74f
MB		 242};
243
244static struct dm9000_plat_data mini6410_dm9k_pdata = {
245 .flags = DM9000_PLATF_16BITONLY,
246};
247
248static struct platform_device crag6410_dm9k_device = {
249 .name = "dm9000",
250 .id = -1,
251 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
252 .resource = crag6410_dm9k_resource,
253 .dev.platform_data = &mini6410_dm9k_pdata,
254};
255
256static struct resource crag6410_mmgpio_resource[] = {
8ebf148a 257 [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
e1a3c74f
MB		 258};
259
260static struct platform_device crag6410_mmgpio = {
261 .name = "basic-mmio-gpio",
262 .id = -1,
263 .resource = crag6410_mmgpio_resource,
264 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
265 .dev.platform_data = &(struct bgpio_pdata) {
91b60b1d 266 .base = MMGPIO_GPIO_BASE,
e1a3c74f
MB		 267 },
268};
269
ae24c263
MB		 270static struct platform_device speyside_device = {
271 .name = "speyside",
272 .id = -1,
273};
274
8c051ab4
MB		 275static struct platform_device lowland_device = {
276 .name = "lowland",
277 .id = -1,
278};
279
6414261f
MB		 280static struct platform_device tobermory_device = {
281 .name = "tobermory",
ae24c263
MB		 282 .id = -1,
283};
284
c5c32c96
MB		 285static struct platform_device littlemill_device = {
286 .name = "littlemill",
287 .id = -1,
288};
289
ae24c263 290static struct regulator_consumer_supply wallvdd_consumers[] = {
554f01fb 291 REGULATOR_SUPPLY("SPKVDD", "1-001a"),
ae24c263
MB		 292 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
293 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
4ed12b50
MB		 294 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
295 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
402f624b
MB		 296
297 REGULATOR_SUPPLY("DC1VDD", "0-0034"),
298 REGULATOR_SUPPLY("DC2VDD", "0-0034"),
299 REGULATOR_SUPPLY("DC3VDD", "0-0034"),
300 REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
301 REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
302 REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
303 REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
304 REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
305 REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
306 REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
307 REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
308 REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
309 REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
310
311 REGULATOR_SUPPLY("DC1VDD", "1-0034"),
312 REGULATOR_SUPPLY("DC2VDD", "1-0034"),
313 REGULATOR_SUPPLY("DC3VDD", "1-0034"),
ae24c263
MB		 314};
315
316static struct regulator_init_data wallvdd_data = {
317 .constraints = {
318 .always_on = 1,
319 },
320 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
321 .consumer_supplies = wallvdd_consumers,
322};
323
324static struct fixed_voltage_config wallvdd_pdata = {
325 .supply_name = "WALLVDD",
326 .microvolts = 5000000,
327 .init_data = &wallvdd_data,
328 .gpio = -EINVAL,
329};
330
331static struct platform_device wallvdd_device = {
332 .name = "reg-fixed-voltage",
333 .id = -1,
334 .dev = {
335 .platform_data = &wallvdd_pdata,
336 },
337};
338
e1a3c74f
MB		 339static struct platform_device *crag6410_devices[] __initdata = {
340 &s3c_device_hsmmc0,
e1a3c74f
MB		 341 &s3c_device_hsmmc2,
342 &s3c_device_i2c0,
343 &s3c_device_i2c1,
344 &s3c_device_fb,
345 &s3c_device_ohci,
346 &s3c_device_usb_hsotg,
e1a3c74f
MB		 347 &s3c_device_timer[0],
348 &s3c64xx_device_iis0,
349 &s3c64xx_device_iis1,
350 &samsung_asoc_dma,
351 &samsung_device_keypad,
352 &crag6410_gpio_keydev,
353 &crag6410_dm9k_device,
354 &s3c64xx_device_spi0,
355 &crag6410_mmgpio,
356 &crag6410_lcd_powerdev,
357 &crag6410_backlight_device,
ae24c263 358 &speyside_device,
6414261f 359 &tobermory_device,
c5c32c96 360 &littlemill_device,
8c051ab4 361 &lowland_device,
ae24c263 362 &wallvdd_device,
e1a3c74f
MB		 363};
364
365static struct pca953x_platform_data crag6410_pca_data = {
366 .gpio_base = PCA935X_GPIO_BASE,
6e11e0bd 367 .irq_base = -1,
e1a3c74f
MB		 368};
369
986afc98
MB		 370/* VDDARM is controlled by DVS1 connected to GPK(0) */
371static struct wm831x_buckv_pdata vddarm_pdata = {
372 .dvs_control_src = 1,
373 .dvs_gpio = S3C64XX_GPK(0),
374};
375
70660e5d 376static struct regulator_consumer_supply vddarm_consumers[] __devinitdata = {
e1a3c74f
MB		 377 REGULATOR_SUPPLY("vddarm", NULL),
378};
379
70660e5d 380static struct regulator_init_data vddarm __devinitdata = {
e1a3c74f
MB		 381 .constraints = {
382 .name = "VDDARM",
383 .min_uV = 1000000,
384 .max_uV = 1300000,
385 .always_on = 1,
386 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
387 },
388 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
389 .consumer_supplies = vddarm_consumers,
35127296 390 .supply_regulator = "WALLVDD",
986afc98 391 .driver_data = &vddarm_pdata,
e1a3c74f
MB		 392};
393
70660e5d 394static struct regulator_consumer_supply vddint_consumers[] __devinitdata = {
39cb263e
MB		 395 REGULATOR_SUPPLY("vddint", NULL),
396};
397
70660e5d 398static struct regulator_init_data vddint __devinitdata = {
e1a3c74f
MB		 399 .constraints = {
400 .name = "VDDINT",
401 .min_uV = 1000000,
402 .max_uV = 1200000,
403 .always_on = 1,
404 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
405 },
39cb263e
MB		 406 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
407 .consumer_supplies = vddint_consumers,
408 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 409};
410
70660e5d 411static struct regulator_init_data vddmem __devinitdata = {
e1a3c74f
MB		 412 .constraints = {
413 .name = "VDDMEM",
414 .always_on = 1,
415 },
416};
417
70660e5d 418static struct regulator_init_data vddsys __devinitdata = {
e1a3c74f
MB		 419 .constraints = {
420 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
421 .always_on = 1,
422 },
423};
424
70660e5d 425static struct regulator_consumer_supply vddmmc_consumers[] __devinitdata = {
e1a3c74f
MB		 426 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
427 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
428 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
429};
430
70660e5d 431static struct regulator_init_data vddmmc __devinitdata = {
e1a3c74f
MB		 432 .constraints = {
433 .name = "VDDMMC,UH",
434 .always_on = 1,
435 },
436 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
437 .consumer_supplies = vddmmc_consumers,
35127296 438 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 439};
440
70660e5d 441static struct regulator_init_data vddotgi __devinitdata = {
e1a3c74f
MB		 442 .constraints = {
443 .name = "VDDOTGi",
444 .always_on = 1,
445 },
35127296 446 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 447};
448
70660e5d 449static struct regulator_init_data vddotg __devinitdata = {
e1a3c74f
MB		 450 .constraints = {
451 .name = "VDDOTG",
452 .always_on = 1,
453 },
35127296 454 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 455};
456
70660e5d 457static struct regulator_init_data vddhi __devinitdata = {
e1a3c74f
MB		 458 .constraints = {
459 .name = "VDDHI",
460 .always_on = 1,
461 },
35127296 462 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 463};
464
70660e5d 465static struct regulator_init_data vddadc __devinitdata = {
e1a3c74f
MB		 466 .constraints = {
467 .name = "VDDADC,VDDDAC",
468 .always_on = 1,
469 },
35127296 470 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 471};
472
70660e5d 473static struct regulator_init_data vddmem0 __devinitdata = {
e1a3c74f
MB		 474 .constraints = {
475 .name = "VDDMEM0",
476 .always_on = 1,
477 },
35127296 478 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 479};
480
70660e5d 481static struct regulator_init_data vddpll __devinitdata = {
e1a3c74f
MB		 482 .constraints = {
483 .name = "VDDPLL",
484 .always_on = 1,
485 },
35127296 486 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 487};
488
70660e5d 489static struct regulator_init_data vddlcd __devinitdata = {
e1a3c74f
MB		 490 .constraints = {
491 .name = "VDDLCD",
492 .always_on = 1,
493 },
35127296 494 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 495};
496
70660e5d 497static struct regulator_init_data vddalive __devinitdata = {
e1a3c74f
MB		 498 .constraints = {
499 .name = "VDDALIVE",
500 .always_on = 1,
501 },
35127296 502 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 503};
504
70660e5d 505static struct wm831x_backup_pdata banff_backup_pdata __devinitdata = {
89e1c3d0
MB		 506 .charger_enable = 1,
507 .vlim = 2500, /* mV */
508 .ilim = 200, /* uA */
509};
510
70660e5d 511static struct wm831x_status_pdata banff_red_led __devinitdata = {
e1a3c74f
MB		 512 .name = "banff:red:",
513 .default_src = WM831X_STATUS_MANUAL,
514};
515
70660e5d 516static struct wm831x_status_pdata banff_green_led __devinitdata = {
e1a3c74f
MB		 517 .name = "banff:green:",
518 .default_src = WM831X_STATUS_MANUAL,
519};
520
70660e5d 521static struct wm831x_touch_pdata touch_pdata __devinitdata = {
e1a3c74f 522 .data_irq = S3C_EINT(26),
ae24c263 523 .pd_irq = S3C_EINT(27),
e1a3c74f
MB		 524};
525
70660e5d 526static struct wm831x_pdata crag_pmic_pdata __devinitdata = {
ae24c263 527 .wm831x_num = 1,
aaed44e1 528 .gpio_base = BANFF_PMIC_GPIO_BASE,
dcf3580a 529 .soft_shutdown = true,
e1a3c74f 530
89e1c3d0
MB		 531 .backup = &banff_backup_pdata,
532
ae24c263 533 .gpio_defaults = {
986afc98
MB		 534 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
535 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
ae24c263
MB		 536 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
537 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
538 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
539 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
540 },
541
e1a3c74f
MB		 542 .dcdc = {
543 &vddarm, /* DCDC1 */
544 &vddint, /* DCDC2 */
545 &vddmem, /* DCDC3 */
546 },
547
548 .ldo = {
549 &vddsys, /* LDO1 */
550 &vddmmc, /* LDO2 */
551 NULL, /* LDO3 */
552 &vddotgi, /* LDO4 */
553 &vddotg, /* LDO5 */
554 &vddhi, /* LDO6 */
555 &vddadc, /* LDO7 */
556 &vddmem0, /* LDO8 */
557 &vddpll, /* LDO9 */
558 &vddlcd, /* LDO10 */
559 &vddalive, /* LDO11 */
560 },
561
562 .status = {
563 &banff_green_led,
564 &banff_red_led,
565 },
566
567 .touch = &touch_pdata,
568};
569
70660e5d 570static struct i2c_board_info i2c_devs0[] __devinitdata = {
e1a3c74f
MB		 571 { I2C_BOARD_INFO("24c08", 0x50), },
572 { I2C_BOARD_INFO("tca6408", 0x20),
573 .platform_data = &crag6410_pca_data,
574 },
575 { I2C_BOARD_INFO("wm8312", 0x34),
576 .platform_data = &crag_pmic_pdata,
577 .irq = S3C_EINT(23),
578 },
579};
580
581static struct s3c2410_platform_i2c i2c0_pdata = {
582 .frequency = 400000,
583};
584
70660e5d 585static struct regulator_consumer_supply pvdd_1v2_consumers[] __devinitdata = {
cda2349a
MB		 586 REGULATOR_SUPPLY("DCVDD", "spi0.0"),
587 REGULATOR_SUPPLY("AVDD", "spi0.0"),
588};
589
70660e5d 590static struct regulator_init_data pvdd_1v2 __devinitdata = {
ae24c263
MB		 591 .constraints = {
592 .name = "PVDD_1V2",
cda2349a 593 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
ae24c263 594 },
cda2349a
MB		 595
596 .consumer_supplies = pvdd_1v2_consumers,
597 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
ae24c263
MB		 598};
599
70660e5d 600static struct regulator_consumer_supply pvdd_1v8_consumers[] __devinitdata = {
d5160ecf 601 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
ae24c263
MB		 602 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
603 REGULATOR_SUPPLY("DBVDD", "1-001a"),
4ed12b50
MB		 604 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
605 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
606 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
ae24c263
MB		 607 REGULATOR_SUPPLY("CPVDD", "1-001a"),
608 REGULATOR_SUPPLY("AVDD2", "1-001a"),
609 REGULATOR_SUPPLY("DCVDD", "1-001a"),
610 REGULATOR_SUPPLY("AVDD", "1-001a"),
cda2349a 611 REGULATOR_SUPPLY("DBVDD", "spi0.0"),
ae24c263
MB		 612};
613
70660e5d 614static struct regulator_init_data pvdd_1v8 __devinitdata = {
ae24c263
MB		 615 .constraints = {
616 .name = "PVDD_1V8",
617 .always_on = 1,
618 },
619
620 .consumer_supplies = pvdd_1v8_consumers,
621 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
622};
623
70660e5d 624static struct regulator_consumer_supply pvdd_3v3_consumers[] __devinitdata = {
ae24c263
MB		 625 REGULATOR_SUPPLY("MICVDD", "1-001a"),
626 REGULATOR_SUPPLY("AVDD1", "1-001a"),
627};
628
70660e5d 629static struct regulator_init_data pvdd_3v3 __devinitdata = {
ae24c263
MB		 630 .constraints = {
631 .name = "PVDD_3V3",
632 .always_on = 1,
633 },
634
635 .consumer_supplies = pvdd_3v3_consumers,
636 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
637};
638
70660e5d 639static struct wm831x_pdata glenfarclas_pmic_pdata __devinitdata = {
ae24c263
MB		 640 .wm831x_num = 2,
641 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
642 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
dcf3580a 643 .soft_shutdown = true,
ae24c263
MB		 644
645 .gpio_defaults = {
646 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
647 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
648 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
649 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
650 },
651
652 .dcdc = {
653 &pvdd_1v2, /* DCDC1 */
654 &pvdd_1v8, /* DCDC2 */
655 &pvdd_3v3, /* DCDC3 */
656 },
657
658 .disable_touch = true,
659};
660
8504a3cb
MB		 661static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
662 .gpios = {
663 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
664 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
665 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
666 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
667 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
668 },
669};
670
70660e5d 671static struct i2c_board_info i2c_devs1[] __devinitdata = {
e1a3c74f 672 { I2C_BOARD_INFO("wm8311", 0x34),
ae24c263
MB		 673 .irq = S3C_EINT(0),
674 .platform_data = &glenfarclas_pmic_pdata },
675
ea070cd2 676 { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
d0f0b43f
MB		 677 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
678 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
679 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
680
8504a3cb
MB		 681 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
682 .platform_data = &wm1250_ev1_pdata },
e1a3c74f
MB		 683};
684
8351c7aa
MB		 685static struct s3c2410_platform_i2c i2c1_pdata = {
686 .frequency = 400000,
687 .bus_num = 1,
e1a3c74f
MB		 688};
689
690static void __init crag6410_map_io(void)
691{
692 s3c64xx_init_io(NULL, 0);
693 s3c24xx_init_clocks(12000000);
694 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
695
696 /* LCD type and Bypass set by bootloader */
697}
698
699static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
700 .max_width = 4,
701 .cd_type = S3C_SDHCI_CD_PERMANENT,
a9294cdc 702 .host_caps = MMC_CAP_POWER_OFF_CARD,
e1a3c74f
MB		 703};
704
e1a3c74f
MB		 705static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
706{
707 /* Set all the necessary GPG pins to special-function 2 */
708 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
709
710 /* force card-detected for prototype 0 */
711 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
712}
713
714static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
715 .max_width = 4,
716 .cd_type = S3C_SDHCI_CD_INTERNAL,
717 .cfg_gpio = crag6410_cfg_sdhci0,
fb7f60f3 718 .host_caps = MMC_CAP_POWER_OFF_CARD,
e1a3c74f
MB		 719};
720
66211f98
MB		 721static const struct gpio_led gpio_leds[] = {
722 {
723 .name = "d13:green:",
724 .gpio = MMGPIO_GPIO_BASE + 0,
725 .default_state = LEDS_GPIO_DEFSTATE_ON,
726 },
727 {
728 .name = "d14:green:",
729 .gpio = MMGPIO_GPIO_BASE + 1,
730 .default_state = LEDS_GPIO_DEFSTATE_ON,
731 },
732 {
733 .name = "d15:green:",
734 .gpio = MMGPIO_GPIO_BASE + 2,
735 .default_state = LEDS_GPIO_DEFSTATE_ON,
736 },
737 {
738 .name = "d16:green:",
739 .gpio = MMGPIO_GPIO_BASE + 3,
740 .default_state = LEDS_GPIO_DEFSTATE_ON,
741 },
742 {
743 .name = "d17:green:",
744 .gpio = MMGPIO_GPIO_BASE + 4,
745 .default_state = LEDS_GPIO_DEFSTATE_ON,
746 },
747 {
748 .name = "d18:green:",
749 .gpio = MMGPIO_GPIO_BASE + 5,
750 .default_state = LEDS_GPIO_DEFSTATE_ON,
751 },
752 {
753 .name = "d19:green:",
754 .gpio = MMGPIO_GPIO_BASE + 6,
755 .default_state = LEDS_GPIO_DEFSTATE_ON,
756 },
757 {
758 .name = "d20:green:",
759 .gpio = MMGPIO_GPIO_BASE + 7,
760 .default_state = LEDS_GPIO_DEFSTATE_ON,
761 },
762};
763
764static const struct gpio_led_platform_data gpio_leds_pdata = {
765 .leds = gpio_leds,
766 .num_leds = ARRAY_SIZE(gpio_leds),
e1a3c74f
MB		 767};
768
99f6e1f5
JS		 769static struct s3c_hsotg_plat crag6410_hsotg_pdata;
770
e1a3c74f
MB		 771static void __init crag6410_machine_init(void)
772{
773 /* Open drain IRQs need pullups */
774 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
775 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
776
777 gpio_request(S3C64XX_GPB(0), "LCD power");
778 gpio_direction_output(S3C64XX_GPB(0), 0);
779
780 gpio_request(S3C64XX_GPF(14), "LCD PWM");
781 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
782
783 gpio_request(S3C64XX_GPB(1), "SD power");
784 gpio_direction_output(S3C64XX_GPB(1), 0);
785
786 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
787 gpio_direction_output(S3C64XX_GPF(10), 1);
788
789 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
e1a3c74f
MB		 790 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
791
792 s3c_i2c0_set_platdata(&i2c0_pdata);
8351c7aa 793 s3c_i2c1_set_platdata(&i2c1_pdata);
e1a3c74f 794 s3c_fb_set_platdata(&crag6410_lcd_pdata);
99f6e1f5 795 s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
e1a3c74f
MB		 796
797 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
798 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
799
800 samsung_keypad_set_platdata(&crag6410_keypad_data);
4d0efdd5 801 s3c64xx_spi0_set_platdata(NULL, 0, 1);
e1a3c74f
MB		 802
803 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
804
66211f98
MB		 805 gpio_led_register_device(-1, &gpio_leds_pdata);
806
ae24c263
MB		 807 regulator_has_full_constraints();
808
c656c306 809 s3c64xx_pm_init();
e1a3c74f
MB		 810}
811
812MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
813 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
170a5908 814 .atag_offset = 0x100,
e1a3c74f 815 .init_irq = s3c6410_init_irq,
774b51f8 816 .handle_irq = vic_handle_irq,
e1a3c74f
MB		 817 .map_io = crag6410_map_io,
818 .init_machine = crag6410_machine_init,
cc8f252b 819 .init_late = s3c64xx_init_late,
e1a3c74f 820 .timer = &s3c24xx_timer,
ff84ded2 821 .restart = s3c64xx_restart,
e1a3c74f 822MACHINE_END
Linux kernel - Deliverables
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