[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-crag6410.c

/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
 *
 * Copyright 2011 Wolfson Microelectronics plc
 *	Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 * Copyright 2011 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/fb.h>
#include <linux/io.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <linux/pwm_backlight.h>
#include <linux/dm9000.h>
#include <linux/gpio_keys.h>
#include <linux/basic_mmio_gpio.h>
#include <linux/spi/spi.h>

#include <linux/i2c/pca953x.h>

#include <video/platform_lcd.h>

#include <linux/mfd/wm831x/core.h>
#include <linux/mfd/wm831x/pdata.h>
#include <linux/mfd/wm831x/irq.h>
#include <linux/mfd/wm831x/gpio.h>

#include <sound/wm1250-ev1.h>

#include <asm/mach/arch.h>
#include <asm/mach-types.h>

#include <mach/hardware.h>
#include <mach/map.h>

#include <mach/regs-sys.h>
#include <mach/regs-gpio.h>
#include <mach/regs-modem.h>
#include <mach/crag6410.h>

#include <mach/regs-gpio-memport.h>

#include <plat/s3c6410.h>
#include <plat/regs-serial.h>
#include <plat/regs-fb-v4.h>
#include <plat/fb.h>
#include <plat/sdhci.h>
#include <plat/gpio-cfg.h>
#include <plat/s3c64xx-spi.h>

#include <plat/keypad.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/adc.h>
#include <plat/iic.h>
#include <plat/pm.h>

/* serial port setup */

#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)

static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
	[0] = {
		.hwport		= 0,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
	[1] = {
		.hwport		= 1,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
	[2] = {
		.hwport		= 2,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
	[3] = {
		.hwport		= 3,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
};

static struct platform_pwm_backlight_data crag6410_backlight_data = {
	.pwm_id		= 0,
	.max_brightness	= 1000,
	.dft_brightness	= 600,
	.pwm_period_ns	= 100000,	/* about 1kHz */
};

static struct platform_device crag6410_backlight_device = {
	.name		= "pwm-backlight",
	.id		= -1,
	.dev		= {
		.parent	= &s3c_device_timer[0].dev,
		.platform_data = &crag6410_backlight_data,
	},
};

static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
{
	pr_debug("%s: setting power %d\n", __func__, power);

	if (power) {
		gpio_set_value(S3C64XX_GPB(0), 1);
		msleep(1);
		s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
	} else {
		gpio_direction_output(S3C64XX_GPF(14), 0);
		gpio_set_value(S3C64XX_GPB(0), 0);
	}
}

static struct platform_device crag6410_lcd_powerdev = {
	.name			= "platform-lcd",
	.id			= -1,
	.dev.parent		= &s3c_device_fb.dev,
	.dev.platform_data	= &(struct plat_lcd_data) {
		.set_power	= crag6410_lcd_power_set,
	},
};

/* 640x480 URT */
static struct s3c_fb_pd_win crag6410_fb_win0 = {
	/* this is to ensure we use win0 */
	.win_mode	= {
		.left_margin	= 150,
		.right_margin	= 80,
		.upper_margin	= 40,
		.lower_margin	= 5,
		.hsync_len	= 40,
		.vsync_len	= 5,
		.xres		= 640,
		.yres		= 480,
	},
	.max_bpp	= 32,
	.default_bpp	= 16,
	.virtual_y	= 480 * 2,
	.virtual_x	= 640,
};

/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
	.win[0]		= &crag6410_fb_win0,
	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
};

/* 2x6 keypad */

static uint32_t crag6410_keymap[] __initdata = {
	/* KEY(row, col, keycode) */
	KEY(0, 0, KEY_VOLUMEUP),
	KEY(0, 1, KEY_HOME),
	KEY(0, 2, KEY_VOLUMEDOWN),
	KEY(0, 3, KEY_HELP),
	KEY(0, 4, KEY_MENU),
	KEY(0, 5, KEY_MEDIA),
	KEY(1, 0, 232),
	KEY(1, 1, KEY_DOWN),
	KEY(1, 2, KEY_LEFT),
	KEY(1, 3, KEY_UP),
	KEY(1, 4, KEY_RIGHT),
	KEY(1, 5, KEY_CAMERA),
};

static struct matrix_keymap_data crag6410_keymap_data __initdata = {
	.keymap		= crag6410_keymap,
	.keymap_size	= ARRAY_SIZE(crag6410_keymap),
};

static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
	.keymap_data	= &crag6410_keymap_data,
	.rows		= 2,
	.cols		= 6,
};

static struct gpio_keys_button crag6410_gpio_keys[] = {
	[0] = {
		.code	= KEY_SUSPEND,
		.gpio	= S3C64XX_GPL(10),	/* EINT 18 */
		.type	= EV_KEY,
		.wakeup	= 1,
		.active_low = 1,
	},
	[1] = {
		.code	= SW_FRONT_PROXIMITY,
		.gpio	= S3C64XX_GPN(11),	/* EINT 11 */
		.type	= EV_SW,
	},
};

static struct gpio_keys_platform_data crag6410_gpio_keydata = {
	.buttons	= crag6410_gpio_keys,
	.nbuttons	= ARRAY_SIZE(crag6410_gpio_keys),
};

static struct platform_device crag6410_gpio_keydev = {
	.name		= "gpio-keys",
	.id		= 0,
	.dev.platform_data = &crag6410_gpio_keydata,
};

static struct resource crag6410_dm9k_resource[] = {
	[0] = {
		.start	= S3C64XX_PA_XM0CSN5,
		.end	= S3C64XX_PA_XM0CSN5 + 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= S3C64XX_PA_XM0CSN5 + (1 << 8),
		.end	= S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
		.flags	= IORESOURCE_MEM,
	},
	[2] = {
		.start	= S3C_EINT(17),
		.end	= S3C_EINT(17),
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct dm9000_plat_data mini6410_dm9k_pdata = {
	.flags	= DM9000_PLATF_16BITONLY,
};

static struct platform_device crag6410_dm9k_device = {
	.name		= "dm9000",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(crag6410_dm9k_resource),
	.resource	= crag6410_dm9k_resource,
	.dev.platform_data = &mini6410_dm9k_pdata,
};

static struct resource crag6410_mmgpio_resource[] = {
	[0] = {
		.start	= S3C64XX_PA_XM0CSN4 + 1,
		.end	= S3C64XX_PA_XM0CSN4 + 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device crag6410_mmgpio = {
	.name		= "basic-mmio-gpio",
	.id		= -1,
	.resource	= crag6410_mmgpio_resource,
	.num_resources	= ARRAY_SIZE(crag6410_mmgpio_resource),
	.dev.platform_data = &(struct bgpio_pdata) {
		.base	= -1,
	},
};

static struct platform_device speyside_device = {
	.name		= "speyside",
	.id		= -1,
};

static struct platform_device lowland_device = {
	.name		= "lowland",
	.id		= -1,
};

static struct platform_device speyside_wm8962_device = {
	.name		= "speyside-wm8962",
	.id		= -1,
};

static struct regulator_consumer_supply wallvdd_consumers[] = {
	REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
	REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
	REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
	REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
};

static struct regulator_init_data wallvdd_data = {
	.constraints = {
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
	.consumer_supplies = wallvdd_consumers,
};

static struct fixed_voltage_config wallvdd_pdata = {
	.supply_name = "WALLVDD",
	.microvolts = 5000000,
	.init_data = &wallvdd_data,
	.gpio = -EINVAL,
};

static struct platform_device wallvdd_device = {
	.name		= "reg-fixed-voltage",
	.id		= -1,
	.dev = {
		.platform_data = &wallvdd_pdata,
	},
};

static struct platform_device *crag6410_devices[] __initdata = {
	&s3c_device_hsmmc0,
	&s3c_device_hsmmc1,
	&s3c_device_hsmmc2,
	&s3c_device_i2c0,
	&s3c_device_i2c1,
	&s3c_device_fb,
	&s3c_device_ohci,
	&s3c_device_usb_hsotg,
	&s3c_device_timer[0],
	&s3c64xx_device_iis0,
	&s3c64xx_device_iis1,
	&samsung_asoc_dma,
	&samsung_device_keypad,
	&crag6410_gpio_keydev,
	&crag6410_dm9k_device,
	&s3c64xx_device_spi0,
	&crag6410_mmgpio,
	&crag6410_lcd_powerdev,
	&crag6410_backlight_device,
	&speyside_device,
	&speyside_wm8962_device,
	&lowland_device,
	&wallvdd_device,
};

static struct pca953x_platform_data crag6410_pca_data = {
	.gpio_base	= PCA935X_GPIO_BASE,
	.irq_base	= 0,
};

/* VDDARM is controlled by DVS1 connected to GPK(0) */
static struct wm831x_buckv_pdata vddarm_pdata = {
	.dvs_control_src = 1,
	.dvs_gpio = S3C64XX_GPK(0),
};

static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
	REGULATOR_SUPPLY("vddarm", NULL),
};

static struct regulator_init_data vddarm __initdata = {
	.constraints = {
		.name = "VDDARM",
		.min_uV = 1000000,
		.max_uV = 1300000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
	.num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
	.consumer_supplies = vddarm_consumers,
	.supply_regulator = "WALLVDD",
	.driver_data = &vddarm_pdata,
};

static struct regulator_init_data vddint __initdata = {
	.constraints = {
		.name = "VDDINT",
		.min_uV = 1000000,
		.max_uV = 1200000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
};

static struct regulator_init_data vddmem __initdata = {
	.constraints = {
		.name = "VDDMEM",
		.always_on = 1,
	},
};

static struct regulator_init_data vddsys __initdata = {
	.constraints = {
		.name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
		.always_on = 1,
	},
};

static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
};

static struct regulator_init_data vddmmc __initdata = {
	.constraints = {
		.name = "VDDMMC,UH",
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
	.consumer_supplies = vddmmc_consumers,
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddotgi __initdata = {
	.constraints = {
		.name = "VDDOTGi",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddotg __initdata = {
	.constraints = {
		.name = "VDDOTG",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddhi __initdata = {
	.constraints = {
		.name = "VDDHI",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddadc __initdata = {
	.constraints = {
		.name = "VDDADC,VDDDAC",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddmem0 __initdata = {
	.constraints = {
		.name = "VDDMEM0",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddpll __initdata = {
	.constraints = {
		.name = "VDDPLL",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddlcd __initdata = {
	.constraints = {
		.name = "VDDLCD",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddalive __initdata = {
	.constraints = {
		.name = "VDDALIVE",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
	.charger_enable = 1,
	.vlim = 2500,  /* mV */
	.ilim = 200,   /* uA */
};

static struct wm831x_status_pdata banff_red_led __initdata = {
	.name = "banff:red:",
	.default_src = WM831X_STATUS_MANUAL,
};

static struct wm831x_status_pdata banff_green_led __initdata = {
	.name = "banff:green:",
	.default_src = WM831X_STATUS_MANUAL,
};

static struct wm831x_touch_pdata touch_pdata __initdata = {
	.data_irq = S3C_EINT(26),
	.pd_irq = S3C_EINT(27),
};

static struct wm831x_pdata crag_pmic_pdata __initdata = {
	.wm831x_num = 1,
	.irq_base = BANFF_PMIC_IRQ_BASE,
	.gpio_base = BANFF_PMIC_GPIO_BASE,
	.soft_shutdown = true,

	.backup = &banff_backup_pdata,

	.gpio_defaults = {
		/* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
		[4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
		/* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
		[10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
		/* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
		[11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
	},

	.dcdc = {
		&vddarm,  /* DCDC1 */
		&vddint,  /* DCDC2 */
		&vddmem,  /* DCDC3 */
	},

	.ldo = {
		&vddsys,   /* LDO1 */
		&vddmmc,   /* LDO2 */
		NULL,      /* LDO3 */
		&vddotgi,  /* LDO4 */
		&vddotg,   /* LDO5 */
		&vddhi,    /* LDO6 */
		&vddadc,   /* LDO7 */
		&vddmem0,  /* LDO8 */
		&vddpll,   /* LDO9 */
		&vddlcd,   /* LDO10 */
		&vddalive, /* LDO11 */
	},

	.status = {
		&banff_green_led,
		&banff_red_led,
	},

	.touch = &touch_pdata,
};

static struct i2c_board_info i2c_devs0[] __initdata = {
	{ I2C_BOARD_INFO("24c08", 0x50), },
	{ I2C_BOARD_INFO("tca6408", 0x20),
	  .platform_data = &crag6410_pca_data,
	},
	{ I2C_BOARD_INFO("wm8312", 0x34),
	  .platform_data = &crag_pmic_pdata,
	  .irq = S3C_EINT(23),
	},
};

static struct s3c2410_platform_i2c i2c0_pdata = {
	.frequency = 400000,
};

static struct regulator_init_data pvdd_1v2 __initdata = {
	.constraints = {
		.name = "PVDD_1V2",
		.always_on = 1,
	},
};

static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
	REGULATOR_SUPPLY("LDOVDD", "1-001a"),
	REGULATOR_SUPPLY("PLLVDD", "1-001a"),
	REGULATOR_SUPPLY("DBVDD", "1-001a"),
	REGULATOR_SUPPLY("DBVDD1", "1-001a"),
	REGULATOR_SUPPLY("DBVDD2", "1-001a"),
	REGULATOR_SUPPLY("DBVDD3", "1-001a"),
	REGULATOR_SUPPLY("CPVDD", "1-001a"),
	REGULATOR_SUPPLY("AVDD2", "1-001a"),
	REGULATOR_SUPPLY("DCVDD", "1-001a"),
	REGULATOR_SUPPLY("AVDD", "1-001a"),
};

static struct regulator_init_data pvdd_1v8 __initdata = {
	.constraints = {
		.name = "PVDD_1V8",
		.always_on = 1,
	},

	.consumer_supplies = pvdd_1v8_consumers,
	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
};

static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
	REGULATOR_SUPPLY("MICVDD", "1-001a"),
	REGULATOR_SUPPLY("AVDD1", "1-001a"),
};

static struct regulator_init_data pvdd_3v3 __initdata = {
	.constraints = {
		.name = "PVDD_3V3",
		.always_on = 1,
	},

	.consumer_supplies = pvdd_3v3_consumers,
	.num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
};

static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
	.wm831x_num = 2,
	.irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
	.gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
	.soft_shutdown = true,

	.gpio_defaults = {
		/* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
		[0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
		[1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
		[2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
	},

	.dcdc = {
		&pvdd_1v2,  /* DCDC1 */
		&pvdd_1v8,  /* DCDC2 */
		&pvdd_3v3,  /* DCDC3 */
	},

	.disable_touch = true,
};

static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
	.gpios = {
		[WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
		[WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
		[WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
		[WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
		[WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
	},
};

static struct i2c_board_info i2c_devs1[] __initdata = {
	{ I2C_BOARD_INFO("wm8311", 0x34),
	  .irq = S3C_EINT(0),
	  .platform_data = &glenfarclas_pmic_pdata },

	{ I2C_BOARD_INFO("wlf-gf-module", 0x24) },
	{ I2C_BOARD_INFO("wlf-gf-module", 0x25) },
	{ I2C_BOARD_INFO("wlf-gf-module", 0x26) },

	{ I2C_BOARD_INFO("wm1250-ev1", 0x27),
	  .platform_data = &wm1250_ev1_pdata },
};

static struct s3c2410_platform_i2c i2c1_pdata = {
	.frequency = 400000,
	.bus_num = 1,
};

static void __init crag6410_map_io(void)
{
	s3c64xx_init_io(NULL, 0);
	s3c24xx_init_clocks(12000000);
	s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));

	/* LCD type and Bypass set by bootloader */
}

static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
	.max_width		= 4,
	.cd_type		= S3C_SDHCI_CD_PERMANENT,
};

static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
	.max_width		= 4,
	.cd_type		= S3C_SDHCI_CD_GPIO,
	.ext_cd_gpio		= S3C64XX_GPF(11),
};

static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
{
	/* Set all the necessary GPG pins to special-function 2 */
	s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));

	/* force card-detected for prototype 0 */
	s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
}

static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
	.max_width		= 4,
	.cd_type		= S3C_SDHCI_CD_INTERNAL,
	.cfg_gpio		= crag6410_cfg_sdhci0,
};

static void __init crag6410_machine_init(void)
{
	/* Open drain IRQs need pullups */
	s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
	s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);

	gpio_request(S3C64XX_GPB(0), "LCD power");
	gpio_direction_output(S3C64XX_GPB(0), 0);

	gpio_request(S3C64XX_GPF(14), "LCD PWM");
	gpio_direction_output(S3C64XX_GPF(14), 0);  /* turn off */

	gpio_request(S3C64XX_GPB(1), "SD power");
	gpio_direction_output(S3C64XX_GPB(1), 0);

	gpio_request(S3C64XX_GPF(10), "nRESETSEL");
	gpio_direction_output(S3C64XX_GPF(10), 1);

	s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
	s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
	s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);

	s3c_i2c0_set_platdata(&i2c0_pdata);
	s3c_i2c1_set_platdata(&i2c1_pdata);
	s3c_fb_set_platdata(&crag6410_lcd_pdata);

	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));

	samsung_keypad_set_platdata(&crag6410_keypad_data);

	platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));

	regulator_has_full_constraints();

	s3c_pm_init();
}

MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
	/* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
	.atag_offset	= 0x100,
	.init_irq	= s3c6410_init_irq,
	.map_io		= crag6410_map_io,
	.init_machine	= crag6410_machine_init,
	.timer		= &s3c24xx_timer,
MACHINE_END
Commit	Line	Data
e1a3c74f MB	1	/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
	2	*
	3	* Copyright 2011 Wolfson Microelectronics plc
	4	* Mark Brown <broonie@opensource.wolfsonmicro.com>
	5	*
	6	* Copyright 2011 Simtec Electronics
	7	* Ben Dooks <ben@simtec.co.uk>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/list.h>
	16	#include <linux/serial_core.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/fb.h>
	19	#include <linux/io.h>
	20	#include <linux/init.h>
	21	#include <linux/gpio.h>
	22	#include <linux/delay.h>
	23	#include <linux/regulator/machine.h>
ae24c263	24	#include <linux/regulator/fixed.h>
e1a3c74f MB	25	#include <linux/pwm_backlight.h>
	26	#include <linux/dm9000.h>
	27	#include <linux/gpio_keys.h>
	28	#include <linux/basic_mmio_gpio.h>
	29	#include <linux/spi/spi.h>
	30
	31	#include <linux/i2c/pca953x.h>
	32
	33	#include <video/platform_lcd.h>
	34
	35	#include <linux/mfd/wm831x/core.h>
	36	#include <linux/mfd/wm831x/pdata.h>
ae24c263	37	#include <linux/mfd/wm831x/irq.h>
e1a3c74f MB	38	#include <linux/mfd/wm831x/gpio.h>
e1a3c74f MB	39
8504a3cb MB	40	#include <sound/wm1250-ev1.h>
8504a3cb MB	41
e1a3c74f MB	42	#include <asm/mach/arch.h>
	43	#include <asm/mach-types.h>
	44
	45	#include <mach/hardware.h>
	46	#include <mach/map.h>
	47
e1a3c74f MB	48	#include <mach/regs-sys.h>
	49	#include <mach/regs-gpio.h>
	50	#include <mach/regs-modem.h>
d0f0b43f	51	#include <mach/crag6410.h>
e1a3c74f	52
e1a3c74f MB	53	#include <mach/regs-gpio-memport.h>
e1a3c74f MB	54
3cd7b62b	55	#include <plat/s3c6410.h>
e1a3c74f MB	56	#include <plat/regs-serial.h>
	57	#include <plat/regs-fb-v4.h>
	58	#include <plat/fb.h>
	59	#include <plat/sdhci.h>
	60	#include <plat/gpio-cfg.h>
	61	#include <plat/s3c64xx-spi.h>
	62
	63	#include <plat/keypad.h>
	64	#include <plat/clock.h>
	65	#include <plat/devs.h>
	66	#include <plat/cpu.h>
	67	#include <plat/adc.h>
	68	#include <plat/iic.h>
	69	#include <plat/pm.h>
	70
e1a3c74f MB	71	/* serial port setup */
	72
	73	#define UCON (S3C2410_UCON_DEFAULT \| S3C2410_UCON_UCLK)
	74	#define ULCON (S3C2410_LCON_CS8 \| S3C2410_LCON_PNONE \| S3C2410_LCON_STOPB)
	75	#define UFCON (S3C2410_UFCON_RXTRIG8 \| S3C2410_UFCON_FIFOMODE)
	76
	77	static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
	78	[0] = {
ae24c263 MB	79	.hwport = 0,
	80	.flags = 0,
	81	.ucon = UCON,
	82	.ulcon = ULCON,
	83	.ufcon = UFCON,
e1a3c74f MB	84	},
e1a3c74f MB	85	[1] = {
ae24c263 MB	86	.hwport = 1,
	87	.flags = 0,
	88	.ucon = UCON,
	89	.ulcon = ULCON,
	90	.ufcon = UFCON,
e1a3c74f MB	91	},
e1a3c74f MB	92	[2] = {
ae24c263 MB	93	.hwport = 2,
	94	.flags = 0,
	95	.ucon = UCON,
	96	.ulcon = ULCON,
	97	.ufcon = UFCON,
e1a3c74f MB	98	},
e1a3c74f MB	99	[3] = {
ae24c263 MB	100	.hwport = 3,
	101	.flags = 0,
	102	.ucon = UCON,
	103	.ulcon = ULCON,
	104	.ufcon = UFCON,
e1a3c74f MB	105	},
	106	};
	107
	108	static struct platform_pwm_backlight_data crag6410_backlight_data = {
	109	.pwm_id = 0,
	110	.max_brightness = 1000,
	111	.dft_brightness = 600,
	112	.pwm_period_ns = 100000, /* about 1kHz */
	113	};
	114
	115	static struct platform_device crag6410_backlight_device = {
	116	.name = "pwm-backlight",
	117	.id = -1,
	118	.dev = {
	119	.parent = &s3c_device_timer[0].dev,
	120	.platform_data = &crag6410_backlight_data,
	121	},
	122	};
	123
	124	static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
	125	{
	126	pr_debug("%s: setting power %d\n", __func__, power);
	127
	128	if (power) {
	129	gpio_set_value(S3C64XX_GPB(0), 1);
	130	msleep(1);
	131	s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
	132	} else {
	133	gpio_direction_output(S3C64XX_GPF(14), 0);
	134	gpio_set_value(S3C64XX_GPB(0), 0);
	135	}
	136	}
	137
	138	static struct platform_device crag6410_lcd_powerdev = {
	139	.name = "platform-lcd",
	140	.id = -1,
	141	.dev.parent = &s3c_device_fb.dev,
	142	.dev.platform_data = &(struct plat_lcd_data) {
	143	.set_power = crag6410_lcd_power_set,
	144	},
	145	};
	146
	147	/* 640x480 URT */
	148	static struct s3c_fb_pd_win crag6410_fb_win0 = {
	149	/* this is to ensure we use win0 */
	150	.win_mode = {
	151	.left_margin = 150,
	152	.right_margin = 80,
	153	.upper_margin = 40,
	154	.lower_margin = 5,
	155	.hsync_len = 40,
	156	.vsync_len = 5,
	157	.xres = 640,
	158	.yres = 480,
	159	},
	160	.max_bpp = 32,
	161	.default_bpp = 16,
	162	.virtual_y = 480 * 2,
	163	.virtual_x = 640,
	164	};
	165
	166	/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
	167	static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
	168	.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
169	.win[0] = &crag6410_fb_win0,
170	.vidcon0 = VIDCON0_VIDOUT_RGB \| VIDCON0_PNRMODE_RGB,
171	.vidcon1 = VIDCON1_INV_HSYNC \| VIDCON1_INV_VSYNC,
172	};
173
174	/* 2x6 keypad */
175
176	static uint32_t crag6410_keymap[] __initdata = {
177	/* KEY(row, col, keycode) */
178	KEY(0, 0, KEY_VOLUMEUP),
179	KEY(0, 1, KEY_HOME),
180	KEY(0, 2, KEY_VOLUMEDOWN),
181	KEY(0, 3, KEY_HELP),
182	KEY(0, 4, KEY_MENU),
183	KEY(0, 5, KEY_MEDIA),
184	KEY(1, 0, 232),
185	KEY(1, 1, KEY_DOWN),
186	KEY(1, 2, KEY_LEFT),
187	KEY(1, 3, KEY_UP),
188	KEY(1, 4, KEY_RIGHT),
189	KEY(1, 5, KEY_CAMERA),
190	};
191
192	static struct matrix_keymap_data crag6410_keymap_data __initdata = {
193	.keymap = crag6410_keymap,
194	.keymap_size = ARRAY_SIZE(crag6410_keymap),
195	};
196
197	static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
198	.keymap_data = &crag6410_keymap_data,
199	.rows = 2,
200	.cols = 6,
201	};
202
203	static struct gpio_keys_button crag6410_gpio_keys[] = {
204	[0] = {
205	.code = KEY_SUSPEND,
206	.gpio = S3C64XX_GPL(10), /* EINT 18 */
ae24c263	207	.type = EV_KEY,
e1a3c74f MB	208	.wakeup = 1,
	209	.active_low = 1,
	210	},
ae24c263 MB	211	[1] = {
	212	.code = SW_FRONT_PROXIMITY,
	213	.gpio = S3C64XX_GPN(11), /* EINT 11 */
	214	.type = EV_SW,
	215	},
e1a3c74f MB	216	};
	217
	218	static struct gpio_keys_platform_data crag6410_gpio_keydata = {
	219	.buttons = crag6410_gpio_keys,
	220	.nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
	221	};
	222
	223	static struct platform_device crag6410_gpio_keydev = {
	224	.name = "gpio-keys",
	225	.id = 0,
	226	.dev.platform_data = &crag6410_gpio_keydata,
	227	};
	228
	229	static struct resource crag6410_dm9k_resource[] = {
	230	[0] = {
	231	.start = S3C64XX_PA_XM0CSN5,
	232	.end = S3C64XX_PA_XM0CSN5 + 1,
	233	.flags = IORESOURCE_MEM,
	234	},
	235	[1] = {
	236	.start = S3C64XX_PA_XM0CSN5 + (1 << 8),
	237	.end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
	238	.flags = IORESOURCE_MEM,
	239	},
	240	[2] = {
	241	.start = S3C_EINT(17),
	242	.end = S3C_EINT(17),
	243	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	244	},
	245	};
	246
	247	static struct dm9000_plat_data mini6410_dm9k_pdata = {
	248	.flags = DM9000_PLATF_16BITONLY,
	249	};
	250
	251	static struct platform_device crag6410_dm9k_device = {
	252	.name = "dm9000",
	253	.id = -1,
	254	.num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
	255	.resource = crag6410_dm9k_resource,
	256	.dev.platform_data = &mini6410_dm9k_pdata,
	257	};
	258
	259	static struct resource crag6410_mmgpio_resource[] = {
	260	[0] = {
	261	.start = S3C64XX_PA_XM0CSN4 + 1,
	262	.end = S3C64XX_PA_XM0CSN4 + 1,
	263	.flags = IORESOURCE_MEM,
	264	},
	265	};
	266
	267	static struct platform_device crag6410_mmgpio = {
	268	.name = "basic-mmio-gpio",
	269	.id = -1,
	270	.resource = crag6410_mmgpio_resource,
	271	.num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
	272	.dev.platform_data = &(struct bgpio_pdata) {
	273	.base = -1,
	274	},
	275	};
	276
ae24c263 MB	277	static struct platform_device speyside_device = {
	278	.name = "speyside",
	279	.id = -1,
	280	};
	281
8c051ab4 MB	282	static struct platform_device lowland_device = {
	283	.name = "lowland",
	284	.id = -1,
	285	};
	286
ae24c263 MB	287	static struct platform_device speyside_wm8962_device = {
	288	.name = "speyside-wm8962",
	289	.id = -1,
	290	};
	291
	292	static struct regulator_consumer_supply wallvdd_consumers[] = {
	293	REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
	294	REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
4ed12b50 MB	295	REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
4ed12b50 MB	296	REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
ae24c263 MB	297	};
	298
	299	static struct regulator_init_data wallvdd_data = {
	300	.constraints = {
	301	.always_on = 1,
	302	},
	303	.num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
	304	.consumer_supplies = wallvdd_consumers,
	305	};
	306
	307	static struct fixed_voltage_config wallvdd_pdata = {
	308	.supply_name = "WALLVDD",
	309	.microvolts = 5000000,
	310	.init_data = &wallvdd_data,
	311	.gpio = -EINVAL,
	312	};
	313
	314	static struct platform_device wallvdd_device = {
	315	.name = "reg-fixed-voltage",
	316	.id = -1,
	317	.dev = {
	318	.platform_data = &wallvdd_pdata,
	319	},
	320	};
	321
e1a3c74f MB	322	static struct platform_device *crag6410_devices[] __initdata = {
	323	&s3c_device_hsmmc0,
	324	&s3c_device_hsmmc1,
	325	&s3c_device_hsmmc2,
	326	&s3c_device_i2c0,
	327	&s3c_device_i2c1,
	328	&s3c_device_fb,
	329	&s3c_device_ohci,
	330	&s3c_device_usb_hsotg,
e1a3c74f MB	331	&s3c_device_timer[0],
	332	&s3c64xx_device_iis0,
	333	&s3c64xx_device_iis1,
	334	&samsung_asoc_dma,
	335	&samsung_device_keypad,
	336	&crag6410_gpio_keydev,
	337	&crag6410_dm9k_device,
	338	&s3c64xx_device_spi0,
	339	&crag6410_mmgpio,
	340	&crag6410_lcd_powerdev,
	341	&crag6410_backlight_device,
ae24c263 MB	342	&speyside_device,
ae24c263 MB	343	&speyside_wm8962_device,
8c051ab4	344	&lowland_device,
ae24c263	345	&wallvdd_device,
e1a3c74f MB	346	};
	347
	348	static struct pca953x_platform_data crag6410_pca_data = {
	349	.gpio_base = PCA935X_GPIO_BASE,
	350	.irq_base = 0,
	351	};
	352
986afc98 MB	353	/* VDDARM is controlled by DVS1 connected to GPK(0) */
	354	static struct wm831x_buckv_pdata vddarm_pdata = {
	355	.dvs_control_src = 1,
	356	.dvs_gpio = S3C64XX_GPK(0),
	357	};
	358
e1a3c74f MB	359	static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
	360	REGULATOR_SUPPLY("vddarm", NULL),
	361	};
	362
	363	static struct regulator_init_data vddarm __initdata = {
	364	.constraints = {
	365	.name = "VDDARM",
	366	.min_uV = 1000000,
	367	.max_uV = 1300000,
	368	.always_on = 1,
	369	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	370	},
	371	.num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
	372	.consumer_supplies = vddarm_consumers,
35127296	373	.supply_regulator = "WALLVDD",
986afc98	374	.driver_data = &vddarm_pdata,
e1a3c74f MB	375	};
	376
	377	static struct regulator_init_data vddint __initdata = {
	378	.constraints = {
	379	.name = "VDDINT",
	380	.min_uV = 1000000,
	381	.max_uV = 1200000,
	382	.always_on = 1,
	383	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	384	},
	385	};
	386
	387	static struct regulator_init_data vddmem __initdata = {
	388	.constraints = {
	389	.name = "VDDMEM",
	390	.always_on = 1,
	391	},
	392	};
	393
	394	static struct regulator_init_data vddsys __initdata = {
	395	.constraints = {
	396	.name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
	397	.always_on = 1,
	398	},
	399	};
	400
	401	static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
	402	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
	403	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
	404	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
	405	};
	406
	407	static struct regulator_init_data vddmmc __initdata = {
	408	.constraints = {
	409	.name = "VDDMMC,UH",
	410	.always_on = 1,
	411	},
	412	.num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
	413	.consumer_supplies = vddmmc_consumers,
35127296	414	.supply_regulator = "WALLVDD",
e1a3c74f MB	415	};
	416
	417	static struct regulator_init_data vddotgi __initdata = {
	418	.constraints = {
	419	.name = "VDDOTGi",
	420	.always_on = 1,
	421	},
35127296	422	.supply_regulator = "WALLVDD",
e1a3c74f MB	423	};
	424
	425	static struct regulator_init_data vddotg __initdata = {
	426	.constraints = {
	427	.name = "VDDOTG",
	428	.always_on = 1,
	429	},
35127296	430	.supply_regulator = "WALLVDD",
e1a3c74f MB	431	};
	432
	433	static struct regulator_init_data vddhi __initdata = {
	434	.constraints = {
	435	.name = "VDDHI",
	436	.always_on = 1,
	437	},
35127296	438	.supply_regulator = "WALLVDD",
e1a3c74f MB	439	};
	440
	441	static struct regulator_init_data vddadc __initdata = {
	442	.constraints = {
	443	.name = "VDDADC,VDDDAC",
	444	.always_on = 1,
	445	},
35127296	446	.supply_regulator = "WALLVDD",
e1a3c74f MB	447	};
	448
	449	static struct regulator_init_data vddmem0 __initdata = {
	450	.constraints = {
	451	.name = "VDDMEM0",
	452	.always_on = 1,
	453	},
35127296	454	.supply_regulator = "WALLVDD",
e1a3c74f MB	455	};
	456
	457	static struct regulator_init_data vddpll __initdata = {
	458	.constraints = {
	459	.name = "VDDPLL",
	460	.always_on = 1,
	461	},
35127296	462	.supply_regulator = "WALLVDD",
e1a3c74f MB	463	};
	464
	465	static struct regulator_init_data vddlcd __initdata = {
	466	.constraints = {
	467	.name = "VDDLCD",
	468	.always_on = 1,
	469	},
35127296	470	.supply_regulator = "WALLVDD",
e1a3c74f MB	471	};
	472
	473	static struct regulator_init_data vddalive __initdata = {
	474	.constraints = {
	475	.name = "VDDALIVE",
	476	.always_on = 1,
	477	},
35127296	478	.supply_regulator = "WALLVDD",
e1a3c74f MB	479	};
e1a3c74f MB	480
89e1c3d0 MB	481	static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
	482	.charger_enable = 1,
	483	.vlim = 2500, /* mV */
	484	.ilim = 200, /* uA */
	485	};
	486
e1a3c74f MB	487	static struct wm831x_status_pdata banff_red_led __initdata = {
	488	.name = "banff:red:",
	489	.default_src = WM831X_STATUS_MANUAL,
	490	};
	491
	492	static struct wm831x_status_pdata banff_green_led __initdata = {
	493	.name = "banff:green:",
	494	.default_src = WM831X_STATUS_MANUAL,
	495	};
	496
	497	static struct wm831x_touch_pdata touch_pdata __initdata = {
	498	.data_irq = S3C_EINT(26),
ae24c263	499	.pd_irq = S3C_EINT(27),
e1a3c74f MB	500	};
e1a3c74f MB	501
e1a3c74f	502	static struct wm831x_pdata crag_pmic_pdata __initdata = {
ae24c263	503	.wm831x_num = 1,
e1a3c74f	504	.irq_base = BANFF_PMIC_IRQ_BASE,
aaed44e1	505	.gpio_base = BANFF_PMIC_GPIO_BASE,
dcf3580a	506	.soft_shutdown = true,
e1a3c74f	507
89e1c3d0 MB	508	.backup = &banff_backup_pdata,
89e1c3d0 MB	509
ae24c263	510	.gpio_defaults = {
986afc98 MB	511	/* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
986afc98 MB	512	[4] = WM831X_GPN_DIR \| WM831X_GPN_POL \| WM831X_GPN_ENA \| 0x8,
ae24c263 MB	513	/* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
	514	[10] = WM831X_GPN_POL \| WM831X_GPN_ENA \| 0x6,
	515	/* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
	516	[11] = WM831X_GPN_POL \| WM831X_GPN_ENA \| 0x7,
	517	},
	518
e1a3c74f MB	519	.dcdc = {
	520	&vddarm, /* DCDC1 */
	521	&vddint, /* DCDC2 */
	522	&vddmem, /* DCDC3 */
	523	},
	524
	525	.ldo = {
	526	&vddsys, /* LDO1 */
	527	&vddmmc, /* LDO2 */
	528	NULL, /* LDO3 */
	529	&vddotgi, /* LDO4 */
	530	&vddotg, /* LDO5 */
	531	&vddhi, /* LDO6 */
	532	&vddadc, /* LDO7 */
	533	&vddmem0, /* LDO8 */
	534	&vddpll, /* LDO9 */
	535	&vddlcd, /* LDO10 */
	536	&vddalive, /* LDO11 */
	537	},
	538
	539	.status = {
	540	&banff_green_led,
	541	&banff_red_led,
	542	},
	543
	544	.touch = &touch_pdata,
	545	};
	546
	547	static struct i2c_board_info i2c_devs0[] __initdata = {
	548	{ I2C_BOARD_INFO("24c08", 0x50), },
	549	{ I2C_BOARD_INFO("tca6408", 0x20),
	550	.platform_data = &crag6410_pca_data,
	551	},
	552	{ I2C_BOARD_INFO("wm8312", 0x34),
	553	.platform_data = &crag_pmic_pdata,
	554	.irq = S3C_EINT(23),
	555	},
	556	};
	557
	558	static struct s3c2410_platform_i2c i2c0_pdata = {
	559	.frequency = 400000,
	560	};
	561
ae24c263 MB	562	static struct regulator_init_data pvdd_1v2 __initdata = {
	563	.constraints = {
	564	.name = "PVDD_1V2",
	565	.always_on = 1,
	566	},
	567	};
	568
	569	static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
d5160ecf	570	REGULATOR_SUPPLY("LDOVDD", "1-001a"),
ae24c263 MB	571	REGULATOR_SUPPLY("PLLVDD", "1-001a"),
ae24c263 MB	572	REGULATOR_SUPPLY("DBVDD", "1-001a"),
4ed12b50 MB	573	REGULATOR_SUPPLY("DBVDD1", "1-001a"),
	574	REGULATOR_SUPPLY("DBVDD2", "1-001a"),
	575	REGULATOR_SUPPLY("DBVDD3", "1-001a"),
ae24c263 MB	576	REGULATOR_SUPPLY("CPVDD", "1-001a"),
	577	REGULATOR_SUPPLY("AVDD2", "1-001a"),
	578	REGULATOR_SUPPLY("DCVDD", "1-001a"),
	579	REGULATOR_SUPPLY("AVDD", "1-001a"),
	580	};
	581
	582	static struct regulator_init_data pvdd_1v8 __initdata = {
	583	.constraints = {
	584	.name = "PVDD_1V8",
	585	.always_on = 1,
	586	},
	587
	588	.consumer_supplies = pvdd_1v8_consumers,
	589	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
	590	};
	591
	592	static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
	593	REGULATOR_SUPPLY("MICVDD", "1-001a"),
	594	REGULATOR_SUPPLY("AVDD1", "1-001a"),
	595	};
	596
	597	static struct regulator_init_data pvdd_3v3 __initdata = {
	598	.constraints = {
	599	.name = "PVDD_3V3",
	600	.always_on = 1,
	601	},
	602
	603	.consumer_supplies = pvdd_3v3_consumers,
	604	.num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
	605	};
	606
	607	static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
	608	.wm831x_num = 2,
	609	.irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
	610	.gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
dcf3580a	611	.soft_shutdown = true,
ae24c263 MB	612
	613	.gpio_defaults = {
	614	/* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
	615	[0] = WM831X_GPN_DIR \| WM831X_GPN_POL \| WM831X_GPN_ENA,
	616	[1] = WM831X_GPN_DIR \| WM831X_GPN_POL \| WM831X_GPN_ENA,
	617	[2] = WM831X_GPN_DIR \| WM831X_GPN_POL \| WM831X_GPN_ENA,
	618	},
	619
	620	.dcdc = {
	621	&pvdd_1v2, /* DCDC1 */
	622	&pvdd_1v8, /* DCDC2 */
	623	&pvdd_3v3, /* DCDC3 */
	624	},
	625
	626	.disable_touch = true,
	627	};
	628
8504a3cb MB	629	static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
	630	.gpios = {
	631	[WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
	632	[WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
	633	[WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
	634	[WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
	635	[WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
	636	},
	637	};
	638
e1a3c74f MB	639	static struct i2c_board_info i2c_devs1[] __initdata = {
e1a3c74f MB	640	{ I2C_BOARD_INFO("wm8311", 0x34),
ae24c263 MB	641	.irq = S3C_EINT(0),
	642	.platform_data = &glenfarclas_pmic_pdata },
	643
d0f0b43f MB	644	{ I2C_BOARD_INFO("wlf-gf-module", 0x24) },
	645	{ I2C_BOARD_INFO("wlf-gf-module", 0x25) },
	646	{ I2C_BOARD_INFO("wlf-gf-module", 0x26) },
	647
8504a3cb MB	648	{ I2C_BOARD_INFO("wm1250-ev1", 0x27),
8504a3cb MB	649	.platform_data = &wm1250_ev1_pdata },
e1a3c74f MB	650	};
e1a3c74f MB	651
8351c7aa MB	652	static struct s3c2410_platform_i2c i2c1_pdata = {
	653	.frequency = 400000,
	654	.bus_num = 1,
	655	};
	656
e1a3c74f MB	657	static void __init crag6410_map_io(void)
	658	{
	659	s3c64xx_init_io(NULL, 0);
	660	s3c24xx_init_clocks(12000000);
	661	s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
	662
	663	/* LCD type and Bypass set by bootloader */
	664	}
	665
	666	static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
	667	.max_width = 4,
	668	.cd_type = S3C_SDHCI_CD_PERMANENT,
	669	};
	670
	671	static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
	672	.max_width = 4,
	673	.cd_type = S3C_SDHCI_CD_GPIO,
	674	.ext_cd_gpio = S3C64XX_GPF(11),
	675	};
	676
	677	static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
	678	{
	679	/* Set all the necessary GPG pins to special-function 2 */
	680	s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
	681
	682	/* force card-detected for prototype 0 */
	683	s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
	684	}
	685
	686	static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
	687	.max_width = 4,
	688	.cd_type = S3C_SDHCI_CD_INTERNAL,
	689	.cfg_gpio = crag6410_cfg_sdhci0,
	690	};
	691
	692	static void __init crag6410_machine_init(void)
	693	{
	694	/* Open drain IRQs need pullups */
	695	s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
	696	s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
	697
	698	gpio_request(S3C64XX_GPB(0), "LCD power");
	699	gpio_direction_output(S3C64XX_GPB(0), 0);
	700
	701	gpio_request(S3C64XX_GPF(14), "LCD PWM");
	702	gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
	703
	704	gpio_request(S3C64XX_GPB(1), "SD power");
	705	gpio_direction_output(S3C64XX_GPB(1), 0);
	706
	707	gpio_request(S3C64XX_GPF(10), "nRESETSEL");
	708	gpio_direction_output(S3C64XX_GPF(10), 1);
	709
	710	s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
	711	s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
	712	s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
	713
	714	s3c_i2c0_set_platdata(&i2c0_pdata);
8351c7aa	715	s3c_i2c1_set_platdata(&i2c1_pdata);
e1a3c74f MB	716	s3c_fb_set_platdata(&crag6410_lcd_pdata);
	717
	718	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
	719	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
	720
	721	samsung_keypad_set_platdata(&crag6410_keypad_data);
	722
	723	platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
	724
ae24c263 MB	725	regulator_has_full_constraints();
ae24c263 MB	726
e1a3c74f MB	727	s3c_pm_init();
	728	}
	729
	730	MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
	731	/* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
170a5908	732	.atag_offset = 0x100,
e1a3c74f MB	733	.init_irq = s3c6410_init_irq,
	734	.map_io = crag6410_map_io,
	735	.init_machine = crag6410_machine_init,
	736	.timer = &s3c24xx_timer,
	737	MACHINE_END