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Drivers: regulator: remove __dev* attributes.
[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-crag6410.c
CommitLineData
e1a3c74f
MB		 1/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
66211f98 22#include <linux/leds.h>
e1a3c74f 23#include <linux/delay.h>
fb7f60f3 24#include <linux/mmc/host.h>
e1a3c74f 25#include <linux/regulator/machine.h>
ae24c263 26#include <linux/regulator/fixed.h>
e1a3c74f
MB		 27#include <linux/pwm_backlight.h>
28#include <linux/dm9000.h>
29#include <linux/gpio_keys.h>
30#include <linux/basic_mmio_gpio.h>
31#include <linux/spi/spi.h>
32
33#include <linux/i2c/pca953x.h>
126625e1 34#include <linux/platform_data/s3c-hsotg.h>
e1a3c74f
MB		 35
36#include <video/platform_lcd.h>
37
38#include <linux/mfd/wm831x/core.h>
39#include <linux/mfd/wm831x/pdata.h>
ae24c263 40#include <linux/mfd/wm831x/irq.h>
e1a3c74f
MB		 41#include <linux/mfd/wm831x/gpio.h>
42
8504a3cb
MB		 43#include <sound/wm1250-ev1.h>
44
774b51f8 45#include <asm/hardware/vic.h>
e1a3c74f
MB		 46#include <asm/mach/arch.h>
47#include <asm/mach-types.h>
48
5a213a55 49#include <video/samsung_fimd.h>
e1a3c74f
MB		 50#include <mach/hardware.h>
51#include <mach/map.h>
52
e1a3c74f
MB		 53#include <mach/regs-sys.h>
54#include <mach/regs-gpio.h>
55#include <mach/regs-modem.h>
d0f0b43f 56#include <mach/crag6410.h>
e1a3c74f 57
e1a3c74f
MB		 58#include <mach/regs-gpio-memport.h>
59
60#include <plat/regs-serial.h>
e1a3c74f
MB		 61#include <plat/fb.h>
62#include <plat/sdhci.h>
63#include <plat/gpio-cfg.h>
436d42c6 64#include <linux/platform_data/spi-s3c64xx.h>
e1a3c74f
MB		 65
66#include <plat/keypad.h>
67#include <plat/clock.h>
68#include <plat/devs.h>
69#include <plat/cpu.h>
70#include <plat/adc.h>
436d42c6 71#include <linux/platform_data/i2c-s3c2410.h>
e1a3c74f
MB		 72#include <plat/pm.h>
73
b024043b
KK		 74#include "common.h"
75
e1a3c74f
MB		 76/* serial port setup */
77
78#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
79#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
80#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
81
82static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
83 [0] = {
ae24c263
MB		 84 .hwport = 0,
85 .flags = 0,
86 .ucon = UCON,
87 .ulcon = ULCON,
88 .ufcon = UFCON,
e1a3c74f
MB		 89 },
90 [1] = {
ae24c263
MB		 91 .hwport = 1,
92 .flags = 0,
93 .ucon = UCON,
94 .ulcon = ULCON,
95 .ufcon = UFCON,
e1a3c74f
MB		 96 },
97 [2] = {
ae24c263
MB		 98 .hwport = 2,
99 .flags = 0,
100 .ucon = UCON,
101 .ulcon = ULCON,
102 .ufcon = UFCON,
e1a3c74f
MB		 103 },
104 [3] = {
ae24c263
MB		 105 .hwport = 3,
106 .flags = 0,
107 .ucon = UCON,
108 .ulcon = ULCON,
109 .ufcon = UFCON,
e1a3c74f
MB		 110 },
111};
112
113static struct platform_pwm_backlight_data crag6410_backlight_data = {
114 .pwm_id = 0,
115 .max_brightness = 1000,
116 .dft_brightness = 600,
117 .pwm_period_ns = 100000, /* about 1kHz */
118};
119
120static struct platform_device crag6410_backlight_device = {
121 .name = "pwm-backlight",
122 .id = -1,
123 .dev = {
124 .parent = &s3c_device_timer[0].dev,
125 .platform_data = &crag6410_backlight_data,
126 },
127};
128
129static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
130{
131 pr_debug("%s: setting power %d\n", __func__, power);
132
133 if (power) {
134 gpio_set_value(S3C64XX_GPB(0), 1);
135 msleep(1);
136 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
137 } else {
138 gpio_direction_output(S3C64XX_GPF(14), 0);
139 gpio_set_value(S3C64XX_GPB(0), 0);
140 }
141}
142
143static struct platform_device crag6410_lcd_powerdev = {
144 .name = "platform-lcd",
145 .id = -1,
146 .dev.parent = &s3c_device_fb.dev,
147 .dev.platform_data = &(struct plat_lcd_data) {
148 .set_power = crag6410_lcd_power_set,
149 },
150};
151
152/* 640x480 URT */
153static struct s3c_fb_pd_win crag6410_fb_win0 = {
e1a3c74f
MB		 154 .max_bpp = 32,
155 .default_bpp = 16,
79d3c41a
TA		 156 .xres = 640,
157 .yres = 480,
e1a3c74f
MB		 158 .virtual_y = 480 * 2,
159 .virtual_x = 640,
160};
161
79d3c41a
TA		 162static struct fb_videomode crag6410_lcd_timing = {
163 .left_margin = 150,
164 .right_margin = 80,
165 .upper_margin = 40,
166 .lower_margin = 5,
167 .hsync_len = 40,
168 .vsync_len = 5,
169 .xres = 640,
170 .yres = 480,
171};
172
e1a3c74f 173/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
70660e5d 174static struct s3c_fb_platdata crag6410_lcd_pdata __devinitdata = {
e1a3c74f 175 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
79d3c41a 176 .vtiming = &crag6410_lcd_timing,
e1a3c74f
MB		 177 .win[0] = &crag6410_fb_win0,
178 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
179 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
180};
181
182/* 2x6 keypad */
183
70660e5d 184static uint32_t crag6410_keymap[] __devinitdata = {
e1a3c74f
MB		 185 /* KEY(row, col, keycode) */
186 KEY(0, 0, KEY_VOLUMEUP),
187 KEY(0, 1, KEY_HOME),
188 KEY(0, 2, KEY_VOLUMEDOWN),
189 KEY(0, 3, KEY_HELP),
190 KEY(0, 4, KEY_MENU),
191 KEY(0, 5, KEY_MEDIA),
192 KEY(1, 0, 232),
193 KEY(1, 1, KEY_DOWN),
194 KEY(1, 2, KEY_LEFT),
195 KEY(1, 3, KEY_UP),
196 KEY(1, 4, KEY_RIGHT),
197 KEY(1, 5, KEY_CAMERA),
198};
199
70660e5d 200static struct matrix_keymap_data crag6410_keymap_data __devinitdata = {
e1a3c74f
MB		 201 .keymap = crag6410_keymap,
202 .keymap_size = ARRAY_SIZE(crag6410_keymap),
203};
204
70660e5d 205static struct samsung_keypad_platdata crag6410_keypad_data __devinitdata = {
e1a3c74f
MB		 206 .keymap_data = &crag6410_keymap_data,
207 .rows = 2,
208 .cols = 6,
209};
210
211static struct gpio_keys_button crag6410_gpio_keys[] = {
212 [0] = {
213 .code = KEY_SUSPEND,
214 .gpio = S3C64XX_GPL(10), /* EINT 18 */
ae24c263 215 .type = EV_KEY,
e1a3c74f
MB		 216 .wakeup = 1,
217 .active_low = 1,
218 },
ae24c263
MB		 219 [1] = {
220 .code = SW_FRONT_PROXIMITY,
221 .gpio = S3C64XX_GPN(11), /* EINT 11 */
222 .type = EV_SW,
223 },
e1a3c74f
MB		 224};
225
226static struct gpio_keys_platform_data crag6410_gpio_keydata = {
227 .buttons = crag6410_gpio_keys,
228 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
229};
230
231static struct platform_device crag6410_gpio_keydev = {
232 .name = "gpio-keys",
233 .id = 0,
234 .dev.platform_data = &crag6410_gpio_keydata,
235};
236
237static struct resource crag6410_dm9k_resource[] = {
8ebf148a
TB		 238 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
239 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
240 [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
241 | IORESOURCE_IRQ_HIGHLEVEL),
e1a3c74f
MB		 242};
243
244static struct dm9000_plat_data mini6410_dm9k_pdata = {
245 .flags = DM9000_PLATF_16BITONLY,
246};
247
248static struct platform_device crag6410_dm9k_device = {
249 .name = "dm9000",
250 .id = -1,
251 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
252 .resource = crag6410_dm9k_resource,
253 .dev.platform_data = &mini6410_dm9k_pdata,
254};
255
256static struct resource crag6410_mmgpio_resource[] = {
8ebf148a 257 [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
e1a3c74f
MB		 258};
259
260static struct platform_device crag6410_mmgpio = {
261 .name = "basic-mmio-gpio",
262 .id = -1,
263 .resource = crag6410_mmgpio_resource,
264 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
265 .dev.platform_data = &(struct bgpio_pdata) {
91b60b1d 266 .base = MMGPIO_GPIO_BASE,
e1a3c74f
MB		 267 },
268};
269
ae24c263
MB		 270static struct platform_device speyside_device = {
271 .name = "speyside",
272 .id = -1,
273};
274
8c051ab4
MB		 275static struct platform_device lowland_device = {
276 .name = "lowland",
277 .id = -1,
278};
279
6414261f
MB		 280static struct platform_device tobermory_device = {
281 .name = "tobermory",
ae24c263
MB		 282 .id = -1,
283};
284
c5c32c96
MB		 285static struct platform_device littlemill_device = {
286 .name = "littlemill",
287 .id = -1,
288};
289
3322914e 290static struct platform_device bells_wm2200_device = {
25752b78
MB		 291 .name = "bells",
292 .id = 0,
293};
294
3322914e 295static struct platform_device bells_wm5102_device = {
25752b78
MB		 296 .name = "bells",
297 .id = 1,
298};
299
3322914e
MB		 300static struct platform_device bells_wm5110_device = {
301 .name = "bells",
302 .id = 2,
303};
304
ae24c263 305static struct regulator_consumer_supply wallvdd_consumers[] = {
554f01fb 306 REGULATOR_SUPPLY("SPKVDD", "1-001a"),
ae24c263
MB		 307 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
308 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
4ed12b50
MB		 309 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
310 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
402f624b 311
479535ed
MB		 312 REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
313 REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
314 REGULATOR_SUPPLY("SPKVDDL", "wm5102-codec"),
315 REGULATOR_SUPPLY("SPKVDDR", "wm5102-codec"),
316 REGULATOR_SUPPLY("SPKVDDL", "wm5110-codec"),
317 REGULATOR_SUPPLY("SPKVDDR", "wm5110-codec"),
318
402f624b
MB		 319 REGULATOR_SUPPLY("DC1VDD", "0-0034"),
320 REGULATOR_SUPPLY("DC2VDD", "0-0034"),
321 REGULATOR_SUPPLY("DC3VDD", "0-0034"),
322 REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
323 REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
324 REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
325 REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
326 REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
327 REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
328 REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
329 REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
330 REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
331 REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
332
333 REGULATOR_SUPPLY("DC1VDD", "1-0034"),
334 REGULATOR_SUPPLY("DC2VDD", "1-0034"),
335 REGULATOR_SUPPLY("DC3VDD", "1-0034"),
f4fe3881
MB		 336 REGULATOR_SUPPLY("LDO1VDD", "1-0034"),
337 REGULATOR_SUPPLY("LDO2VDD", "1-0034"),
338 REGULATOR_SUPPLY("LDO4VDD", "1-0034"),
339 REGULATOR_SUPPLY("LDO5VDD", "1-0034"),
340 REGULATOR_SUPPLY("LDO6VDD", "1-0034"),
341 REGULATOR_SUPPLY("LDO7VDD", "1-0034"),
342 REGULATOR_SUPPLY("LDO8VDD", "1-0034"),
343 REGULATOR_SUPPLY("LDO9VDD", "1-0034"),
344 REGULATOR_SUPPLY("LDO10VDD", "1-0034"),
345 REGULATOR_SUPPLY("LDO11VDD", "1-0034"),
ae24c263
MB		 346};
347
348static struct regulator_init_data wallvdd_data = {
349 .constraints = {
350 .always_on = 1,
351 },
352 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
353 .consumer_supplies = wallvdd_consumers,
354};
355
356static struct fixed_voltage_config wallvdd_pdata = {
357 .supply_name = "WALLVDD",
358 .microvolts = 5000000,
359 .init_data = &wallvdd_data,
360 .gpio = -EINVAL,
361};
362
363static struct platform_device wallvdd_device = {
364 .name = "reg-fixed-voltage",
365 .id = -1,
366 .dev = {
367 .platform_data = &wallvdd_pdata,
368 },
369};
370
e1a3c74f
MB		 371static struct platform_device *crag6410_devices[] __initdata = {
372 &s3c_device_hsmmc0,
e1a3c74f
MB		 373 &s3c_device_hsmmc2,
374 &s3c_device_i2c0,
375 &s3c_device_i2c1,
376 &s3c_device_fb,
377 &s3c_device_ohci,
378 &s3c_device_usb_hsotg,
e1a3c74f
MB		 379 &s3c_device_timer[0],
380 &s3c64xx_device_iis0,
381 &s3c64xx_device_iis1,
e1a3c74f
MB		 382 &samsung_device_keypad,
383 &crag6410_gpio_keydev,
384 &crag6410_dm9k_device,
385 &s3c64xx_device_spi0,
386 &crag6410_mmgpio,
387 &crag6410_lcd_powerdev,
388 &crag6410_backlight_device,
ae24c263 389 &speyside_device,
6414261f 390 &tobermory_device,
c5c32c96 391 &littlemill_device,
8c051ab4 392 &lowland_device,
3322914e 393 &bells_wm2200_device,
25752b78
MB		 394 &bells_wm5102_device,
395 &bells_wm5110_device,
ae24c263 396 &wallvdd_device,
e1a3c74f
MB		 397};
398
399static struct pca953x_platform_data crag6410_pca_data = {
400 .gpio_base = PCA935X_GPIO_BASE,
6e11e0bd 401 .irq_base = -1,
e1a3c74f
MB		 402};
403
986afc98
MB		 404/* VDDARM is controlled by DVS1 connected to GPK(0) */
405static struct wm831x_buckv_pdata vddarm_pdata = {
406 .dvs_control_src = 1,
407 .dvs_gpio = S3C64XX_GPK(0),
408};
409
70660e5d 410static struct regulator_consumer_supply vddarm_consumers[] __devinitdata = {
e1a3c74f
MB		 411 REGULATOR_SUPPLY("vddarm", NULL),
412};
413
70660e5d 414static struct regulator_init_data vddarm __devinitdata = {
e1a3c74f
MB		 415 .constraints = {
416 .name = "VDDARM",
417 .min_uV = 1000000,
418 .max_uV = 1300000,
419 .always_on = 1,
420 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
421 },
422 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
423 .consumer_supplies = vddarm_consumers,
35127296 424 .supply_regulator = "WALLVDD",
986afc98 425 .driver_data = &vddarm_pdata,
e1a3c74f
MB		 426};
427
70660e5d 428static struct regulator_consumer_supply vddint_consumers[] __devinitdata = {
39cb263e
MB		 429 REGULATOR_SUPPLY("vddint", NULL),
430};
431
70660e5d 432static struct regulator_init_data vddint __devinitdata = {
e1a3c74f
MB		 433 .constraints = {
434 .name = "VDDINT",
435 .min_uV = 1000000,
436 .max_uV = 1200000,
437 .always_on = 1,
438 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
439 },
39cb263e
MB		 440 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
441 .consumer_supplies = vddint_consumers,
442 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 443};
444
70660e5d 445static struct regulator_init_data vddmem __devinitdata = {
e1a3c74f
MB		 446 .constraints = {
447 .name = "VDDMEM",
448 .always_on = 1,
449 },
450};
451
70660e5d 452static struct regulator_init_data vddsys __devinitdata = {
e1a3c74f
MB		 453 .constraints = {
454 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
455 .always_on = 1,
456 },
457};
458
70660e5d 459static struct regulator_consumer_supply vddmmc_consumers[] __devinitdata = {
e1a3c74f
MB		 460 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
461 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
462 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
463};
464
70660e5d 465static struct regulator_init_data vddmmc __devinitdata = {
e1a3c74f
MB		 466 .constraints = {
467 .name = "VDDMMC,UH",
468 .always_on = 1,
469 },
470 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
471 .consumer_supplies = vddmmc_consumers,
35127296 472 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 473};
474
70660e5d 475static struct regulator_init_data vddotgi __devinitdata = {
e1a3c74f
MB		 476 .constraints = {
477 .name = "VDDOTGi",
478 .always_on = 1,
479 },
35127296 480 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 481};
482
70660e5d 483static struct regulator_init_data vddotg __devinitdata = {
e1a3c74f
MB		 484 .constraints = {
485 .name = "VDDOTG",
486 .always_on = 1,
487 },
35127296 488 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 489};
490
70660e5d 491static struct regulator_init_data vddhi __devinitdata = {
e1a3c74f
MB		 492 .constraints = {
493 .name = "VDDHI",
494 .always_on = 1,
495 },
35127296 496 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 497};
498
70660e5d 499static struct regulator_init_data vddadc __devinitdata = {
e1a3c74f
MB		 500 .constraints = {
501 .name = "VDDADC,VDDDAC",
502 .always_on = 1,
503 },
35127296 504 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 505};
506
70660e5d 507static struct regulator_init_data vddmem0 __devinitdata = {
e1a3c74f
MB		 508 .constraints = {
509 .name = "VDDMEM0",
510 .always_on = 1,
511 },
35127296 512 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 513};
514
70660e5d 515static struct regulator_init_data vddpll __devinitdata = {
e1a3c74f
MB		 516 .constraints = {
517 .name = "VDDPLL",
518 .always_on = 1,
519 },
35127296 520 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 521};
522
70660e5d 523static struct regulator_init_data vddlcd __devinitdata = {
e1a3c74f
MB		 524 .constraints = {
525 .name = "VDDLCD",
526 .always_on = 1,
527 },
35127296 528 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 529};
530
70660e5d 531static struct regulator_init_data vddalive __devinitdata = {
e1a3c74f
MB		 532 .constraints = {
533 .name = "VDDALIVE",
534 .always_on = 1,
535 },
35127296 536 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 537};
538
70660e5d 539static struct wm831x_backup_pdata banff_backup_pdata __devinitdata = {
89e1c3d0
MB		 540 .charger_enable = 1,
541 .vlim = 2500, /* mV */
542 .ilim = 200, /* uA */
543};
544
70660e5d 545static struct wm831x_status_pdata banff_red_led __devinitdata = {
e1a3c74f
MB		 546 .name = "banff:red:",
547 .default_src = WM831X_STATUS_MANUAL,
548};
549
70660e5d 550static struct wm831x_status_pdata banff_green_led __devinitdata = {
e1a3c74f
MB		 551 .name = "banff:green:",
552 .default_src = WM831X_STATUS_MANUAL,
553};
554
70660e5d 555static struct wm831x_touch_pdata touch_pdata __devinitdata = {
e1a3c74f 556 .data_irq = S3C_EINT(26),
ae24c263 557 .pd_irq = S3C_EINT(27),
e1a3c74f
MB		 558};
559
70660e5d 560static struct wm831x_pdata crag_pmic_pdata __devinitdata = {
ae24c263 561 .wm831x_num = 1,
aaed44e1 562 .gpio_base = BANFF_PMIC_GPIO_BASE,
dcf3580a 563 .soft_shutdown = true,
e1a3c74f 564
89e1c3d0
MB		 565 .backup = &banff_backup_pdata,
566
ae24c263 567 .gpio_defaults = {
986afc98
MB		 568 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
569 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
ae24c263
MB		 570 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
571 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
572 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
573 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
574 },
575
e1a3c74f
MB		 576 .dcdc = {
577 &vddarm, /* DCDC1 */
578 &vddint, /* DCDC2 */
579 &vddmem, /* DCDC3 */
580 },
581
582 .ldo = {
583 &vddsys, /* LDO1 */
584 &vddmmc, /* LDO2 */
585 NULL, /* LDO3 */
586 &vddotgi, /* LDO4 */
587 &vddotg, /* LDO5 */
588 &vddhi, /* LDO6 */
589 &vddadc, /* LDO7 */
590 &vddmem0, /* LDO8 */
591 &vddpll, /* LDO9 */
592 &vddlcd, /* LDO10 */
593 &vddalive, /* LDO11 */
594 },
595
596 .status = {
597 &banff_green_led,
598 &banff_red_led,
599 },
600
601 .touch = &touch_pdata,
602};
603
70660e5d 604static struct i2c_board_info i2c_devs0[] __devinitdata = {
e1a3c74f
MB		 605 { I2C_BOARD_INFO("24c08", 0x50), },
606 { I2C_BOARD_INFO("tca6408", 0x20),
607 .platform_data = &crag6410_pca_data,
608 },
609 { I2C_BOARD_INFO("wm8312", 0x34),
610 .platform_data = &crag_pmic_pdata,
611 .irq = S3C_EINT(23),
612 },
613};
614
615static struct s3c2410_platform_i2c i2c0_pdata = {
616 .frequency = 400000,
617};
618
70660e5d 619static struct regulator_consumer_supply pvdd_1v2_consumers[] __devinitdata = {
cda2349a
MB		 620 REGULATOR_SUPPLY("DCVDD", "spi0.0"),
621 REGULATOR_SUPPLY("AVDD", "spi0.0"),
479535ed 622 REGULATOR_SUPPLY("AVDD", "spi0.1"),
cda2349a
MB		 623};
624
70660e5d 625static struct regulator_init_data pvdd_1v2 __devinitdata = {
ae24c263
MB		 626 .constraints = {
627 .name = "PVDD_1V2",
cda2349a 628 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
ae24c263 629 },
cda2349a
MB		 630
631 .consumer_supplies = pvdd_1v2_consumers,
632 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
ae24c263
MB		 633};
634
70660e5d 635static struct regulator_consumer_supply pvdd_1v8_consumers[] __devinitdata = {
d5160ecf 636 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
ae24c263
MB		 637 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
638 REGULATOR_SUPPLY("DBVDD", "1-001a"),
4ed12b50
MB		 639 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
640 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
641 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
ae24c263
MB		 642 REGULATOR_SUPPLY("CPVDD", "1-001a"),
643 REGULATOR_SUPPLY("AVDD2", "1-001a"),
644 REGULATOR_SUPPLY("DCVDD", "1-001a"),
645 REGULATOR_SUPPLY("AVDD", "1-001a"),
cda2349a 646 REGULATOR_SUPPLY("DBVDD", "spi0.0"),
e6a194b7
MB		 647
648 REGULATOR_SUPPLY("DBVDD", "1-003a"),
649 REGULATOR_SUPPLY("LDOVDD", "1-003a"),
650 REGULATOR_SUPPLY("CPVDD", "1-003a"),
651 REGULATOR_SUPPLY("AVDD", "1-003a"),
479535ed
MB		 652 REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
653 REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
654 REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
655 REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
656 REGULATOR_SUPPLY("CPVDD", "spi0.1"),
657
658 REGULATOR_SUPPLY("DBVDD2", "wm5102-codec"),
659 REGULATOR_SUPPLY("DBVDD3", "wm5102-codec"),
660 REGULATOR_SUPPLY("CPVDD", "wm5102-codec"),
661
662 REGULATOR_SUPPLY("DBVDD2", "wm5110-codec"),
663 REGULATOR_SUPPLY("DBVDD3", "wm5110-codec"),
664 REGULATOR_SUPPLY("CPVDD", "wm5110-codec"),
ae24c263
MB		 665};
666
70660e5d 667static struct regulator_init_data pvdd_1v8 __devinitdata = {
ae24c263
MB		 668 .constraints = {
669 .name = "PVDD_1V8",
670 .always_on = 1,
671 },
672
673 .consumer_supplies = pvdd_1v8_consumers,
674 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
675};
676
70660e5d 677static struct regulator_consumer_supply pvdd_3v3_consumers[] __devinitdata = {
ae24c263
MB		 678 REGULATOR_SUPPLY("MICVDD", "1-001a"),
679 REGULATOR_SUPPLY("AVDD1", "1-001a"),
680};
681
70660e5d 682static struct regulator_init_data pvdd_3v3 __devinitdata = {
ae24c263
MB		 683 .constraints = {
684 .name = "PVDD_3V3",
685 .always_on = 1,
686 },
687
688 .consumer_supplies = pvdd_3v3_consumers,
689 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
690};
691
70660e5d 692static struct wm831x_pdata glenfarclas_pmic_pdata __devinitdata = {
ae24c263
MB		 693 .wm831x_num = 2,
694 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
695 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
dcf3580a 696 .soft_shutdown = true,
ae24c263
MB		 697
698 .gpio_defaults = {
699 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
700 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
701 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
702 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
703 },
704
705 .dcdc = {
706 &pvdd_1v2, /* DCDC1 */
707 &pvdd_1v8, /* DCDC2 */
708 &pvdd_3v3, /* DCDC3 */
709 },
710
711 .disable_touch = true,
712};
713
8504a3cb
MB		 714static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
715 .gpios = {
716 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
717 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
718 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
719 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
720 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
721 },
722};
723
70660e5d 724static struct i2c_board_info i2c_devs1[] __devinitdata = {
e1a3c74f 725 { I2C_BOARD_INFO("wm8311", 0x34),
ae24c263
MB		 726 .irq = S3C_EINT(0),
727 .platform_data = &glenfarclas_pmic_pdata },
728
091cff0a 729 { I2C_BOARD_INFO("wlf-gf-module", 0x20) },
ea070cd2 730 { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
d0f0b43f
MB		 731 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
732 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
733 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
734
8504a3cb
MB		 735 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
736 .platform_data = &wm1250_ev1_pdata },
e1a3c74f
MB		 737};
738
8351c7aa
MB		 739static struct s3c2410_platform_i2c i2c1_pdata = {
740 .frequency = 400000,
741 .bus_num = 1,
e1a3c74f
MB		 742};
743
744static void __init crag6410_map_io(void)
745{
746 s3c64xx_init_io(NULL, 0);
747 s3c24xx_init_clocks(12000000);
748 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
749
750 /* LCD type and Bypass set by bootloader */
751}
752
753static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
754 .max_width = 4,
755 .cd_type = S3C_SDHCI_CD_PERMANENT,
a9294cdc 756 .host_caps = MMC_CAP_POWER_OFF_CARD,
e1a3c74f
MB		 757};
758
e1a3c74f
MB		 759static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
760{
761 /* Set all the necessary GPG pins to special-function 2 */
762 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
763
764 /* force card-detected for prototype 0 */
765 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
766}
767
768static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
769 .max_width = 4,
770 .cd_type = S3C_SDHCI_CD_INTERNAL,
771 .cfg_gpio = crag6410_cfg_sdhci0,
fb7f60f3 772 .host_caps = MMC_CAP_POWER_OFF_CARD,
e1a3c74f
MB		 773};
774
66211f98
MB		 775static const struct gpio_led gpio_leds[] = {
776 {
777 .name = "d13:green:",
778 .gpio = MMGPIO_GPIO_BASE + 0,
779 .default_state = LEDS_GPIO_DEFSTATE_ON,
780 },
781 {
782 .name = "d14:green:",
783 .gpio = MMGPIO_GPIO_BASE + 1,
784 .default_state = LEDS_GPIO_DEFSTATE_ON,
785 },
786 {
787 .name = "d15:green:",
788 .gpio = MMGPIO_GPIO_BASE + 2,
789 .default_state = LEDS_GPIO_DEFSTATE_ON,
790 },
791 {
792 .name = "d16:green:",
793 .gpio = MMGPIO_GPIO_BASE + 3,
794 .default_state = LEDS_GPIO_DEFSTATE_ON,
795 },
796 {
797 .name = "d17:green:",
798 .gpio = MMGPIO_GPIO_BASE + 4,
799 .default_state = LEDS_GPIO_DEFSTATE_ON,
800 },
801 {
802 .name = "d18:green:",
803 .gpio = MMGPIO_GPIO_BASE + 5,
804 .default_state = LEDS_GPIO_DEFSTATE_ON,
805 },
806 {
807 .name = "d19:green:",
808 .gpio = MMGPIO_GPIO_BASE + 6,
809 .default_state = LEDS_GPIO_DEFSTATE_ON,
810 },
811 {
812 .name = "d20:green:",
813 .gpio = MMGPIO_GPIO_BASE + 7,
814 .default_state = LEDS_GPIO_DEFSTATE_ON,
815 },
816};
817
818static const struct gpio_led_platform_data gpio_leds_pdata = {
819 .leds = gpio_leds,
820 .num_leds = ARRAY_SIZE(gpio_leds),
e1a3c74f
MB		 821};
822
99f6e1f5
JS		 823static struct s3c_hsotg_plat crag6410_hsotg_pdata;
824
e1a3c74f
MB		 825static void __init crag6410_machine_init(void)
826{
827 /* Open drain IRQs need pullups */
828 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
829 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
830
831 gpio_request(S3C64XX_GPB(0), "LCD power");
832 gpio_direction_output(S3C64XX_GPB(0), 0);
833
834 gpio_request(S3C64XX_GPF(14), "LCD PWM");
835 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
836
837 gpio_request(S3C64XX_GPB(1), "SD power");
838 gpio_direction_output(S3C64XX_GPB(1), 0);
839
840 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
841 gpio_direction_output(S3C64XX_GPF(10), 1);
842
843 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
e1a3c74f
MB		 844 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
845
846 s3c_i2c0_set_platdata(&i2c0_pdata);
8351c7aa 847 s3c_i2c1_set_platdata(&i2c1_pdata);
e1a3c74f 848 s3c_fb_set_platdata(&crag6410_lcd_pdata);
99f6e1f5 849 s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
e1a3c74f
MB		 850
851 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
852 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
853
854 samsung_keypad_set_platdata(&crag6410_keypad_data);
479535ed 855 s3c64xx_spi0_set_platdata(NULL, 0, 2);
e1a3c74f
MB		 856
857 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
858
66211f98
MB		 859 gpio_led_register_device(-1, &gpio_leds_pdata);
860
ae24c263
MB		 861 regulator_has_full_constraints();
862
c656c306 863 s3c64xx_pm_init();
e1a3c74f
MB		 864}
865
866MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
867 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
170a5908 868 .atag_offset = 0x100,
e1a3c74f 869 .init_irq = s3c6410_init_irq,
774b51f8 870 .handle_irq = vic_handle_irq,
e1a3c74f
MB		 871 .map_io = crag6410_map_io,
872 .init_machine = crag6410_machine_init,
cc8f252b 873 .init_late = s3c64xx_init_late,
e1a3c74f 874 .timer = &s3c24xx_timer,
ff84ded2 875 .restart = s3c64xx_restart,
e1a3c74f 876MACHINE_END
Linux kernel - Deliverables
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