projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ARM: S3C64XX: Fix the memory mapped GPIOs on Cragganmore
[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-crag6410.c
CommitLineData
e1a3c74f
MB		 1/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
ae24c263 24#include <linux/regulator/fixed.h>
e1a3c74f
MB		 25#include <linux/pwm_backlight.h>
26#include <linux/dm9000.h>
27#include <linux/gpio_keys.h>
28#include <linux/basic_mmio_gpio.h>
29#include <linux/spi/spi.h>
30
31#include <linux/i2c/pca953x.h>
32
33#include <video/platform_lcd.h>
34
35#include <linux/mfd/wm831x/core.h>
36#include <linux/mfd/wm831x/pdata.h>
ae24c263 37#include <linux/mfd/wm831x/irq.h>
e1a3c74f
MB		 38#include <linux/mfd/wm831x/gpio.h>
39
8504a3cb
MB		 40#include <sound/wm1250-ev1.h>
41
774b51f8 42#include <asm/hardware/vic.h>
e1a3c74f
MB		 43#include <asm/mach/arch.h>
44#include <asm/mach-types.h>
45
46#include <mach/hardware.h>
47#include <mach/map.h>
48
e1a3c74f
MB		 49#include <mach/regs-sys.h>
50#include <mach/regs-gpio.h>
51#include <mach/regs-modem.h>
d0f0b43f 52#include <mach/crag6410.h>
e1a3c74f 53
e1a3c74f
MB		 54#include <mach/regs-gpio-memport.h>
55
56#include <plat/regs-serial.h>
57#include <plat/regs-fb-v4.h>
58#include <plat/fb.h>
59#include <plat/sdhci.h>
60#include <plat/gpio-cfg.h>
61#include <plat/s3c64xx-spi.h>
62
63#include <plat/keypad.h>
64#include <plat/clock.h>
65#include <plat/devs.h>
66#include <plat/cpu.h>
67#include <plat/adc.h>
68#include <plat/iic.h>
69#include <plat/pm.h>
70
b024043b
KK		 71#include "common.h"
72
e1a3c74f
MB		 73/* serial port setup */
74
75#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
76#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
77#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
78
79static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
80 [0] = {
ae24c263
MB		 81 .hwport = 0,
82 .flags = 0,
83 .ucon = UCON,
84 .ulcon = ULCON,
85 .ufcon = UFCON,
e1a3c74f
MB		 86 },
87 [1] = {
ae24c263
MB		 88 .hwport = 1,
89 .flags = 0,
90 .ucon = UCON,
91 .ulcon = ULCON,
92 .ufcon = UFCON,
e1a3c74f
MB		 93 },
94 [2] = {
ae24c263
MB		 95 .hwport = 2,
96 .flags = 0,
97 .ucon = UCON,
98 .ulcon = ULCON,
99 .ufcon = UFCON,
e1a3c74f
MB		 100 },
101 [3] = {
ae24c263
MB		 102 .hwport = 3,
103 .flags = 0,
104 .ucon = UCON,
105 .ulcon = ULCON,
106 .ufcon = UFCON,
e1a3c74f
MB		 107 },
108};
109
110static struct platform_pwm_backlight_data crag6410_backlight_data = {
111 .pwm_id = 0,
112 .max_brightness = 1000,
113 .dft_brightness = 600,
114 .pwm_period_ns = 100000, /* about 1kHz */
115};
116
117static struct platform_device crag6410_backlight_device = {
118 .name = "pwm-backlight",
119 .id = -1,
120 .dev = {
121 .parent = &s3c_device_timer[0].dev,
122 .platform_data = &crag6410_backlight_data,
123 },
124};
125
126static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
127{
128 pr_debug("%s: setting power %d\n", __func__, power);
129
130 if (power) {
131 gpio_set_value(S3C64XX_GPB(0), 1);
132 msleep(1);
133 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
134 } else {
135 gpio_direction_output(S3C64XX_GPF(14), 0);
136 gpio_set_value(S3C64XX_GPB(0), 0);
137 }
138}
139
140static struct platform_device crag6410_lcd_powerdev = {
141 .name = "platform-lcd",
142 .id = -1,
143 .dev.parent = &s3c_device_fb.dev,
144 .dev.platform_data = &(struct plat_lcd_data) {
145 .set_power = crag6410_lcd_power_set,
146 },
147};
148
149/* 640x480 URT */
150static struct s3c_fb_pd_win crag6410_fb_win0 = {
151 /* this is to ensure we use win0 */
152 .win_mode = {
153 .left_margin = 150,
154 .right_margin = 80,
155 .upper_margin = 40,
156 .lower_margin = 5,
157 .hsync_len = 40,
158 .vsync_len = 5,
159 .xres = 640,
160 .yres = 480,
161 },
162 .max_bpp = 32,
163 .default_bpp = 16,
164 .virtual_y = 480 * 2,
165 .virtual_x = 640,
166};
167
168/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
169static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
170 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
171 .win[0] = &crag6410_fb_win0,
172 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
173 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
174};
175
176/* 2x6 keypad */
177
178static uint32_t crag6410_keymap[] __initdata = {
179 /* KEY(row, col, keycode) */
180 KEY(0, 0, KEY_VOLUMEUP),
181 KEY(0, 1, KEY_HOME),
182 KEY(0, 2, KEY_VOLUMEDOWN),
183 KEY(0, 3, KEY_HELP),
184 KEY(0, 4, KEY_MENU),
185 KEY(0, 5, KEY_MEDIA),
186 KEY(1, 0, 232),
187 KEY(1, 1, KEY_DOWN),
188 KEY(1, 2, KEY_LEFT),
189 KEY(1, 3, KEY_UP),
190 KEY(1, 4, KEY_RIGHT),
191 KEY(1, 5, KEY_CAMERA),
192};
193
194static struct matrix_keymap_data crag6410_keymap_data __initdata = {
195 .keymap = crag6410_keymap,
196 .keymap_size = ARRAY_SIZE(crag6410_keymap),
197};
198
199static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
200 .keymap_data = &crag6410_keymap_data,
201 .rows = 2,
202 .cols = 6,
203};
204
205static struct gpio_keys_button crag6410_gpio_keys[] = {
206 [0] = {
207 .code = KEY_SUSPEND,
208 .gpio = S3C64XX_GPL(10), /* EINT 18 */
ae24c263 209 .type = EV_KEY,
e1a3c74f
MB		 210 .wakeup = 1,
211 .active_low = 1,
212 },
ae24c263
MB		 213 [1] = {
214 .code = SW_FRONT_PROXIMITY,
215 .gpio = S3C64XX_GPN(11), /* EINT 11 */
216 .type = EV_SW,
217 },
e1a3c74f
MB		 218};
219
220static struct gpio_keys_platform_data crag6410_gpio_keydata = {
221 .buttons = crag6410_gpio_keys,
222 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
223};
224
225static struct platform_device crag6410_gpio_keydev = {
226 .name = "gpio-keys",
227 .id = 0,
228 .dev.platform_data = &crag6410_gpio_keydata,
229};
230
231static struct resource crag6410_dm9k_resource[] = {
232 [0] = {
233 .start = S3C64XX_PA_XM0CSN5,
234 .end = S3C64XX_PA_XM0CSN5 + 1,
235 .flags = IORESOURCE_MEM,
236 },
237 [1] = {
238 .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
239 .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
240 .flags = IORESOURCE_MEM,
241 },
242 [2] = {
243 .start = S3C_EINT(17),
244 .end = S3C_EINT(17),
245 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
246 },
247};
248
249static struct dm9000_plat_data mini6410_dm9k_pdata = {
250 .flags = DM9000_PLATF_16BITONLY,
251};
252
253static struct platform_device crag6410_dm9k_device = {
254 .name = "dm9000",
255 .id = -1,
256 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
257 .resource = crag6410_dm9k_resource,
258 .dev.platform_data = &mini6410_dm9k_pdata,
259};
260
261static struct resource crag6410_mmgpio_resource[] = {
262 [0] = {
91b60b1d 263 .name = "dat",
e1a3c74f
MB		 264 .start = S3C64XX_PA_XM0CSN4 + 1,
265 .end = S3C64XX_PA_XM0CSN4 + 1,
266 .flags = IORESOURCE_MEM,
267 },
268};
269
270static struct platform_device crag6410_mmgpio = {
271 .name = "basic-mmio-gpio",
272 .id = -1,
273 .resource = crag6410_mmgpio_resource,
274 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
275 .dev.platform_data = &(struct bgpio_pdata) {
91b60b1d 276 .base = MMGPIO_GPIO_BASE,
e1a3c74f
MB		 277 },
278};
279
ae24c263
MB		 280static struct platform_device speyside_device = {
281 .name = "speyside",
282 .id = -1,
283};
284
8c051ab4
MB		 285static struct platform_device lowland_device = {
286 .name = "lowland",
287 .id = -1,
288};
289
ae24c263
MB		 290static struct platform_device speyside_wm8962_device = {
291 .name = "speyside-wm8962",
292 .id = -1,
293};
294
c5c32c96
MB		 295static struct platform_device littlemill_device = {
296 .name = "littlemill",
297 .id = -1,
298};
299
ae24c263
MB		 300static struct regulator_consumer_supply wallvdd_consumers[] = {
301 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
302 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
4ed12b50
MB		 303 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
304 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
ae24c263
MB		 305};
306
307static struct regulator_init_data wallvdd_data = {
308 .constraints = {
309 .always_on = 1,
310 },
311 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
312 .consumer_supplies = wallvdd_consumers,
313};
314
315static struct fixed_voltage_config wallvdd_pdata = {
316 .supply_name = "WALLVDD",
317 .microvolts = 5000000,
318 .init_data = &wallvdd_data,
319 .gpio = -EINVAL,
320};
321
322static struct platform_device wallvdd_device = {
323 .name = "reg-fixed-voltage",
324 .id = -1,
325 .dev = {
326 .platform_data = &wallvdd_pdata,
327 },
328};
329
e1a3c74f
MB		 330static struct platform_device *crag6410_devices[] __initdata = {
331 &s3c_device_hsmmc0,
e1a3c74f
MB		 332 &s3c_device_hsmmc2,
333 &s3c_device_i2c0,
334 &s3c_device_i2c1,
335 &s3c_device_fb,
336 &s3c_device_ohci,
337 &s3c_device_usb_hsotg,
e1a3c74f
MB		 338 &s3c_device_timer[0],
339 &s3c64xx_device_iis0,
340 &s3c64xx_device_iis1,
341 &samsung_asoc_dma,
342 &samsung_device_keypad,
343 &crag6410_gpio_keydev,
344 &crag6410_dm9k_device,
345 &s3c64xx_device_spi0,
346 &crag6410_mmgpio,
347 &crag6410_lcd_powerdev,
348 &crag6410_backlight_device,
ae24c263
MB		 349 &speyside_device,
350 &speyside_wm8962_device,
c5c32c96 351 &littlemill_device,
8c051ab4 352 &lowland_device,
ae24c263 353 &wallvdd_device,
e1a3c74f
MB		 354};
355
356static struct pca953x_platform_data crag6410_pca_data = {
357 .gpio_base = PCA935X_GPIO_BASE,
358 .irq_base = 0,
359};
360
986afc98
MB		 361/* VDDARM is controlled by DVS1 connected to GPK(0) */
362static struct wm831x_buckv_pdata vddarm_pdata = {
363 .dvs_control_src = 1,
364 .dvs_gpio = S3C64XX_GPK(0),
365};
366
e1a3c74f
MB		 367static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
368 REGULATOR_SUPPLY("vddarm", NULL),
369};
370
371static struct regulator_init_data vddarm __initdata = {
372 .constraints = {
373 .name = "VDDARM",
374 .min_uV = 1000000,
375 .max_uV = 1300000,
376 .always_on = 1,
377 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
378 },
379 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
380 .consumer_supplies = vddarm_consumers,
35127296 381 .supply_regulator = "WALLVDD",
986afc98 382 .driver_data = &vddarm_pdata,
e1a3c74f
MB		 383};
384
39cb263e
MB		 385static struct regulator_consumer_supply vddint_consumers[] __initdata = {
386 REGULATOR_SUPPLY("vddint", NULL),
387};
388
e1a3c74f
MB		 389static struct regulator_init_data vddint __initdata = {
390 .constraints = {
391 .name = "VDDINT",
392 .min_uV = 1000000,
393 .max_uV = 1200000,
394 .always_on = 1,
395 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
396 },
39cb263e
MB		 397 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
398 .consumer_supplies = vddint_consumers,
399 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 400};
401
402static struct regulator_init_data vddmem __initdata = {
403 .constraints = {
404 .name = "VDDMEM",
405 .always_on = 1,
406 },
407};
408
409static struct regulator_init_data vddsys __initdata = {
410 .constraints = {
411 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
412 .always_on = 1,
413 },
414};
415
416static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
417 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
418 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
419 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
420};
421
422static struct regulator_init_data vddmmc __initdata = {
423 .constraints = {
424 .name = "VDDMMC,UH",
425 .always_on = 1,
426 },
427 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
428 .consumer_supplies = vddmmc_consumers,
35127296 429 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 430};
431
432static struct regulator_init_data vddotgi __initdata = {
433 .constraints = {
434 .name = "VDDOTGi",
435 .always_on = 1,
436 },
35127296 437 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 438};
439
440static struct regulator_init_data vddotg __initdata = {
441 .constraints = {
442 .name = "VDDOTG",
443 .always_on = 1,
444 },
35127296 445 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 446};
447
448static struct regulator_init_data vddhi __initdata = {
449 .constraints = {
450 .name = "VDDHI",
451 .always_on = 1,
452 },
35127296 453 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 454};
455
456static struct regulator_init_data vddadc __initdata = {
457 .constraints = {
458 .name = "VDDADC,VDDDAC",
459 .always_on = 1,
460 },
35127296 461 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 462};
463
464static struct regulator_init_data vddmem0 __initdata = {
465 .constraints = {
466 .name = "VDDMEM0",
467 .always_on = 1,
468 },
35127296 469 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 470};
471
472static struct regulator_init_data vddpll __initdata = {
473 .constraints = {
474 .name = "VDDPLL",
475 .always_on = 1,
476 },
35127296 477 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 478};
479
480static struct regulator_init_data vddlcd __initdata = {
481 .constraints = {
482 .name = "VDDLCD",
483 .always_on = 1,
484 },
35127296 485 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 486};
487
488static struct regulator_init_data vddalive __initdata = {
489 .constraints = {
490 .name = "VDDALIVE",
491 .always_on = 1,
492 },
35127296 493 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 494};
495
89e1c3d0
MB		 496static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
497 .charger_enable = 1,
498 .vlim = 2500, /* mV */
499 .ilim = 200, /* uA */
500};
501
e1a3c74f
MB		 502static struct wm831x_status_pdata banff_red_led __initdata = {
503 .name = "banff:red:",
504 .default_src = WM831X_STATUS_MANUAL,
505};
506
507static struct wm831x_status_pdata banff_green_led __initdata = {
508 .name = "banff:green:",
509 .default_src = WM831X_STATUS_MANUAL,
510};
511
512static struct wm831x_touch_pdata touch_pdata __initdata = {
513 .data_irq = S3C_EINT(26),
ae24c263 514 .pd_irq = S3C_EINT(27),
e1a3c74f
MB		 515};
516
e1a3c74f 517static struct wm831x_pdata crag_pmic_pdata __initdata = {
ae24c263 518 .wm831x_num = 1,
e1a3c74f 519 .irq_base = BANFF_PMIC_IRQ_BASE,
aaed44e1 520 .gpio_base = BANFF_PMIC_GPIO_BASE,
dcf3580a 521 .soft_shutdown = true,
e1a3c74f 522
89e1c3d0
MB		 523 .backup = &banff_backup_pdata,
524
ae24c263 525 .gpio_defaults = {
986afc98
MB		 526 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
527 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
ae24c263
MB		 528 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
529 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
530 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
531 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
532 },
533
e1a3c74f
MB		 534 .dcdc = {
535 &vddarm, /* DCDC1 */
536 &vddint, /* DCDC2 */
537 &vddmem, /* DCDC3 */
538 },
539
540 .ldo = {
541 &vddsys, /* LDO1 */
542 &vddmmc, /* LDO2 */
543 NULL, /* LDO3 */
544 &vddotgi, /* LDO4 */
545 &vddotg, /* LDO5 */
546 &vddhi, /* LDO6 */
547 &vddadc, /* LDO7 */
548 &vddmem0, /* LDO8 */
549 &vddpll, /* LDO9 */
550 &vddlcd, /* LDO10 */
551 &vddalive, /* LDO11 */
552 },
553
554 .status = {
555 &banff_green_led,
556 &banff_red_led,
557 },
558
559 .touch = &touch_pdata,
560};
561
562static struct i2c_board_info i2c_devs0[] __initdata = {
563 { I2C_BOARD_INFO("24c08", 0x50), },
564 { I2C_BOARD_INFO("tca6408", 0x20),
565 .platform_data = &crag6410_pca_data,
566 },
567 { I2C_BOARD_INFO("wm8312", 0x34),
568 .platform_data = &crag_pmic_pdata,
569 .irq = S3C_EINT(23),
570 },
571};
572
573static struct s3c2410_platform_i2c i2c0_pdata = {
574 .frequency = 400000,
575};
576
ae24c263
MB		 577static struct regulator_init_data pvdd_1v2 __initdata = {
578 .constraints = {
579 .name = "PVDD_1V2",
580 .always_on = 1,
581 },
582};
583
584static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
d5160ecf 585 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
ae24c263
MB		 586 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
587 REGULATOR_SUPPLY("DBVDD", "1-001a"),
4ed12b50
MB		 588 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
589 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
590 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
ae24c263
MB		 591 REGULATOR_SUPPLY("CPVDD", "1-001a"),
592 REGULATOR_SUPPLY("AVDD2", "1-001a"),
593 REGULATOR_SUPPLY("DCVDD", "1-001a"),
594 REGULATOR_SUPPLY("AVDD", "1-001a"),
595};
596
597static struct regulator_init_data pvdd_1v8 __initdata = {
598 .constraints = {
599 .name = "PVDD_1V8",
600 .always_on = 1,
601 },
602
603 .consumer_supplies = pvdd_1v8_consumers,
604 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
605};
606
607static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
608 REGULATOR_SUPPLY("MICVDD", "1-001a"),
609 REGULATOR_SUPPLY("AVDD1", "1-001a"),
610};
611
612static struct regulator_init_data pvdd_3v3 __initdata = {
613 .constraints = {
614 .name = "PVDD_3V3",
615 .always_on = 1,
616 },
617
618 .consumer_supplies = pvdd_3v3_consumers,
619 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
620};
621
622static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
623 .wm831x_num = 2,
624 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
625 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
dcf3580a 626 .soft_shutdown = true,
ae24c263
MB		 627
628 .gpio_defaults = {
629 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
630 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
631 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
632 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
633 },
634
635 .dcdc = {
636 &pvdd_1v2, /* DCDC1 */
637 &pvdd_1v8, /* DCDC2 */
638 &pvdd_3v3, /* DCDC3 */
639 },
640
641 .disable_touch = true,
642};
643
8504a3cb
MB		 644static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
645 .gpios = {
646 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
647 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
648 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
649 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
650 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
651 },
652};
653
e1a3c74f
MB		 654static struct i2c_board_info i2c_devs1[] __initdata = {
655 { I2C_BOARD_INFO("wm8311", 0x34),
ae24c263
MB		 656 .irq = S3C_EINT(0),
657 .platform_data = &glenfarclas_pmic_pdata },
658
d0f0b43f
MB		 659 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
660 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
661 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
662
8504a3cb
MB		 663 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
664 .platform_data = &wm1250_ev1_pdata },
e1a3c74f
MB		 665};
666
8351c7aa
MB		 667static struct s3c2410_platform_i2c i2c1_pdata = {
668 .frequency = 400000,
669 .bus_num = 1,
e1a3c74f
MB		 670};
671
672static void __init crag6410_map_io(void)
673{
674 s3c64xx_init_io(NULL, 0);
675 s3c24xx_init_clocks(12000000);
676 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
677
678 /* LCD type and Bypass set by bootloader */
679}
680
681static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
682 .max_width = 4,
683 .cd_type = S3C_SDHCI_CD_PERMANENT,
684};
685
e1a3c74f
MB		 686static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
687{
688 /* Set all the necessary GPG pins to special-function 2 */
689 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
690
691 /* force card-detected for prototype 0 */
692 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
693}
694
695static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
696 .max_width = 4,
697 .cd_type = S3C_SDHCI_CD_INTERNAL,
698 .cfg_gpio = crag6410_cfg_sdhci0,
699};
700
701static void __init crag6410_machine_init(void)
702{
703 /* Open drain IRQs need pullups */
704 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
705 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
706
707 gpio_request(S3C64XX_GPB(0), "LCD power");
708 gpio_direction_output(S3C64XX_GPB(0), 0);
709
710 gpio_request(S3C64XX_GPF(14), "LCD PWM");
711 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
712
713 gpio_request(S3C64XX_GPB(1), "SD power");
714 gpio_direction_output(S3C64XX_GPB(1), 0);
715
716 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
717 gpio_direction_output(S3C64XX_GPF(10), 1);
718
719 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
e1a3c74f
MB		 720 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
721
722 s3c_i2c0_set_platdata(&i2c0_pdata);
8351c7aa 723 s3c_i2c1_set_platdata(&i2c1_pdata);
e1a3c74f
MB		 724 s3c_fb_set_platdata(&crag6410_lcd_pdata);
725
726 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
727 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
728
729 samsung_keypad_set_platdata(&crag6410_keypad_data);
730
731 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
732
ae24c263
MB		 733 regulator_has_full_constraints();
734
c656c306 735 s3c64xx_pm_init();
e1a3c74f
MB		 736}
737
738MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
739 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
170a5908 740 .atag_offset = 0x100,
e1a3c74f 741 .init_irq = s3c6410_init_irq,
774b51f8 742 .handle_irq = vic_handle_irq,
e1a3c74f
MB		 743 .map_io = crag6410_map_io,
744 .init_machine = crag6410_machine_init,
745 .timer = &s3c24xx_timer,
ff84ded2 746 .restart = s3c64xx_restart,
e1a3c74f 747MACHINE_END
Linux kernel - Deliverables
This page took 0.078155 seconds and 5 git commands to generate.