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Merge tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux...
[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-crag6410.c
CommitLineData
e1a3c74f
MB		 1/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
334a1c70 17#include <linux/serial_s3c.h>
e1a3c74f
MB		 18#include <linux/platform_device.h>
19#include <linux/fb.h>
20#include <linux/io.h>
21#include <linux/init.h>
22#include <linux/gpio.h>
66211f98 23#include <linux/leds.h>
e1a3c74f 24#include <linux/delay.h>
fb7f60f3 25#include <linux/mmc/host.h>
e1a3c74f 26#include <linux/regulator/machine.h>
ae24c263 27#include <linux/regulator/fixed.h>
e1a3c74f
MB		 28#include <linux/pwm_backlight.h>
29#include <linux/dm9000.h>
30#include <linux/gpio_keys.h>
31#include <linux/basic_mmio_gpio.h>
32#include <linux/spi/spi.h>
33
5877457a 34#include <linux/platform_data/pca953x.h>
126625e1 35#include <linux/platform_data/s3c-hsotg.h>
e1a3c74f
MB		 36
37#include <video/platform_lcd.h>
38
39#include <linux/mfd/wm831x/core.h>
40#include <linux/mfd/wm831x/pdata.h>
ae24c263 41#include <linux/mfd/wm831x/irq.h>
e1a3c74f
MB		 42#include <linux/mfd/wm831x/gpio.h>
43
8504a3cb
MB		 44#include <sound/wm1250-ev1.h>
45
e1a3c74f
MB		 46#include <asm/mach/arch.h>
47#include <asm/mach-types.h>
48
5a213a55 49#include <video/samsung_fimd.h>
e1a3c74f
MB		 50#include <mach/hardware.h>
51#include <mach/map.h>
e1a3c74f 52#include <mach/regs-gpio.h>
b0161caa 53#include <mach/gpio-samsung.h>
e1a3c74f 54
e1a3c74f
MB		 55#include <plat/fb.h>
56#include <plat/sdhci.h>
57#include <plat/gpio-cfg.h>
436d42c6 58#include <linux/platform_data/spi-s3c64xx.h>
e1a3c74f
MB		 59
60#include <plat/keypad.h>
e1a3c74f
MB		 61#include <plat/devs.h>
62#include <plat/cpu.h>
63#include <plat/adc.h>
436d42c6 64#include <linux/platform_data/i2c-s3c2410.h>
e1a3c74f 65#include <plat/pm.h>
04a49b71 66#include <plat/samsung-time.h>
e1a3c74f 67
b024043b 68#include "common.h"
e6235928 69#include "crag6410.h"
8bb86ead 70#include "regs-gpio-memport.h"
a81c1970 71#include "regs-modem.h"
f2bfd174 72#include "regs-sys.h"
b024043b 73
e1a3c74f
MB		 74/* serial port setup */
75
76#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
77#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
78#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
79
80static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
81 [0] = {
ae24c263
MB		 82 .hwport = 0,
83 .flags = 0,
84 .ucon = UCON,
85 .ulcon = ULCON,
86 .ufcon = UFCON,
e1a3c74f
MB		 87 },
88 [1] = {
ae24c263
MB		 89 .hwport = 1,
90 .flags = 0,
91 .ucon = UCON,
92 .ulcon = ULCON,
93 .ufcon = UFCON,
e1a3c74f
MB		 94 },
95 [2] = {
ae24c263
MB		 96 .hwport = 2,
97 .flags = 0,
98 .ucon = UCON,
99 .ulcon = ULCON,
100 .ufcon = UFCON,
e1a3c74f
MB		 101 },
102 [3] = {
ae24c263
MB		 103 .hwport = 3,
104 .flags = 0,
105 .ucon = UCON,
106 .ulcon = ULCON,
107 .ufcon = UFCON,
e1a3c74f
MB		 108 },
109};
110
111static struct platform_pwm_backlight_data crag6410_backlight_data = {
112 .pwm_id = 0,
113 .max_brightness = 1000,
114 .dft_brightness = 600,
115 .pwm_period_ns = 100000, /* about 1kHz */
a63652f1 116 .enable_gpio = -1,
e1a3c74f
MB		 117};
118
119static struct platform_device crag6410_backlight_device = {
120 .name = "pwm-backlight",
121 .id = -1,
122 .dev = {
7fa33bdb 123 .parent = &samsung_device_pwm.dev,
e1a3c74f
MB		 124 .platform_data = &crag6410_backlight_data,
125 },
126};
127
128static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
129{
130 pr_debug("%s: setting power %d\n", __func__, power);
131
132 if (power) {
133 gpio_set_value(S3C64XX_GPB(0), 1);
134 msleep(1);
135 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
136 } else {
137 gpio_direction_output(S3C64XX_GPF(14), 0);
138 gpio_set_value(S3C64XX_GPB(0), 0);
139 }
140}
141
142static struct platform_device crag6410_lcd_powerdev = {
143 .name = "platform-lcd",
144 .id = -1,
145 .dev.parent = &s3c_device_fb.dev,
146 .dev.platform_data = &(struct plat_lcd_data) {
147 .set_power = crag6410_lcd_power_set,
148 },
149};
150
151/* 640x480 URT */
152static struct s3c_fb_pd_win crag6410_fb_win0 = {
e1a3c74f
MB		 153 .max_bpp = 32,
154 .default_bpp = 16,
79d3c41a
TA		 155 .xres = 640,
156 .yres = 480,
e1a3c74f
MB		 157 .virtual_y = 480 * 2,
158 .virtual_x = 640,
159};
160
79d3c41a
TA		 161static struct fb_videomode crag6410_lcd_timing = {
162 .left_margin = 150,
163 .right_margin = 80,
164 .upper_margin = 40,
165 .lower_margin = 5,
166 .hsync_len = 40,
167 .vsync_len = 5,
168 .xres = 640,
169 .yres = 480,
170};
171
e1a3c74f 172/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
351a102d 173static struct s3c_fb_platdata crag6410_lcd_pdata = {
e1a3c74f 174 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
79d3c41a 175 .vtiming = &crag6410_lcd_timing,
e1a3c74f
MB		 176 .win[0] = &crag6410_fb_win0,
177 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
178 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
179};
180
181/* 2x6 keypad */
182
351a102d 183static uint32_t crag6410_keymap[] = {
e1a3c74f
MB		 184 /* KEY(row, col, keycode) */
185 KEY(0, 0, KEY_VOLUMEUP),
186 KEY(0, 1, KEY_HOME),
187 KEY(0, 2, KEY_VOLUMEDOWN),
188 KEY(0, 3, KEY_HELP),
189 KEY(0, 4, KEY_MENU),
190 KEY(0, 5, KEY_MEDIA),
191 KEY(1, 0, 232),
192 KEY(1, 1, KEY_DOWN),
193 KEY(1, 2, KEY_LEFT),
194 KEY(1, 3, KEY_UP),
195 KEY(1, 4, KEY_RIGHT),
196 KEY(1, 5, KEY_CAMERA),
197};
198
351a102d 199static struct matrix_keymap_data crag6410_keymap_data = {
e1a3c74f
MB		 200 .keymap = crag6410_keymap,
201 .keymap_size = ARRAY_SIZE(crag6410_keymap),
202};
203
351a102d 204static struct samsung_keypad_platdata crag6410_keypad_data = {
e1a3c74f
MB		 205 .keymap_data = &crag6410_keymap_data,
206 .rows = 2,
207 .cols = 6,
208};
209
210static struct gpio_keys_button crag6410_gpio_keys[] = {
211 [0] = {
212 .code = KEY_SUSPEND,
213 .gpio = S3C64XX_GPL(10), /* EINT 18 */
ae24c263 214 .type = EV_KEY,
e1a3c74f
MB		 215 .wakeup = 1,
216 .active_low = 1,
217 },
ae24c263
MB		 218 [1] = {
219 .code = SW_FRONT_PROXIMITY,
220 .gpio = S3C64XX_GPN(11), /* EINT 11 */
221 .type = EV_SW,
222 },
e1a3c74f
MB		 223};
224
225static struct gpio_keys_platform_data crag6410_gpio_keydata = {
226 .buttons = crag6410_gpio_keys,
227 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
228};
229
230static struct platform_device crag6410_gpio_keydev = {
231 .name = "gpio-keys",
232 .id = 0,
233 .dev.platform_data = &crag6410_gpio_keydata,
234};
235
236static struct resource crag6410_dm9k_resource[] = {
8ebf148a
TB		 237 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
238 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
239 [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
240 | IORESOURCE_IRQ_HIGHLEVEL),
e1a3c74f
MB		 241};
242
243static struct dm9000_plat_data mini6410_dm9k_pdata = {
244 .flags = DM9000_PLATF_16BITONLY,
245};
246
247static struct platform_device crag6410_dm9k_device = {
248 .name = "dm9000",
249 .id = -1,
250 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
251 .resource = crag6410_dm9k_resource,
252 .dev.platform_data = &mini6410_dm9k_pdata,
253};
254
255static struct resource crag6410_mmgpio_resource[] = {
8ebf148a 256 [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
e1a3c74f
MB		 257};
258
259static struct platform_device crag6410_mmgpio = {
260 .name = "basic-mmio-gpio",
261 .id = -1,
262 .resource = crag6410_mmgpio_resource,
263 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
264 .dev.platform_data = &(struct bgpio_pdata) {
91b60b1d 265 .base = MMGPIO_GPIO_BASE,
e1a3c74f
MB		 266 },
267};
268
ae24c263
MB		 269static struct platform_device speyside_device = {
270 .name = "speyside",
271 .id = -1,
272};
273
8c051ab4
MB		 274static struct platform_device lowland_device = {
275 .name = "lowland",
276 .id = -1,
277};
278
6414261f
MB		 279static struct platform_device tobermory_device = {
280 .name = "tobermory",
ae24c263
MB		 281 .id = -1,
282};
283
c5c32c96
MB		 284static struct platform_device littlemill_device = {
285 .name = "littlemill",
286 .id = -1,
287};
288
3322914e 289static struct platform_device bells_wm2200_device = {
25752b78
MB		 290 .name = "bells",
291 .id = 0,
292};
293
3322914e 294static struct platform_device bells_wm5102_device = {
25752b78
MB		 295 .name = "bells",
296 .id = 1,
297};
298
3322914e
MB		 299static struct platform_device bells_wm5110_device = {
300 .name = "bells",
301 .id = 2,
302};
303
ae24c263 304static struct regulator_consumer_supply wallvdd_consumers[] = {
554f01fb 305 REGULATOR_SUPPLY("SPKVDD", "1-001a"),
ae24c263
MB		 306 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
307 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
4ed12b50
MB		 308 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
309 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
402f624b 310
479535ed
MB		 311 REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
312 REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
479535ed 313
402f624b
MB		 314 REGULATOR_SUPPLY("DC1VDD", "0-0034"),
315 REGULATOR_SUPPLY("DC2VDD", "0-0034"),
316 REGULATOR_SUPPLY("DC3VDD", "0-0034"),
317 REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
318 REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
319 REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
320 REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
321 REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
322 REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
323 REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
324 REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
325 REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
326 REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
327
328 REGULATOR_SUPPLY("DC1VDD", "1-0034"),
329 REGULATOR_SUPPLY("DC2VDD", "1-0034"),
330 REGULATOR_SUPPLY("DC3VDD", "1-0034"),
f4fe3881
MB		 331 REGULATOR_SUPPLY("LDO1VDD", "1-0034"),
332 REGULATOR_SUPPLY("LDO2VDD", "1-0034"),
333 REGULATOR_SUPPLY("LDO4VDD", "1-0034"),
334 REGULATOR_SUPPLY("LDO5VDD", "1-0034"),
335 REGULATOR_SUPPLY("LDO6VDD", "1-0034"),
336 REGULATOR_SUPPLY("LDO7VDD", "1-0034"),
337 REGULATOR_SUPPLY("LDO8VDD", "1-0034"),
338 REGULATOR_SUPPLY("LDO9VDD", "1-0034"),
339 REGULATOR_SUPPLY("LDO10VDD", "1-0034"),
340 REGULATOR_SUPPLY("LDO11VDD", "1-0034"),
ae24c263
MB		 341};
342
343static struct regulator_init_data wallvdd_data = {
344 .constraints = {
345 .always_on = 1,
346 },
347 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
348 .consumer_supplies = wallvdd_consumers,
349};
350
351static struct fixed_voltage_config wallvdd_pdata = {
352 .supply_name = "WALLVDD",
353 .microvolts = 5000000,
354 .init_data = &wallvdd_data,
355 .gpio = -EINVAL,
356};
357
358static struct platform_device wallvdd_device = {
359 .name = "reg-fixed-voltage",
360 .id = -1,
361 .dev = {
362 .platform_data = &wallvdd_pdata,
363 },
364};
365
e1a3c74f
MB		 366static struct platform_device *crag6410_devices[] __initdata = {
367 &s3c_device_hsmmc0,
e1a3c74f
MB		 368 &s3c_device_hsmmc2,
369 &s3c_device_i2c0,
370 &s3c_device_i2c1,
371 &s3c_device_fb,
372 &s3c_device_ohci,
373 &s3c_device_usb_hsotg,
7fa33bdb 374 &samsung_device_pwm,
e1a3c74f
MB		 375 &s3c64xx_device_iis0,
376 &s3c64xx_device_iis1,
e1a3c74f
MB		 377 &samsung_device_keypad,
378 &crag6410_gpio_keydev,
379 &crag6410_dm9k_device,
380 &s3c64xx_device_spi0,
381 &crag6410_mmgpio,
382 &crag6410_lcd_powerdev,
383 &crag6410_backlight_device,
ae24c263 384 &speyside_device,
6414261f 385 &tobermory_device,
c5c32c96 386 &littlemill_device,
8c051ab4 387 &lowland_device,
3322914e 388 &bells_wm2200_device,
25752b78
MB		 389 &bells_wm5102_device,
390 &bells_wm5110_device,
ae24c263 391 &wallvdd_device,
e1a3c74f
MB		 392};
393
394static struct pca953x_platform_data crag6410_pca_data = {
395 .gpio_base = PCA935X_GPIO_BASE,
6e11e0bd 396 .irq_base = -1,
e1a3c74f
MB		 397};
398
986afc98
MB		 399/* VDDARM is controlled by DVS1 connected to GPK(0) */
400static struct wm831x_buckv_pdata vddarm_pdata = {
401 .dvs_control_src = 1,
402 .dvs_gpio = S3C64XX_GPK(0),
403};
404
351a102d 405static struct regulator_consumer_supply vddarm_consumers[] = {
e1a3c74f
MB		 406 REGULATOR_SUPPLY("vddarm", NULL),
407};
408
351a102d 409static struct regulator_init_data vddarm = {
e1a3c74f
MB		 410 .constraints = {
411 .name = "VDDARM",
412 .min_uV = 1000000,
413 .max_uV = 1300000,
414 .always_on = 1,
415 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
416 },
417 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
418 .consumer_supplies = vddarm_consumers,
35127296 419 .supply_regulator = "WALLVDD",
986afc98 420 .driver_data = &vddarm_pdata,
e1a3c74f
MB		 421};
422
351a102d 423static struct regulator_consumer_supply vddint_consumers[] = {
39cb263e
MB		 424 REGULATOR_SUPPLY("vddint", NULL),
425};
426
351a102d 427static struct regulator_init_data vddint = {
e1a3c74f
MB		 428 .constraints = {
429 .name = "VDDINT",
430 .min_uV = 1000000,
431 .max_uV = 1200000,
432 .always_on = 1,
433 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
434 },
39cb263e
MB		 435 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
436 .consumer_supplies = vddint_consumers,
437 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 438};
439
351a102d 440static struct regulator_init_data vddmem = {
e1a3c74f
MB		 441 .constraints = {
442 .name = "VDDMEM",
443 .always_on = 1,
444 },
445};
446
351a102d 447static struct regulator_init_data vddsys = {
e1a3c74f
MB		 448 .constraints = {
449 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
450 .always_on = 1,
451 },
452};
453
351a102d 454static struct regulator_consumer_supply vddmmc_consumers[] = {
e1a3c74f
MB		 455 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
456 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
457 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
458};
459
351a102d 460static struct regulator_init_data vddmmc = {
e1a3c74f
MB		 461 .constraints = {
462 .name = "VDDMMC,UH",
463 .always_on = 1,
464 },
465 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
466 .consumer_supplies = vddmmc_consumers,
35127296 467 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 468};
469
351a102d 470static struct regulator_init_data vddotgi = {
e1a3c74f
MB		 471 .constraints = {
472 .name = "VDDOTGi",
473 .always_on = 1,
474 },
35127296 475 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 476};
477
351a102d 478static struct regulator_init_data vddotg = {
e1a3c74f
MB		 479 .constraints = {
480 .name = "VDDOTG",
481 .always_on = 1,
482 },
35127296 483 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 484};
485
351a102d 486static struct regulator_init_data vddhi = {
e1a3c74f
MB		 487 .constraints = {
488 .name = "VDDHI",
489 .always_on = 1,
490 },
35127296 491 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 492};
493
351a102d 494static struct regulator_init_data vddadc = {
e1a3c74f
MB		 495 .constraints = {
496 .name = "VDDADC,VDDDAC",
497 .always_on = 1,
498 },
35127296 499 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 500};
501
351a102d 502static struct regulator_init_data vddmem0 = {
e1a3c74f
MB		 503 .constraints = {
504 .name = "VDDMEM0",
505 .always_on = 1,
506 },
35127296 507 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 508};
509
351a102d 510static struct regulator_init_data vddpll = {
e1a3c74f
MB		 511 .constraints = {
512 .name = "VDDPLL",
513 .always_on = 1,
514 },
35127296 515 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 516};
517
351a102d 518static struct regulator_init_data vddlcd = {
e1a3c74f
MB		 519 .constraints = {
520 .name = "VDDLCD",
521 .always_on = 1,
522 },
35127296 523 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 524};
525
351a102d 526static struct regulator_init_data vddalive = {
e1a3c74f
MB		 527 .constraints = {
528 .name = "VDDALIVE",
529 .always_on = 1,
530 },
35127296 531 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 532};
533
351a102d 534static struct wm831x_backup_pdata banff_backup_pdata = {
89e1c3d0
MB		 535 .charger_enable = 1,
536 .vlim = 2500, /* mV */
537 .ilim = 200, /* uA */
538};
539
351a102d 540static struct wm831x_status_pdata banff_red_led = {
e1a3c74f
MB		 541 .name = "banff:red:",
542 .default_src = WM831X_STATUS_MANUAL,
543};
544
351a102d 545static struct wm831x_status_pdata banff_green_led = {
e1a3c74f
MB		 546 .name = "banff:green:",
547 .default_src = WM831X_STATUS_MANUAL,
548};
549
351a102d 550static struct wm831x_touch_pdata touch_pdata = {
e1a3c74f 551 .data_irq = S3C_EINT(26),
ae24c263 552 .pd_irq = S3C_EINT(27),
e1a3c74f
MB		 553};
554
351a102d 555static struct wm831x_pdata crag_pmic_pdata = {
ae24c263 556 .wm831x_num = 1,
aaed44e1 557 .gpio_base = BANFF_PMIC_GPIO_BASE,
dcf3580a 558 .soft_shutdown = true,
e1a3c74f 559
89e1c3d0
MB		 560 .backup = &banff_backup_pdata,
561
ae24c263 562 .gpio_defaults = {
986afc98
MB		 563 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
564 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
ae24c263
MB		 565 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
566 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
567 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
568 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
569 },
570
e1a3c74f
MB		 571 .dcdc = {
572 &vddarm, /* DCDC1 */
573 &vddint, /* DCDC2 */
574 &vddmem, /* DCDC3 */
575 },
576
577 .ldo = {
578 &vddsys, /* LDO1 */
579 &vddmmc, /* LDO2 */
580 NULL, /* LDO3 */
581 &vddotgi, /* LDO4 */
582 &vddotg, /* LDO5 */
583 &vddhi, /* LDO6 */
584 &vddadc, /* LDO7 */
585 &vddmem0, /* LDO8 */
586 &vddpll, /* LDO9 */
587 &vddlcd, /* LDO10 */
588 &vddalive, /* LDO11 */
589 },
590
591 .status = {
592 &banff_green_led,
593 &banff_red_led,
594 },
595
596 .touch = &touch_pdata,
597};
598
351a102d 599static struct i2c_board_info i2c_devs0[] = {
e1a3c74f
MB		 600 { I2C_BOARD_INFO("24c08", 0x50), },
601 { I2C_BOARD_INFO("tca6408", 0x20),
602 .platform_data = &crag6410_pca_data,
603 },
604 { I2C_BOARD_INFO("wm8312", 0x34),
605 .platform_data = &crag_pmic_pdata,
606 .irq = S3C_EINT(23),
607 },
608};
609
610static struct s3c2410_platform_i2c i2c0_pdata = {
611 .frequency = 400000,
612};
613
351a102d 614static struct regulator_consumer_supply pvdd_1v2_consumers[] = {
cda2349a
MB		 615 REGULATOR_SUPPLY("DCVDD", "spi0.0"),
616 REGULATOR_SUPPLY("AVDD", "spi0.0"),
479535ed 617 REGULATOR_SUPPLY("AVDD", "spi0.1"),
cda2349a
MB		 618};
619
351a102d 620static struct regulator_init_data pvdd_1v2 = {
ae24c263
MB		 621 .constraints = {
622 .name = "PVDD_1V2",
cda2349a 623 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
ae24c263 624 },
cda2349a
MB		 625
626 .consumer_supplies = pvdd_1v2_consumers,
627 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
ae24c263
MB		 628};
629
351a102d 630static struct regulator_consumer_supply pvdd_1v8_consumers[] = {
d5160ecf 631 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
ae24c263
MB		 632 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
633 REGULATOR_SUPPLY("DBVDD", "1-001a"),
4ed12b50
MB		 634 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
635 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
636 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
ae24c263
MB		 637 REGULATOR_SUPPLY("CPVDD", "1-001a"),
638 REGULATOR_SUPPLY("AVDD2", "1-001a"),
639 REGULATOR_SUPPLY("DCVDD", "1-001a"),
640 REGULATOR_SUPPLY("AVDD", "1-001a"),
cda2349a 641 REGULATOR_SUPPLY("DBVDD", "spi0.0"),
e6a194b7
MB		 642
643 REGULATOR_SUPPLY("DBVDD", "1-003a"),
644 REGULATOR_SUPPLY("LDOVDD", "1-003a"),
645 REGULATOR_SUPPLY("CPVDD", "1-003a"),
646 REGULATOR_SUPPLY("AVDD", "1-003a"),
479535ed
MB		 647 REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
648 REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
649 REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
650 REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
651 REGULATOR_SUPPLY("CPVDD", "spi0.1"),
ae24c263
MB		 652};
653
351a102d 654static struct regulator_init_data pvdd_1v8 = {
ae24c263
MB		 655 .constraints = {
656 .name = "PVDD_1V8",
657 .always_on = 1,
658 },
659
660 .consumer_supplies = pvdd_1v8_consumers,
661 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
662};
663
351a102d 664static struct regulator_consumer_supply pvdd_3v3_consumers[] = {
ae24c263
MB		 665 REGULATOR_SUPPLY("MICVDD", "1-001a"),
666 REGULATOR_SUPPLY("AVDD1", "1-001a"),
667};
668
351a102d 669static struct regulator_init_data pvdd_3v3 = {
ae24c263
MB		 670 .constraints = {
671 .name = "PVDD_3V3",
672 .always_on = 1,
673 },
674
675 .consumer_supplies = pvdd_3v3_consumers,
676 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
677};
678
351a102d 679static struct wm831x_pdata glenfarclas_pmic_pdata = {
ae24c263
MB		 680 .wm831x_num = 2,
681 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
682 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
dcf3580a 683 .soft_shutdown = true,
ae24c263
MB		 684
685 .gpio_defaults = {
686 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
687 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
688 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
689 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
690 },
691
692 .dcdc = {
693 &pvdd_1v2, /* DCDC1 */
694 &pvdd_1v8, /* DCDC2 */
695 &pvdd_3v3, /* DCDC3 */
696 },
697
698 .disable_touch = true,
699};
700
8504a3cb
MB		 701static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
702 .gpios = {
703 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
704 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
705 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
706 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
707 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
708 },
709};
710
351a102d 711static struct i2c_board_info i2c_devs1[] = {
e1a3c74f 712 { I2C_BOARD_INFO("wm8311", 0x34),
ae24c263
MB		 713 .irq = S3C_EINT(0),
714 .platform_data = &glenfarclas_pmic_pdata },
715
091cff0a 716 { I2C_BOARD_INFO("wlf-gf-module", 0x20) },
ea070cd2 717 { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
d0f0b43f
MB		 718 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
719 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
720 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
721
8504a3cb
MB		 722 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
723 .platform_data = &wm1250_ev1_pdata },
e1a3c74f
MB		 724};
725
8351c7aa
MB		 726static struct s3c2410_platform_i2c i2c1_pdata = {
727 .frequency = 400000,
728 .bus_num = 1,
e1a3c74f
MB		 729};
730
731static void __init crag6410_map_io(void)
732{
733 s3c64xx_init_io(NULL, 0);
b69f460d 734 s3c64xx_set_xtal_freq(12000000);
e1a3c74f 735 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
04a49b71 736 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
e1a3c74f
MB		 737
738 /* LCD type and Bypass set by bootloader */
739}
740
741static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
742 .max_width = 4,
743 .cd_type = S3C_SDHCI_CD_PERMANENT,
a9294cdc 744 .host_caps = MMC_CAP_POWER_OFF_CARD,
e1a3c74f
MB		 745};
746
e1a3c74f
MB		 747static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
748{
749 /* Set all the necessary GPG pins to special-function 2 */
750 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
751
752 /* force card-detected for prototype 0 */
753 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
754}
755
756static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
757 .max_width = 4,
758 .cd_type = S3C_SDHCI_CD_INTERNAL,
759 .cfg_gpio = crag6410_cfg_sdhci0,
fb7f60f3 760 .host_caps = MMC_CAP_POWER_OFF_CARD,
e1a3c74f
MB		 761};
762
66211f98
MB		 763static const struct gpio_led gpio_leds[] = {
764 {
765 .name = "d13:green:",
766 .gpio = MMGPIO_GPIO_BASE + 0,
767 .default_state = LEDS_GPIO_DEFSTATE_ON,
768 },
769 {
770 .name = "d14:green:",
771 .gpio = MMGPIO_GPIO_BASE + 1,
772 .default_state = LEDS_GPIO_DEFSTATE_ON,
773 },
774 {
775 .name = "d15:green:",
776 .gpio = MMGPIO_GPIO_BASE + 2,
777 .default_state = LEDS_GPIO_DEFSTATE_ON,
778 },
779 {
780 .name = "d16:green:",
781 .gpio = MMGPIO_GPIO_BASE + 3,
782 .default_state = LEDS_GPIO_DEFSTATE_ON,
783 },
784 {
785 .name = "d17:green:",
786 .gpio = MMGPIO_GPIO_BASE + 4,
787 .default_state = LEDS_GPIO_DEFSTATE_ON,
788 },
789 {
790 .name = "d18:green:",
791 .gpio = MMGPIO_GPIO_BASE + 5,
792 .default_state = LEDS_GPIO_DEFSTATE_ON,
793 },
794 {
795 .name = "d19:green:",
796 .gpio = MMGPIO_GPIO_BASE + 6,
797 .default_state = LEDS_GPIO_DEFSTATE_ON,
798 },
799 {
800 .name = "d20:green:",
801 .gpio = MMGPIO_GPIO_BASE + 7,
802 .default_state = LEDS_GPIO_DEFSTATE_ON,
803 },
804};
805
806static const struct gpio_led_platform_data gpio_leds_pdata = {
807 .leds = gpio_leds,
808 .num_leds = ARRAY_SIZE(gpio_leds),
e1a3c74f
MB		 809};
810
99f6e1f5
JS		 811static struct s3c_hsotg_plat crag6410_hsotg_pdata;
812
e1a3c74f
MB		 813static void __init crag6410_machine_init(void)
814{
815 /* Open drain IRQs need pullups */
816 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
817 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
818
819 gpio_request(S3C64XX_GPB(0), "LCD power");
820 gpio_direction_output(S3C64XX_GPB(0), 0);
821
822 gpio_request(S3C64XX_GPF(14), "LCD PWM");
823 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
824
825 gpio_request(S3C64XX_GPB(1), "SD power");
826 gpio_direction_output(S3C64XX_GPB(1), 0);
827
828 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
829 gpio_direction_output(S3C64XX_GPF(10), 1);
830
831 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
e1a3c74f
MB		 832 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
833
834 s3c_i2c0_set_platdata(&i2c0_pdata);
8351c7aa 835 s3c_i2c1_set_platdata(&i2c1_pdata);
e1a3c74f 836 s3c_fb_set_platdata(&crag6410_lcd_pdata);
99f6e1f5 837 s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
e1a3c74f
MB		 838
839 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
840 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
841
842 samsung_keypad_set_platdata(&crag6410_keypad_data);
479535ed 843 s3c64xx_spi0_set_platdata(NULL, 0, 2);
e1a3c74f
MB		 844
845 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
846
66211f98
MB		 847 gpio_led_register_device(-1, &gpio_leds_pdata);
848
ae24c263
MB		 849 regulator_has_full_constraints();
850
c656c306 851 s3c64xx_pm_init();
e1a3c74f
MB		 852}
853
854MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
855 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
170a5908 856 .atag_offset = 0x100,
e1a3c74f
MB		 857 .init_irq = s3c6410_init_irq,
858 .map_io = crag6410_map_io,
859 .init_machine = crag6410_machine_init,
cc8f252b 860 .init_late = s3c64xx_init_late,
04a49b71 861 .init_time = samsung_timer_init,
ff84ded2 862 .restart = s3c64xx_restart,
e1a3c74f 863MACHINE_END
Linux kernel - Deliverables
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