[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-mini6410.c

/* linux/arch/arm/mach-s3c64xx/mach-mini6410.c
 *
 * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2008 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
*/

#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/fb.h>
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/dm9000.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/serial_core.h>
#include <linux/serial_s3c.h>
#include <linux/types.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>

#include <mach/map.h>
#include <mach/regs-gpio.h>
#include <mach/gpio-samsung.h>

#include <plat/adc.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/fb.h>
#include <linux/platform_data/mtd-nand-s3c2410.h>
#include <linux/platform_data/mmc-sdhci-s3c.h>
#include <plat/sdhci.h>
#include <linux/platform_data/touchscreen-s3c2410.h>

#include <video/platform_lcd.h>
#include <video/samsung_fimd.h>
#include <plat/samsung-time.h>

#include "common.h"
#include "regs-modem.h"
#include "regs-srom.h"

#define UCON S3C2410_UCON_DEFAULT
#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)

static struct s3c2410_uartcfg mini6410_uartcfgs[] __initdata = {
	[0] = {
		.hwport	= 0,
		.flags	= 0,
		.ucon	= UCON,
		.ulcon	= ULCON,
		.ufcon	= UFCON,
	},
	[1] = {
		.hwport	= 1,
		.flags	= 0,
		.ucon	= UCON,
		.ulcon	= ULCON,
		.ufcon	= UFCON,
	},
	[2] = {
		.hwport	= 2,
		.flags	= 0,
		.ucon	= UCON,
		.ulcon	= ULCON,
		.ufcon	= UFCON,
	},
	[3] = {
		.hwport	= 3,
		.flags	= 0,
		.ucon	= UCON,
		.ulcon	= ULCON,
		.ufcon	= UFCON,
	},
};

/* DM9000AEP 10/100 ethernet controller */

static struct resource mini6410_dm9k_resource[] = {
	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
	[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
	[2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
					| IORESOURCE_IRQ_HIGHLEVEL),
};

static struct dm9000_plat_data mini6410_dm9k_pdata = {
	.flags		= (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
};

static struct platform_device mini6410_device_eth = {
	.name		= "dm9000",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(mini6410_dm9k_resource),
	.resource	= mini6410_dm9k_resource,
	.dev		= {
		.platform_data	= &mini6410_dm9k_pdata,
	},
};

static struct mtd_partition mini6410_nand_part[] = {
	[0] = {
		.name	= "uboot",
		.size	= SZ_1M,
		.offset	= 0,
	},
	[1] = {
		.name	= "kernel",
		.size	= SZ_2M,
		.offset	= SZ_1M,
	},
	[2] = {
		.name	= "rootfs",
		.size	= MTDPART_SIZ_FULL,
		.offset	= SZ_1M + SZ_2M,
	},
};

static struct s3c2410_nand_set mini6410_nand_sets[] = {
	[0] = {
		.name		= "nand",
		.nr_chips	= 1,
		.nr_partitions	= ARRAY_SIZE(mini6410_nand_part),
		.partitions	= mini6410_nand_part,
	},
};

static struct s3c2410_platform_nand mini6410_nand_info = {
	.tacls		= 25,
	.twrph0		= 55,
	.twrph1		= 40,
	.nr_sets	= ARRAY_SIZE(mini6410_nand_sets),
	.sets		= mini6410_nand_sets,
};

static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {
	.max_bpp	= 32,
	.default_bpp	= 16,
	.xres		= 480,
	.yres		= 272,
};

static struct fb_videomode mini6410_lcd_type0_timing = {
	/* 4.3" 480x272 */
	.left_margin	= 3,
	.right_margin	= 2,
	.upper_margin	= 1,
	.lower_margin	= 1,
	.hsync_len	= 40,
	.vsync_len	= 1,
	.xres		= 480,
	.yres		= 272,
};

static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win = {
	.max_bpp	= 32,
	.default_bpp	= 16,
	.xres		= 800,
	.yres		= 480,
};

static struct fb_videomode mini6410_lcd_type1_timing = {
	/* 7.0" 800x480 */
	.left_margin	= 8,
	.right_margin	= 13,
	.upper_margin	= 7,
	.lower_margin	= 5,
	.hsync_len	= 3,
	.vsync_len	= 1,
	.xres		= 800,
	.yres		= 480,
};

static struct s3c_fb_platdata mini6410_lcd_pdata[] __initdata = {
	{
		.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
		.vtiming	= &mini6410_lcd_type0_timing,
		.win[0]		= &mini6410_lcd_type0_fb_win,
		.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
		.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
	}, {
		.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
		.vtiming	= &mini6410_lcd_type1_timing,
		.win[0]		= &mini6410_lcd_type1_fb_win,
		.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
		.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
	},
	{ },
};

static void mini6410_lcd_power_set(struct plat_lcd_data *pd,
				   unsigned int power)
{
	if (power)
		gpio_direction_output(S3C64XX_GPE(0), 1);
	else
		gpio_direction_output(S3C64XX_GPE(0), 0);
}

static struct plat_lcd_data mini6410_lcd_power_data = {
	.set_power	= mini6410_lcd_power_set,
};

static struct platform_device mini6410_lcd_powerdev = {
	.name			= "platform-lcd",
	.dev.parent		= &s3c_device_fb.dev,
	.dev.platform_data	= &mini6410_lcd_power_data,
};

static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata = {
	.max_width		= 4,
	.cd_type		= S3C_SDHCI_CD_GPIO,
	.ext_cd_gpio		= S3C64XX_GPN(10),
	.ext_cd_gpio_invert	= true,
};

static struct platform_device *mini6410_devices[] __initdata = {
	&mini6410_device_eth,
	&s3c_device_hsmmc0,
	&s3c_device_hsmmc1,
	&s3c_device_ohci,
	&s3c_device_nand,
	&s3c_device_fb,
	&mini6410_lcd_powerdev,
	&s3c_device_adc,
	&s3c_device_ts,
};

static void __init mini6410_map_io(void)
{
	u32 tmp;

	s3c64xx_init_io(NULL, 0);
	s3c64xx_set_xtal_freq(12000000);
	s3c24xx_init_uarts(mini6410_uartcfgs, ARRAY_SIZE(mini6410_uartcfgs));
	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);

	/* set the LCD type */
	tmp = __raw_readl(S3C64XX_SPCON);
	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
	tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
	__raw_writel(tmp, S3C64XX_SPCON);

	/* remove the LCD bypass */
	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
	tmp &= ~MIFPCON_LCD_BYPASS;
	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
}

/*
 * mini6410_features string
 *
 * 0-9 LCD configuration
 *
 */
static char mini6410_features_str[12] __initdata = "0";

static int __init mini6410_features_setup(char *str)
{
	if (str)
		strlcpy(mini6410_features_str, str,
			sizeof(mini6410_features_str));
	return 1;
}

__setup("mini6410=", mini6410_features_setup);

#define FEATURE_SCREEN (1 << 0)

struct mini6410_features_t {
	int done;
	int lcd_index;
};

static void mini6410_parse_features(
		struct mini6410_features_t *features,
		const char *features_str)
{
	const char *fp = features_str;

	features->done = 0;
	features->lcd_index = 0;

	while (*fp) {
		char f = *fp++;

		switch (f) {
		case '0'...'9':	/* tft screen */
			if (features->done & FEATURE_SCREEN) {
				printk(KERN_INFO "MINI6410: '%c' ignored, "
					"screen type already set\n", f);
			} else {
				int li = f - '0';
				if (li >= ARRAY_SIZE(mini6410_lcd_pdata))
					printk(KERN_INFO "MINI6410: '%c' out "
						"of range LCD mode\n", f);
				else {
					features->lcd_index = li;
				}
			}
			features->done |= FEATURE_SCREEN;
			break;
		}
	}
}

static void __init mini6410_machine_init(void)
{
	u32 cs1;
	struct mini6410_features_t features = { 0 };

	printk(KERN_INFO "MINI6410: Option string mini6410=%s\n",
			mini6410_features_str);

	/* Parse the feature string */
	mini6410_parse_features(&features, mini6410_features_str);

	printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n",
		mini6410_lcd_pdata[features.lcd_index].win[0]->xres,
		mini6410_lcd_pdata[features.lcd_index].win[0]->yres);

	s3c_nand_set_platdata(&mini6410_nand_info);
	s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
	s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata);
	s3c24xx_ts_set_platdata(NULL);

	/* configure nCS1 width to 16 bits */

	cs1 = __raw_readl(S3C64XX_SROM_BW) &
		~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
	cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
		(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
		(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
			S3C64XX_SROM_BW__NCS1__SHIFT;
	__raw_writel(cs1, S3C64XX_SROM_BW);

	/* set timing for nCS1 suitable for ethernet chip */

	__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
		(6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
		(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
		(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
		(13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
		(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
		(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);

	gpio_request(S3C64XX_GPF(15), "LCD power");
	gpio_request(S3C64XX_GPE(0), "LCD power");

	platform_add_devices(mini6410_devices, ARRAY_SIZE(mini6410_devices));
}

MACHINE_START(MINI6410, "MINI6410")
	/* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
	.atag_offset	= 0x100,
	.init_irq	= s3c6410_init_irq,
	.map_io		= mini6410_map_io,
	.init_machine	= mini6410_machine_init,
	.init_time	= samsung_timer_init,
	.restart	= s3c64xx_restart,
MACHINE_END
Commit	Line	Data
e9debd98 DA	1	/* linux/arch/arm/mach-s3c64xx/mach-mini6410.c
	2	*
	3	* Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
	4	* Copyright 2008 Openmoko, Inc.
	5	* Copyright 2008 Simtec Electronics
	6	* Ben Dooks <ben@simtec.co.uk>
	7	* http://armlinux.simtec.co.uk/
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*
	13	*/
	14
	15	#include <linux/init.h>
	16	#include <linux/interrupt.h>
2abca87c	17	#include <linux/fb.h>
e9debd98 DA	18	#include <linux/gpio.h>
	19	#include <linux/kernel.h>
	20	#include <linux/list.h>
	21	#include <linux/dm9000.h>
1c5d76ef DA	22	#include <linux/mtd/mtd.h>
1c5d76ef DA	23	#include <linux/mtd/partitions.h>
e9debd98	24	#include <linux/serial_core.h>
334a1c70	25	#include <linux/serial_s3c.h>
e9debd98 DA	26	#include <linux/types.h>
	27
	28	#include <asm/mach-types.h>
	29	#include <asm/mach/arch.h>
	30	#include <asm/mach/map.h>
	31
	32	#include <mach/map.h>
	33	#include <mach/regs-gpio.h>
b0161caa	34	#include <mach/gpio-samsung.h>
e9debd98	35
fe894f97	36	#include <plat/adc.h>
e9debd98 DA	37	#include <plat/cpu.h>
e9debd98 DA	38	#include <plat/devs.h>
2abca87c	39	#include <plat/fb.h>
436d42c6	40	#include <linux/platform_data/mtd-nand-s3c2410.h>
be4f668f	41	#include <linux/platform_data/mmc-sdhci-s3c.h>
be4f668f	42	#include <plat/sdhci.h>
436d42c6	43	#include <linux/platform_data/touchscreen-s3c2410.h>
fe894f97	44
bbd7ac63	45	#include <video/platform_lcd.h>
5a213a55	46	#include <video/samsung_fimd.h>
04a49b71	47	#include <plat/samsung-time.h>
e9debd98	48
b024043b	49	#include "common.h"
a81c1970	50	#include "regs-modem.h"
8eba8ea2	51	#include "regs-srom.h"
b024043b	52
8b8c87de	53	#define UCON S3C2410_UCON_DEFAULT
e9debd98 DA	54	#define ULCON (S3C2410_LCON_CS8 \| S3C2410_LCON_PNONE \| S3C2410_LCON_STOPB)
	55	#define UFCON (S3C2410_UFCON_RXTRIG8 \| S3C2410_UFCON_FIFOMODE)
	56
	57	static struct s3c2410_uartcfg mini6410_uartcfgs[] __initdata = {
	58	[0] = {
	59	.hwport = 0,
	60	.flags = 0,
	61	.ucon = UCON,
	62	.ulcon = ULCON,
	63	.ufcon = UFCON,
	64	},
	65	[1] = {
	66	.hwport = 1,
	67	.flags = 0,
	68	.ucon = UCON,
	69	.ulcon = ULCON,
	70	.ufcon = UFCON,
	71	},
	72	[2] = {
	73	.hwport = 2,
	74	.flags = 0,
	75	.ucon = UCON,
	76	.ulcon = ULCON,
	77	.ufcon = UFCON,
	78	},
	79	[3] = {
	80	.hwport = 3,
	81	.flags = 0,
	82	.ucon = UCON,
	83	.ulcon = ULCON,
	84	.ufcon = UFCON,
	85	},
	86	};
	87
	88	/* DM9000AEP 10/100 ethernet controller */
	89
	90	static struct resource mini6410_dm9k_resource[] = {
bc4521d3 TB	91	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
	92	[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
	93	[2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
	94	\| IORESOURCE_IRQ_HIGHLEVEL),
e9debd98 DA	95	};
	96
	97	static struct dm9000_plat_data mini6410_dm9k_pdata = {
	98	.flags = (DM9000_PLATF_16BITONLY \| DM9000_PLATF_NO_EEPROM),
	99	};
	100
	101	static struct platform_device mini6410_device_eth = {
	102	.name = "dm9000",
	103	.id = -1,
	104	.num_resources = ARRAY_SIZE(mini6410_dm9k_resource),
	105	.resource = mini6410_dm9k_resource,
	106	.dev = {
	107	.platform_data = &mini6410_dm9k_pdata,
	108	},
	109	};
	110
1c5d76ef DA	111	static struct mtd_partition mini6410_nand_part[] = {
	112	[0] = {
	113	.name = "uboot",
	114	.size = SZ_1M,
	115	.offset = 0,
	116	},
	117	[1] = {
	118	.name = "kernel",
	119	.size = SZ_2M,
	120	.offset = SZ_1M,
	121	},
	122	[2] = {
	123	.name = "rootfs",
	124	.size = MTDPART_SIZ_FULL,
	125	.offset = SZ_1M + SZ_2M,
	126	},
	127	};
	128
	129	static struct s3c2410_nand_set mini6410_nand_sets[] = {
	130	[0] = {
	131	.name = "nand",
	132	.nr_chips = 1,
	133	.nr_partitions = ARRAY_SIZE(mini6410_nand_part),
	134	.partitions = mini6410_nand_part,
	135	},
	136	};
	137
	138	static struct s3c2410_platform_nand mini6410_nand_info = {
	139	.tacls = 25,
	140	.twrph0 = 55,
	141	.twrph1 = 40,
	142	.nr_sets = ARRAY_SIZE(mini6410_nand_sets),
	143	.sets = mini6410_nand_sets,
	144	};
	145
884924be	146	static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {
884924be TA	147	.max_bpp = 32,
884924be TA	148	.default_bpp = 16,
79d3c41a TA	149	.xres = 480,
	150	.yres = 272,
	151	};
	152
	153	static struct fb_videomode mini6410_lcd_type0_timing = {
	154	/* 4.3" 480x272 */
	155	.left_margin = 3,
	156	.right_margin = 2,
	157	.upper_margin = 1,
	158	.lower_margin = 1,
	159	.hsync_len = 40,
	160	.vsync_len = 1,
	161	.xres = 480,
	162	.yres = 272,
2abca87c DA	163	};
2abca87c DA	164
884924be	165	static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win = {
884924be TA	166	.max_bpp = 32,
884924be TA	167	.default_bpp = 16,
79d3c41a TA	168	.xres = 800,
	169	.yres = 480,
	170	};
	171
	172	static struct fb_videomode mini6410_lcd_type1_timing = {
	173	/* 7.0" 800x480 */
	174	.left_margin = 8,
	175	.right_margin = 13,
	176	.upper_margin = 7,
	177	.lower_margin = 5,
	178	.hsync_len = 3,
	179	.vsync_len = 1,
	180	.xres = 800,
	181	.yres = 480,
884924be TA	182	};
	183
	184	static struct s3c_fb_platdata mini6410_lcd_pdata[] __initdata = {
2abca87c	185	{
884924be	186	.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
79d3c41a	187	.vtiming = &mini6410_lcd_type0_timing,
884924be TA	188	.win[0] = &mini6410_lcd_type0_fb_win,
	189	.vidcon0 = VIDCON0_VIDOUT_RGB \| VIDCON0_PNRMODE_RGB,
	190	.vidcon1 = VIDCON1_INV_HSYNC \| VIDCON1_INV_VSYNC,
2abca87c	191	}, {
884924be	192	.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
79d3c41a	193	.vtiming = &mini6410_lcd_type1_timing,
884924be TA	194	.win[0] = &mini6410_lcd_type1_fb_win,
	195	.vidcon0 = VIDCON0_VIDOUT_RGB \| VIDCON0_PNRMODE_RGB,
	196	.vidcon1 = VIDCON1_INV_HSYNC \| VIDCON1_INV_VSYNC,
2abca87c	197	},
884924be	198	{ },
2abca87c DA	199	};
2abca87c DA	200
bbd7ac63 DA	201	static void mini6410_lcd_power_set(struct plat_lcd_data *pd,
	202	unsigned int power)
	203	{
	204	if (power)
	205	gpio_direction_output(S3C64XX_GPE(0), 1);
	206	else
	207	gpio_direction_output(S3C64XX_GPE(0), 0);
	208	}
	209
	210	static struct plat_lcd_data mini6410_lcd_power_data = {
	211	.set_power = mini6410_lcd_power_set,
	212	};
	213
	214	static struct platform_device mini6410_lcd_powerdev = {
	215	.name = "platform-lcd",
	216	.dev.parent = &s3c_device_fb.dev,
	217	.dev.platform_data = &mini6410_lcd_power_data,
	218	};
	219
be4f668f TF	220	static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata = {
	221	.max_width = 4,
	222	.cd_type = S3C_SDHCI_CD_GPIO,
	223	.ext_cd_gpio = S3C64XX_GPN(10),
	224	.ext_cd_gpio_invert = true,
	225	};
	226
e9debd98 DA	227	static struct platform_device *mini6410_devices[] __initdata = {
	228	&mini6410_device_eth,
	229	&s3c_device_hsmmc0,
	230	&s3c_device_hsmmc1,
	231	&s3c_device_ohci,
1c5d76ef	232	&s3c_device_nand,
2abca87c	233	&s3c_device_fb,
bbd7ac63	234	&mini6410_lcd_powerdev,
fe894f97 DA	235	&s3c_device_adc,
fe894f97 DA	236	&s3c_device_ts,
e9debd98 DA	237	};
	238
	239	static void __init mini6410_map_io(void)
	240	{
2abca87c DA	241	u32 tmp;
2abca87c DA	242
e9debd98	243	s3c64xx_init_io(NULL, 0);
b69f460d	244	s3c64xx_set_xtal_freq(12000000);
e9debd98	245	s3c24xx_init_uarts(mini6410_uartcfgs, ARRAY_SIZE(mini6410_uartcfgs));
04a49b71	246	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
2abca87c DA	247
	248	/* set the LCD type */
	249	tmp = __raw_readl(S3C64XX_SPCON);
	250	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
	251	tmp \|= S3C64XX_SPCON_LCD_SEL_RGB;
	252	__raw_writel(tmp, S3C64XX_SPCON);
	253
	254	/* remove the LCD bypass */
	255	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
	256	tmp &= ~MIFPCON_LCD_BYPASS;
	257	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
	258	}
	259
	260	/*
	261	* mini6410_features string
	262	*
	263	* 0-9 LCD configuration
	264	*
	265	*/
	266	static char mini6410_features_str[12] __initdata = "0";
	267
	268	static int __init mini6410_features_setup(char *str)
	269	{
	270	if (str)
	271	strlcpy(mini6410_features_str, str,
	272	sizeof(mini6410_features_str));
	273	return 1;
	274	}
	275
	276	__setup("mini6410=", mini6410_features_setup);
	277
	278	#define FEATURE_SCREEN (1 << 0)
	279
	280	struct mini6410_features_t {
	281	int done;
	282	int lcd_index;
	283	};
	284
	285	static void mini6410_parse_features(
	286	struct mini6410_features_t *features,
	287	const char *features_str)
	288	{
	289	const char *fp = features_str;
	290
	291	features->done = 0;
	292	features->lcd_index = 0;
	293
	294	while (*fp) {
	295	char f = *fp++;
	296
	297	switch (f) {
	298	case '0'...'9': /* tft screen */
	299	if (features->done & FEATURE_SCREEN) {
	300	printk(KERN_INFO "MINI6410: '%c' ignored, "
	301	"screen type already set\n", f);
	302	} else {
	303	int li = f - '0';
884924be	304	if (li >= ARRAY_SIZE(mini6410_lcd_pdata))
2abca87c DA	305	printk(KERN_INFO "MINI6410: '%c' out "
	306	"of range LCD mode\n", f);
	307	else {
	308	features->lcd_index = li;
	309	}
	310	}
	311	features->done \|= FEATURE_SCREEN;
	312	break;
	313	}
	314	}
e9debd98 DA	315	}
	316
	317	static void __init mini6410_machine_init(void)
	318	{
	319	u32 cs1;
2abca87c DA	320	struct mini6410_features_t features = { 0 };
	321
	322	printk(KERN_INFO "MINI6410: Option string mini6410=%s\n",
	323	mini6410_features_str);
	324
	325	/* Parse the feature string */
	326	mini6410_parse_features(&features, mini6410_features_str);
	327
2abca87c	328	printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n",
79d3c41a TA	329	mini6410_lcd_pdata[features.lcd_index].win[0]->xres,
79d3c41a TA	330	mini6410_lcd_pdata[features.lcd_index].win[0]->yres);
e9debd98	331
1c5d76ef	332	s3c_nand_set_platdata(&mini6410_nand_info);
884924be	333	s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
be4f668f	334	s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata);
0804765a	335	s3c24xx_ts_set_platdata(NULL);
1c5d76ef	336
e9debd98 DA	337	/* configure nCS1 width to 16 bits */
	338
	339	cs1 = __raw_readl(S3C64XX_SROM_BW) &
	340	~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
	341	cs1 \|= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) \|
	342	(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) \|
	343	(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
	344	S3C64XX_SROM_BW__NCS1__SHIFT;
	345	__raw_writel(cs1, S3C64XX_SROM_BW);
	346
	347	/* set timing for nCS1 suitable for ethernet chip */
	348
	349	__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) \|
	350	(6 << S3C64XX_SROM_BCX__TACP__SHIFT) \|
	351	(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) \|
	352	(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) \|
	353	(13 << S3C64XX_SROM_BCX__TACC__SHIFT) \|
	354	(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) \|
	355	(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
	356
2abca87c DA	357	gpio_request(S3C64XX_GPF(15), "LCD power");
	358	gpio_request(S3C64XX_GPE(0), "LCD power");
	359
e9debd98 DA	360	platform_add_devices(mini6410_devices, ARRAY_SIZE(mini6410_devices));
	361	}
	362
	363	MACHINE_START(MINI6410, "MINI6410")
	364	/* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
170a5908	365	.atag_offset = 0x100,
e9debd98 DA	366	.init_irq = s3c6410_init_irq,
	367	.map_io = mini6410_map_io,
	368	.init_machine = mini6410_machine_init,
04a49b71	369	.init_time = samsung_timer_init,
ff84ded2	370	.restart = s3c64xx_restart,
e9debd98	371	MACHINE_END