[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-smdk6410.c

/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
 *
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2008 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
*/

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/input.h>
#include <linux/serial_core.h>
#include <linux/serial_s3c.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/fb.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/smsc911x.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/pwm_backlight.h>
#include <linux/platform_data/s3c-hsotg.h>

#ifdef CONFIG_SMDK6410_WM1190_EV1
#include <linux/mfd/wm8350/core.h>
#include <linux/mfd/wm8350/pmic.h>
#endif

#ifdef CONFIG_SMDK6410_WM1192_EV1
#include <linux/mfd/wm831x/core.h>
#include <linux/mfd/wm831x/pdata.h>
#endif

#include <video/platform_lcd.h>
#include <video/samsung_fimd.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <mach/hardware.h>
#include <mach/map.h>

#include <asm/irq.h>
#include <asm/mach-types.h>

#include <mach/regs-gpio.h>
#include <mach/gpio-samsung.h>
#include <linux/platform_data/ata-samsung_cf.h>
#include <linux/platform_data/i2c-s3c2410.h>
#include <plat/fb.h>
#include <plat/gpio-cfg.h>

#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/adc.h>
#include <linux/platform_data/touchscreen-s3c2410.h>
#include <plat/keypad.h>
#include <plat/backlight.h>
#include <plat/samsung-time.h>

#include "common.h"
#include "regs-modem.h"
#include "regs-srom.h"
#include "regs-sys.h"

#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE

static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
	[0] = {
		.hwport	     = 0,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
	[1] = {
		.hwport	     = 1,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
	[2] = {
		.hwport	     = 2,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
	[3] = {
		.hwport	     = 3,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
};

/* framebuffer and LCD setup. */

/* GPF15 = LCD backlight control
 * GPF13 => Panel power
 * GPN5 = LCD nRESET signal
 * PWM_TOUT1 => backlight brightness
 */

static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
				   unsigned int power)
{
	if (power) {
		gpio_direction_output(S3C64XX_GPF(13), 1);

		/* fire nRESET on power up */
		gpio_direction_output(S3C64XX_GPN(5), 0);
		msleep(10);
		gpio_direction_output(S3C64XX_GPN(5), 1);
		msleep(1);
	} else {
		gpio_direction_output(S3C64XX_GPF(13), 0);
	}
}

static struct plat_lcd_data smdk6410_lcd_power_data = {
	.set_power	= smdk6410_lcd_power_set,
};

static struct platform_device smdk6410_lcd_powerdev = {
	.name			= "platform-lcd",
	.dev.parent		= &s3c_device_fb.dev,
	.dev.platform_data	= &smdk6410_lcd_power_data,
};

static struct s3c_fb_pd_win smdk6410_fb_win0 = {
	.max_bpp	= 32,
	.default_bpp	= 16,
	.xres		= 800,
	.yres		= 480,
	.virtual_y	= 480 * 2,
	.virtual_x	= 800,
};

static struct fb_videomode smdk6410_lcd_timing = {
	.left_margin	= 8,
	.right_margin	= 13,
	.upper_margin	= 7,
	.lower_margin	= 5,
	.hsync_len	= 3,
	.vsync_len	= 1,
	.xres		= 800,
	.yres		= 480,
};

/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
	.vtiming	= &smdk6410_lcd_timing,
	.win[0]		= &smdk6410_fb_win0,
	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
};

/*
 * Configuring Ethernet on SMDK6410
 *
 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
 * The constant address below corresponds to nCS1
 *
 *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
 *  2) CFG6 needs to be switched to "LAN9115" side
 */

static struct resource smdk6410_smsc911x_resources[] = {
	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K),
	[1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \
					| IRQ_TYPE_LEVEL_LOW),
};

static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
	.irq_polarity  = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type      = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	.flags         = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
	.phy_interface = PHY_INTERFACE_MODE_MII,
};


static struct platform_device smdk6410_smsc911x = {
	.name          = "smsc911x",
	.id            = -1,
	.num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
	.resource      = &smdk6410_smsc911x_resources[0],
	.dev = {
		.platform_data = &smdk6410_smsc911x_pdata,
	},
};

#ifdef CONFIG_REGULATOR
static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = {
	REGULATOR_SUPPLY("PVDD", "0-001b"),
	REGULATOR_SUPPLY("AVDD", "0-001b"),
};

static struct regulator_init_data smdk6410_b_pwr_5v_data = {
	.constraints = {
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
	.consumer_supplies = smdk6410_b_pwr_5v_consumers,
};

static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
	.supply_name = "B_PWR_5V",
	.microvolts = 5000000,
	.init_data = &smdk6410_b_pwr_5v_data,
	.gpio = -EINVAL,
};

static struct platform_device smdk6410_b_pwr_5v = {
	.name          = "reg-fixed-voltage",
	.id            = -1,
	.dev = {
		.platform_data = &smdk6410_b_pwr_5v_pdata,
	},
};
#endif

static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
	.setup_gpio	= s3c64xx_ide_setup_gpio,
};

static uint32_t smdk6410_keymap[] __initdata = {
	/* KEY(row, col, keycode) */
	KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
	KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
	KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
	KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
};

static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
	.keymap		= smdk6410_keymap,
	.keymap_size	= ARRAY_SIZE(smdk6410_keymap),
};

static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
	.keymap_data	= &smdk6410_keymap_data,
	.rows		= 2,
	.cols		= 8,
};

static struct map_desc smdk6410_iodesc[] = {};

static struct platform_device *smdk6410_devices[] __initdata = {
#ifdef CONFIG_SMDK6410_SD_CH0
	&s3c_device_hsmmc0,
#endif
#ifdef CONFIG_SMDK6410_SD_CH1
	&s3c_device_hsmmc1,
#endif
	&s3c_device_i2c0,
	&s3c_device_i2c1,
	&s3c_device_fb,
	&s3c_device_ohci,
	&samsung_device_pwm,
	&s3c_device_usb_hsotg,
	&s3c64xx_device_iisv4,
	&samsung_device_keypad,

#ifdef CONFIG_REGULATOR
	&smdk6410_b_pwr_5v,
#endif
	&smdk6410_lcd_powerdev,

	&smdk6410_smsc911x,
	&s3c_device_adc,
	&s3c_device_cfcon,
	&s3c_device_rtc,
	&s3c_device_ts,
	&s3c_device_wdt,
};

#ifdef CONFIG_REGULATOR
/* ARM core */
static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
	REGULATOR_SUPPLY("vddarm", NULL),
};

/* VDDARM, BUCK1 on J5 */
static struct regulator_init_data smdk6410_vddarm = {
	.constraints = {
		.name = "PVDD_ARM",
		.min_uV = 1000000,
		.max_uV = 1300000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
	.num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
	.consumer_supplies = smdk6410_vddarm_consumers,
};

/* VDD_INT, BUCK2 on J5 */
static struct regulator_init_data smdk6410_vddint = {
	.constraints = {
		.name = "PVDD_INT",
		.min_uV = 1000000,
		.max_uV = 1200000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
};

/* VDD_HI, LDO3 on J5 */
static struct regulator_init_data smdk6410_vddhi = {
	.constraints = {
		.name = "PVDD_HI",
		.always_on = 1,
	},
};

/* VDD_PLL, LDO2 on J5 */
static struct regulator_init_data smdk6410_vddpll = {
	.constraints = {
		.name = "PVDD_PLL",
		.always_on = 1,
	},
};

/* VDD_UH_MMC, LDO5 on J5 */
static struct regulator_init_data smdk6410_vdduh_mmc = {
	.constraints = {
		.name = "PVDD_UH+PVDD_MMC",
		.always_on = 1,
	},
};

/* VCCM3BT, LDO8 on J5 */
static struct regulator_init_data smdk6410_vccmc3bt = {
	.constraints = {
		.name = "PVCCM3BT",
		.always_on = 1,
	},
};

/* VCCM2MTV, LDO11 on J5 */
static struct regulator_init_data smdk6410_vccm2mtv = {
	.constraints = {
		.name = "PVCCM2MTV",
		.always_on = 1,
	},
};

/* VDD_LCD, LDO12 on J5 */
static struct regulator_init_data smdk6410_vddlcd = {
	.constraints = {
		.name = "PVDD_LCD",
		.always_on = 1,
	},
};

/* VDD_OTGI, LDO9 on J5 */
static struct regulator_init_data smdk6410_vddotgi = {
	.constraints = {
		.name = "PVDD_OTGI",
		.always_on = 1,
	},
};

/* VDD_OTG, LDO14 on J5 */
static struct regulator_init_data smdk6410_vddotg = {
	.constraints = {
		.name = "PVDD_OTG",
		.always_on = 1,
	},
};

/* VDD_ALIVE, LDO15 on J5 */
static struct regulator_init_data smdk6410_vddalive = {
	.constraints = {
		.name = "PVDD_ALIVE",
		.always_on = 1,
	},
};

/* VDD_AUDIO, VLDO_AUDIO on J5 */
static struct regulator_init_data smdk6410_vddaudio = {
	.constraints = {
		.name = "PVDD_AUDIO",
		.always_on = 1,
	},
};
#endif

#ifdef CONFIG_SMDK6410_WM1190_EV1
/* S3C64xx internal logic & PLL */
static struct regulator_init_data wm8350_dcdc1_data = {
	.constraints = {
		.name = "PVDD_INT+PVDD_PLL",
		.min_uV = 1200000,
		.max_uV = 1200000,
		.always_on = 1,
		.apply_uV = 1,
	},
};

/* Memory */
static struct regulator_init_data wm8350_dcdc3_data = {
	.constraints = {
		.name = "PVDD_MEM",
		.min_uV = 1800000,
		.max_uV = 1800000,
		.always_on = 1,
		.state_mem = {
			 .uV = 1800000,
			 .mode = REGULATOR_MODE_NORMAL,
			 .enabled = 1,
		},
		.initial_state = PM_SUSPEND_MEM,
	},
};

/* USB, EXT, PCM, ADC/DAC, USB, MMC */
static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
	REGULATOR_SUPPLY("DVDD", "0-001b"),
};

static struct regulator_init_data wm8350_dcdc4_data = {
	.constraints = {
		.name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
		.min_uV = 3000000,
		.max_uV = 3000000,
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
	.consumer_supplies = wm8350_dcdc4_consumers,
};

/* OTGi/1190-EV1 HPVDD & AVDD */
static struct regulator_init_data wm8350_ldo4_data = {
	.constraints = {
		.name = "PVDD_OTGI+HPVDD+AVDD",
		.min_uV = 1200000,
		.max_uV = 1200000,
		.apply_uV = 1,
		.always_on = 1,
	},
};

static struct {
	int regulator;
	struct regulator_init_data *initdata;
} wm1190_regulators[] = {
	{ WM8350_DCDC_1, &wm8350_dcdc1_data },
	{ WM8350_DCDC_3, &wm8350_dcdc3_data },
	{ WM8350_DCDC_4, &wm8350_dcdc4_data },
	{ WM8350_DCDC_6, &smdk6410_vddarm },
	{ WM8350_LDO_1, &smdk6410_vddalive },
	{ WM8350_LDO_2, &smdk6410_vddotg },
	{ WM8350_LDO_3, &smdk6410_vddlcd },
	{ WM8350_LDO_4, &wm8350_ldo4_data },
};

static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
{
	int i;

	/* Configure the IRQ line */
	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);

	/* Instantiate the regulators */
	for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
		wm8350_register_regulator(wm8350,
					  wm1190_regulators[i].regulator,
					  wm1190_regulators[i].initdata);

	return 0;
}

static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
	.init = smdk6410_wm8350_init,
	.irq_high = 1,
	.irq_base = IRQ_BOARD_START,
};
#endif

#ifdef CONFIG_SMDK6410_WM1192_EV1
static struct gpio_led wm1192_pmic_leds[] = {
	{
		.name = "PMIC:red:power",
		.gpio = GPIO_BOARD_START + 3,
		.default_state = LEDS_GPIO_DEFSTATE_ON,
	},
};

static struct gpio_led_platform_data wm1192_pmic_led = {
	.num_leds = ARRAY_SIZE(wm1192_pmic_leds),
	.leds = wm1192_pmic_leds,
};

static struct platform_device wm1192_pmic_led_dev = {
	.name          = "leds-gpio",
	.id            = -1,
	.dev = {
		.platform_data = &wm1192_pmic_led,
	},
};

static int wm1192_pre_init(struct wm831x *wm831x)
{
	int ret;

	/* Configure the IRQ line */
	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);

	ret = platform_device_register(&wm1192_pmic_led_dev);
	if (ret != 0)
		dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);

	return 0;
}

static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
	.isink = 1,
	.max_uA = 27554,
};

static struct regulator_init_data wm1192_dcdc3 = {
	.constraints = {
		.name = "PVDD_MEM+PVDD_GPS",
		.always_on = 1,
	},
};

static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
	REGULATOR_SUPPLY("DVDD", "0-001b"),   /* WM8580 */
};

static struct regulator_init_data wm1192_ldo1 = {
	.constraints = {
		.name = "PVDD_LCD+PVDD_EXT",
		.always_on = 1,
	},
	.consumer_supplies = wm1192_ldo1_consumers,
	.num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
};

static struct wm831x_status_pdata wm1192_led7_pdata = {
	.name = "LED7:green:",
};

static struct wm831x_status_pdata wm1192_led8_pdata = {
	.name = "LED8:green:",
};

static struct wm831x_pdata smdk6410_wm1192_pdata = {
	.pre_init = wm1192_pre_init,

	.backlight = &wm1192_backlight_pdata,
	.dcdc = {
		&smdk6410_vddarm,  /* DCDC1 */
		&smdk6410_vddint,  /* DCDC2 */
		&wm1192_dcdc3,
	},
	.gpio_base = GPIO_BOARD_START,
	.ldo = {
		 &wm1192_ldo1,        /* LDO1 */
		 &smdk6410_vdduh_mmc, /* LDO2 */
		 NULL,                /* LDO3 NC */
		 &smdk6410_vddotgi,   /* LDO4 */
		 &smdk6410_vddotg,    /* LDO5 */
		 &smdk6410_vddhi,     /* LDO6 */
		 &smdk6410_vddaudio,  /* LDO7 */
		 &smdk6410_vccm2mtv,  /* LDO8 */
		 &smdk6410_vddpll,    /* LDO9 */
		 &smdk6410_vccmc3bt,  /* LDO10 */
		 &smdk6410_vddalive,  /* LDO11 */
	},
	.status = {
		&wm1192_led7_pdata,
		&wm1192_led8_pdata,
	},
};
#endif

static struct i2c_board_info i2c_devs0[] __initdata = {
	{ I2C_BOARD_INFO("24c08", 0x50), },
	{ I2C_BOARD_INFO("wm8580", 0x1b), },

#ifdef CONFIG_SMDK6410_WM1192_EV1
	{ I2C_BOARD_INFO("wm8312", 0x34),
	  .platform_data = &smdk6410_wm1192_pdata,
	  .irq = S3C_EINT(12),
	},
#endif

#ifdef CONFIG_SMDK6410_WM1190_EV1
	{ I2C_BOARD_INFO("wm8350", 0x1a),
	  .platform_data = &smdk6410_wm8350_pdata,
	  .irq = S3C_EINT(12),
	},
#endif
};

static struct i2c_board_info i2c_devs1[] __initdata = {
	{ I2C_BOARD_INFO("24c128", 0x57), },	/* Samsung S524AD0XD1 */
};

/* LCD Backlight data */
static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
	.no = S3C64XX_GPF(15),
	.func = S3C_GPIO_SFN(2),
};

static struct platform_pwm_backlight_data smdk6410_bl_data = {
	.pwm_id = 1,
	.enable_gpio = -1,
};

static struct s3c_hsotg_plat smdk6410_hsotg_pdata;

static void __init smdk6410_map_io(void)
{
	u32 tmp;

	s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
	s3c64xx_set_xtal_freq(12000000);
	s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);

	/* set the LCD type */

	tmp = __raw_readl(S3C64XX_SPCON);
	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
	tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
	__raw_writel(tmp, S3C64XX_SPCON);

	/* remove the lcd bypass */
	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
	tmp &= ~MIFPCON_LCD_BYPASS;
	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
}

static void __init smdk6410_machine_init(void)
{
	u32 cs1;

	s3c_i2c0_set_platdata(NULL);
	s3c_i2c1_set_platdata(NULL);
	s3c_fb_set_platdata(&smdk6410_lcd_pdata);
	s3c_hsotg_set_platdata(&smdk6410_hsotg_pdata);

	samsung_keypad_set_platdata(&smdk6410_keypad_data);

	s3c24xx_ts_set_platdata(NULL);

	/* configure nCS1 width to 16 bits */

	cs1 = __raw_readl(S3C64XX_SROM_BW) &
		    ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
	cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
		(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
		(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
						   S3C64XX_SROM_BW__NCS1__SHIFT;
	__raw_writel(cs1, S3C64XX_SROM_BW);

	/* set timing for nCS1 suitable for ethernet chip */

	__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
		     (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
		     (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
		     (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
		     (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
		     (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
		     (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);

	gpio_request(S3C64XX_GPN(5), "LCD power");
	gpio_request(S3C64XX_GPF(13), "LCD power");

	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));

	s3c_ide_set_platdata(&smdk6410_ide_pdata);

	platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));

	samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
}

MACHINE_START(SMDK6410, "SMDK6410")
	/* Maintainer: Ben Dooks <ben-linux@fluff.org> */
	.atag_offset	= 0x100,

	.init_irq	= s3c6410_init_irq,
	.map_io		= smdk6410_map_io,
	.init_machine	= smdk6410_machine_init,
	.init_time	= samsung_timer_init,
	.restart	= s3c64xx_restart,
MACHINE_END
Commit	Line	Data
431107ea	1	/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
5718df9d BD	2	*
	3	* Copyright 2008 Openmoko, Inc.
	4	* Copyright 2008 Simtec Electronics
	5	* Ben Dooks <ben@simtec.co.uk>
	6	* http://armlinux.simtec.co.uk/
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/types.h>
	16	#include <linux/interrupt.h>
	17	#include <linux/list.h>
	18	#include <linux/timer.h>
	19	#include <linux/init.h>
290d0983	20	#include <linux/input.h>
5718df9d	21	#include <linux/serial_core.h>
334a1c70	22	#include <linux/serial_s3c.h>
5718df9d BD	23	#include <linux/platform_device.h>
5718df9d BD	24	#include <linux/io.h>
096941ed	25	#include <linux/i2c.h>
a7a81d0b	26	#include <linux/leds.h>
438a5d42 BD	27	#include <linux/fb.h>
	28	#include <linux/gpio.h>
	29	#include <linux/delay.h>
3056ea0a	30	#include <linux/smsc911x.h>
42015c13	31	#include <linux/regulator/fixed.h>
628e7eb5	32	#include <linux/regulator/machine.h>
075d1089	33	#include <linux/pwm_backlight.h>
126625e1	34	#include <linux/platform_data/s3c-hsotg.h>
438a5d42	35
ecc558ac MB	36	#ifdef CONFIG_SMDK6410_WM1190_EV1
	37	#include <linux/mfd/wm8350/core.h>
	38	#include <linux/mfd/wm8350/pmic.h>
	39	#endif
438a5d42	40
60f9101a	41	#ifdef CONFIG_SMDK6410_WM1192_EV1
a7a81d0b	42	#include <linux/mfd/wm831x/core.h>
60f9101a MB	43	#include <linux/mfd/wm831x/pdata.h>
	44	#endif
	45
438a5d42	46	#include <video/platform_lcd.h>
5a213a55	47	#include <video/samsung_fimd.h>
5718df9d BD	48
	49	#include <asm/mach/arch.h>
	50	#include <asm/mach/map.h>
	51	#include <asm/mach/irq.h>
	52
	53	#include <mach/hardware.h>
	54	#include <mach/map.h>
	55
	56	#include <asm/irq.h>
	57	#include <asm/mach-types.h>
	58
3501c9ae	59	#include <mach/regs-gpio.h>
b0161caa	60	#include <mach/gpio-samsung.h>
436d42c6 AB	61	#include <linux/platform_data/ata-samsung_cf.h>
436d42c6 AB	62	#include <linux/platform_data/i2c-s3c2410.h>
438a5d42	63	#include <plat/fb.h>
3056ea0a	64	#include <plat/gpio-cfg.h>
5718df9d	65
5718df9d BD	66	#include <plat/devs.h>
5718df9d BD	67	#include <plat/cpu.h>
85b14a3f	68	#include <plat/adc.h>
436d42c6	69	#include <linux/platform_data/touchscreen-s3c2410.h>
290d0983	70	#include <plat/keypad.h>
96d78686	71	#include <plat/backlight.h>
04a49b71	72	#include <plat/samsung-time.h>
5718df9d	73
b024043b	74	#include "common.h"
a81c1970	75	#include "regs-modem.h"
8eba8ea2	76	#include "regs-srom.h"
f2bfd174	77	#include "regs-sys.h"
b024043b	78
5718df9d BD	79	#define UCON S3C2410_UCON_DEFAULT \| S3C2410_UCON_UCLK
	80	#define ULCON S3C2410_LCON_CS8 \| S3C2410_LCON_PNONE \| S3C2410_LCON_STOPB
	81	#define UFCON S3C2410_UFCON_RXTRIG8 \| S3C2410_UFCON_FIFOMODE
	82
	83	static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
	84	[0] = {
	85	.hwport = 0,
	86	.flags = 0,
bd258e52 MH	87	.ucon = UCON,
	88	.ulcon = ULCON,
	89	.ufcon = UFCON,
5718df9d BD	90	},
	91	[1] = {
	92	.hwport = 1,
	93	.flags = 0,
bd258e52 MH	94	.ucon = UCON,
	95	.ulcon = ULCON,
	96	.ufcon = UFCON,
	97	},
	98	[2] = {
	99	.hwport = 2,
	100	.flags = 0,
	101	.ucon = UCON,
	102	.ulcon = ULCON,
	103	.ufcon = UFCON,
	104	},
	105	[3] = {
	106	.hwport = 3,
	107	.flags = 0,
	108	.ucon = UCON,
	109	.ulcon = ULCON,
	110	.ufcon = UFCON,
5718df9d BD	111	},
	112	};
	113
438a5d42 BD	114	/* framebuffer and LCD setup. */
	115
	116	/* GPF15 = LCD backlight control
	117	* GPF13 => Panel power
	118	* GPN5 = LCD nRESET signal
	119	* PWM_TOUT1 => backlight brightness
	120	*/
	121
	122	static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
	123	unsigned int power)
	124	{
	125	if (power) {
	126	gpio_direction_output(S3C64XX_GPF(13), 1);
438a5d42 BD	127
	128	/* fire nRESET on power up */
	129	gpio_direction_output(S3C64XX_GPN(5), 0);
	130	msleep(10);
	131	gpio_direction_output(S3C64XX_GPN(5), 1);
	132	msleep(1);
	133	} else {
438a5d42 BD	134	gpio_direction_output(S3C64XX_GPF(13), 0);
	135	}
	136	}
	137
	138	static struct plat_lcd_data smdk6410_lcd_power_data = {
	139	.set_power = smdk6410_lcd_power_set,
	140	};
	141
	142	static struct platform_device smdk6410_lcd_powerdev = {
	143	.name = "platform-lcd",
	144	.dev.parent = &s3c_device_fb.dev,
	145	.dev.platform_data = &smdk6410_lcd_power_data,
	146	};
	147
	148	static struct s3c_fb_pd_win smdk6410_fb_win0 = {
438a5d42 BD	149	.max_bpp = 32,
438a5d42 BD	150	.default_bpp = 16,
79d3c41a TA	151	.xres = 800,
79d3c41a TA	152	.yres = 480,
001ca74f BD	153	.virtual_y = 480 * 2,
001ca74f BD	154	.virtual_x = 800,
438a5d42 BD	155	};
438a5d42 BD	156
79d3c41a TA	157	static struct fb_videomode smdk6410_lcd_timing = {
	158	.left_margin = 8,
	159	.right_margin = 13,
	160	.upper_margin = 7,
	161	.lower_margin = 5,
	162	.hsync_len = 3,
	163	.vsync_len = 1,
	164	.xres = 800,
	165	.yres = 480,
	166	};
	167
438a5d42 BD	168	/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
	169	static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
	170	.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
79d3c41a	171	.vtiming = &smdk6410_lcd_timing,
438a5d42 BD	172	.win[0] = &smdk6410_fb_win0,
	173	.vidcon0 = VIDCON0_VIDOUT_RGB \| VIDCON0_PNRMODE_RGB,
	174	.vidcon1 = VIDCON1_INV_HSYNC \| VIDCON1_INV_VSYNC,
	175	};
	176
a4e94694 AG	177	/*
	178	* Configuring Ethernet on SMDK6410
	179	*
	180	* Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
	181	* The constant address below corresponds to nCS1
	182	*
	183	* 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
	184	* 2) CFG6 needs to be switched to "LAN9115" side
	185	*/
	186
3056ea0a	187	static struct resource smdk6410_smsc911x_resources[] = {
c858fd5f TB	188	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K),
	189	[1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \
	190	\| IRQ_TYPE_LEVEL_LOW),
3056ea0a MB	191	};
	192
	193	static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
	194	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	195	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	196	.flags = SMSC911X_USE_32BIT \| SMSC911X_FORCE_INTERNAL_PHY,
	197	.phy_interface = PHY_INTERFACE_MODE_MII,
	198	};
	199
	200
	201	static struct platform_device smdk6410_smsc911x = {
	202	.name = "smsc911x",
	203	.id = -1,
	204	.num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
	205	.resource = &smdk6410_smsc911x_resources[0],
	206	.dev = {
	207	.platform_data = &smdk6410_smsc911x_pdata,
	208	},
	209	};
	210
42015c13	211	#ifdef CONFIG_REGULATOR
b5930b83 MB	212	static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = {
	213	REGULATOR_SUPPLY("PVDD", "0-001b"),
	214	REGULATOR_SUPPLY("AVDD", "0-001b"),
42015c13 MB	215	};
	216
	217	static struct regulator_init_data smdk6410_b_pwr_5v_data = {
	218	.constraints = {
	219	.always_on = 1,
	220	},
	221	.num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
	222	.consumer_supplies = smdk6410_b_pwr_5v_consumers,
	223	};
	224
	225	static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
	226	.supply_name = "B_PWR_5V",
	227	.microvolts = 5000000,
	228	.init_data = &smdk6410_b_pwr_5v_data,
d3cf4489	229	.gpio = -EINVAL,
42015c13 MB	230	};
	231
	232	static struct platform_device smdk6410_b_pwr_5v = {
	233	.name = "reg-fixed-voltage",
	234	.id = -1,
	235	.dev = {
	236	.platform_data = &smdk6410_b_pwr_5v_pdata,
	237	},
	238	};
	239	#endif
	240
0ab0b6d2 AK	241	static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
	242	.setup_gpio = s3c64xx_ide_setup_gpio,
	243	};
	244
290d0983 NKC	245	static uint32_t smdk6410_keymap[] __initdata = {
	246	/* KEY(row, col, keycode) */
	247	KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
	248	KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
	249	KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
	250	KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
	251	};
	252
	253	static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
	254	.keymap = smdk6410_keymap,
	255	.keymap_size = ARRAY_SIZE(smdk6410_keymap),
	256	};
	257
	258	static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
	259	.keymap_data = &smdk6410_keymap_data,
	260	.rows = 2,
	261	.cols = 8,
	262	};
	263
027191a8	264	static struct map_desc smdk6410_iodesc[] = {};
5718df9d BD	265
5718df9d BD	266	static struct platform_device *smdk6410_devices[] __initdata = {
b24636cf	267	#ifdef CONFIG_SMDK6410_SD_CH0
39057f23	268	&s3c_device_hsmmc0,
b24636cf BD	269	#endif
	270	#ifdef CONFIG_SMDK6410_SD_CH1
	271	&s3c_device_hsmmc1,
	272	#endif
d85fa24c	273	&s3c_device_i2c0,
d7ea3743	274	&s3c_device_i2c1,
438a5d42	275	&s3c_device_fb,
b813248c	276	&s3c_device_ohci,
7fa33bdb	277	&samsung_device_pwm,
06fa1d37	278	&s3c_device_usb_hsotg,
1f100868	279	&s3c64xx_device_iisv4,
290d0983	280	&samsung_device_keypad,
42015c13 MB	281
	282	#ifdef CONFIG_REGULATOR
	283	&smdk6410_b_pwr_5v,
	284	#endif
438a5d42	285	&smdk6410_lcd_powerdev,
3056ea0a MB	286
3056ea0a MB	287	&smdk6410_smsc911x,
85b14a3f	288	&s3c_device_adc,
0ab0b6d2	289	&s3c_device_cfcon,
9bbf4a63	290	&s3c_device_rtc,
85b14a3f	291	&s3c_device_ts,
b351c4a1	292	&s3c_device_wdt,
5718df9d BD	293	};
5718df9d BD	294
60f9101a MB	295	#ifdef CONFIG_REGULATOR
	296	/* ARM core */
	297	static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
b5930b83	298	REGULATOR_SUPPLY("vddarm", NULL),
60f9101a MB	299	};
	300
	301	/* VDDARM, BUCK1 on J5 */
	302	static struct regulator_init_data smdk6410_vddarm = {
ecc558ac	303	.constraints = {
60f9101a MB	304	.name = "PVDD_ARM",
	305	.min_uV = 1000000,
	306	.max_uV = 1300000,
	307	.always_on = 1,
	308	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	309	},
	310	.num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
	311	.consumer_supplies = smdk6410_vddarm_consumers,
	312	};
	313
	314	/* VDD_INT, BUCK2 on J5 */
	315	static struct regulator_init_data smdk6410_vddint = {
	316	.constraints = {
	317	.name = "PVDD_INT",
	318	.min_uV = 1000000,
ecc558ac MB	319	.max_uV = 1200000,
ecc558ac MB	320	.always_on = 1,
60f9101a	321	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
ecc558ac MB	322	},
	323	};
	324
60f9101a MB	325	/* VDD_HI, LDO3 on J5 */
60f9101a MB	326	static struct regulator_init_data smdk6410_vddhi = {
ecc558ac	327	.constraints = {
60f9101a	328	.name = "PVDD_HI",
ecc558ac	329	.always_on = 1,
ecc558ac MB	330	},
	331	};
	332
60f9101a MB	333	/* VDD_PLL, LDO2 on J5 */
	334	static struct regulator_init_data smdk6410_vddpll = {
	335	.constraints = {
	336	.name = "PVDD_PLL",
	337	.always_on = 1,
42015c13 MB	338	},
	339	};
	340
60f9101a MB	341	/* VDD_UH_MMC, LDO5 on J5 */
60f9101a MB	342	static struct regulator_init_data smdk6410_vdduh_mmc = {
ecc558ac	343	.constraints = {
18b52ca5	344	.name = "PVDD_UH+PVDD_MMC",
ecc558ac MB	345	.always_on = 1,
	346	},
	347	};
	348
60f9101a MB	349	/* VCCM3BT, LDO8 on J5 */
	350	static struct regulator_init_data smdk6410_vccmc3bt = {
	351	.constraints = {
	352	.name = "PVCCM3BT",
	353	.always_on = 1,
	354	},
e3980b6a MB	355	};
e3980b6a MB	356
60f9101a MB	357	/* VCCM2MTV, LDO11 on J5 */
60f9101a MB	358	static struct regulator_init_data smdk6410_vccm2mtv = {
ecc558ac	359	.constraints = {
60f9101a MB	360	.name = "PVCCM2MTV",
	361	.always_on = 1,
	362	},
	363	};
	364
	365	/* VDD_LCD, LDO12 on J5 */
	366	static struct regulator_init_data smdk6410_vddlcd = {
	367	.constraints = {
	368	.name = "PVDD_LCD",
	369	.always_on = 1,
	370	},
	371	};
	372
	373	/* VDD_OTGI, LDO9 on J5 */
	374	static struct regulator_init_data smdk6410_vddotgi = {
	375	.constraints = {
	376	.name = "PVDD_OTGI",
	377	.always_on = 1,
	378	},
	379	};
	380
	381	/* VDD_OTG, LDO14 on J5 */
	382	static struct regulator_init_data smdk6410_vddotg = {
	383	.constraints = {
	384	.name = "PVDD_OTG",
ecc558ac MB	385	.always_on = 1,
ecc558ac MB	386	},
5718df9d BD	387	};
5718df9d BD	388
60f9101a MB	389	/* VDD_ALIVE, LDO15 on J5 */
60f9101a MB	390	static struct regulator_init_data smdk6410_vddalive = {
ecc558ac MB	391	.constraints = {
ecc558ac MB	392	.name = "PVDD_ALIVE",
60f9101a MB	393	.always_on = 1,
	394	},
	395	};
	396
	397	/* VDD_AUDIO, VLDO_AUDIO on J5 */
	398	static struct regulator_init_data smdk6410_vddaudio = {
	399	.constraints = {
	400	.name = "PVDD_AUDIO",
	401	.always_on = 1,
	402	},
	403	};
	404	#endif
	405
	406	#ifdef CONFIG_SMDK6410_WM1190_EV1
	407	/* S3C64xx internal logic & PLL */
	408	static struct regulator_init_data wm8350_dcdc1_data = {
	409	.constraints = {
18b52ca5	410	.name = "PVDD_INT+PVDD_PLL",
ecc558ac MB	411	.min_uV = 1200000,
	412	.max_uV = 1200000,
	413	.always_on = 1,
	414	.apply_uV = 1,
	415	},
	416	};
	417
60f9101a MB	418	/* Memory */
60f9101a MB	419	static struct regulator_init_data wm8350_dcdc3_data = {
ecc558ac	420	.constraints = {
60f9101a MB	421	.name = "PVDD_MEM",
	422	.min_uV = 1800000,
	423	.max_uV = 1800000,
f53aee29	424	.always_on = 1,
60f9101a MB	425	.state_mem = {
	426	.uV = 1800000,
	427	.mode = REGULATOR_MODE_NORMAL,
	428	.enabled = 1,
	429	},
	430	.initial_state = PM_SUSPEND_MEM,
ecc558ac MB	431	},
	432	};
	433
60f9101a MB	434	/* USB, EXT, PCM, ADC/DAC, USB, MMC */
60f9101a MB	435	static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
b5930b83	436	REGULATOR_SUPPLY("DVDD", "0-001b"),
60f9101a MB	437	};
	438
	439	static struct regulator_init_data wm8350_dcdc4_data = {
ecc558ac	440	.constraints = {
18b52ca5	441	.name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
ecc558ac MB	442	.min_uV = 3000000,
ecc558ac MB	443	.max_uV = 3000000,
f53aee29	444	.always_on = 1,
ecc558ac	445	},
60f9101a MB	446	.num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
60f9101a MB	447	.consumer_supplies = wm8350_dcdc4_consumers,
ecc558ac MB	448	};
	449
	450	/* OTGi/1190-EV1 HPVDD & AVDD */
	451	static struct regulator_init_data wm8350_ldo4_data = {
	452	.constraints = {
18b52ca5	453	.name = "PVDD_OTGI+HPVDD+AVDD",
ecc558ac MB	454	.min_uV = 1200000,
	455	.max_uV = 1200000,
	456	.apply_uV = 1,
f53aee29	457	.always_on = 1,
ecc558ac MB	458	},
	459	};
	460
	461	static struct {
	462	int regulator;
	463	struct regulator_init_data *initdata;
	464	} wm1190_regulators[] = {
	465	{ WM8350_DCDC_1, &wm8350_dcdc1_data },
	466	{ WM8350_DCDC_3, &wm8350_dcdc3_data },
	467	{ WM8350_DCDC_4, &wm8350_dcdc4_data },
60f9101a MB	468	{ WM8350_DCDC_6, &smdk6410_vddarm },
	469	{ WM8350_LDO_1, &smdk6410_vddalive },
	470	{ WM8350_LDO_2, &smdk6410_vddotg },
	471	{ WM8350_LDO_3, &smdk6410_vddlcd },
ecc558ac MB	472	{ WM8350_LDO_4, &wm8350_ldo4_data },
	473	};
	474
	475	static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
	476	{
	477	int i;
	478
a3323b72 MB	479	/* Configure the IRQ line */
	480	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
	481
ecc558ac MB	482	/* Instantiate the regulators */
	483	for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
	484	wm8350_register_regulator(wm8350,
	485	wm1190_regulators[i].regulator,
	486	wm1190_regulators[i].initdata);
	487
	488	return 0;
	489	}
	490
	491	static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
	492	.init = smdk6410_wm8350_init,
db9256f3	493	.irq_high = 1,
9fca8786	494	.irq_base = IRQ_BOARD_START,
ecc558ac MB	495	};
	496	#endif
	497
60f9101a	498	#ifdef CONFIG_SMDK6410_WM1192_EV1
a7a81d0b MB	499	static struct gpio_led wm1192_pmic_leds[] = {
	500	{
	501	.name = "PMIC:red:power",
	502	.gpio = GPIO_BOARD_START + 3,
	503	.default_state = LEDS_GPIO_DEFSTATE_ON,
	504	},
	505	};
	506
	507	static struct gpio_led_platform_data wm1192_pmic_led = {
	508	.num_leds = ARRAY_SIZE(wm1192_pmic_leds),
	509	.leds = wm1192_pmic_leds,
	510	};
	511
	512	static struct platform_device wm1192_pmic_led_dev = {
	513	.name = "leds-gpio",
	514	.id = -1,
	515	.dev = {
	516	.platform_data = &wm1192_pmic_led,
	517	},
	518	};
	519
60f9101a MB	520	static int wm1192_pre_init(struct wm831x *wm831x)
60f9101a MB	521	{
a7a81d0b MB	522	int ret;
a7a81d0b MB	523
60f9101a MB	524	/* Configure the IRQ line */
	525	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
	526
a7a81d0b MB	527	ret = platform_device_register(&wm1192_pmic_led_dev);
	528	if (ret != 0)
	529	dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
	530
60f9101a MB	531	return 0;
	532	}
	533
	534	static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
	535	.isink = 1,
	536	.max_uA = 27554,
	537	};
	538
	539	static struct regulator_init_data wm1192_dcdc3 = {
	540	.constraints = {
18b52ca5	541	.name = "PVDD_MEM+PVDD_GPS",
60f9101a MB	542	.always_on = 1,
	543	},
	544	};
	545
	546	static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
b5930b83	547	REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */
60f9101a MB	548	};
	549
	550	static struct regulator_init_data wm1192_ldo1 = {
	551	.constraints = {
18b52ca5	552	.name = "PVDD_LCD+PVDD_EXT",
60f9101a MB	553	.always_on = 1,
	554	},
	555	.consumer_supplies = wm1192_ldo1_consumers,
	556	.num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
	557	};
	558
	559	static struct wm831x_status_pdata wm1192_led7_pdata = {
	560	.name = "LED7:green:",
	561	};
	562
	563	static struct wm831x_status_pdata wm1192_led8_pdata = {
	564	.name = "LED8:green:",
	565	};
	566
	567	static struct wm831x_pdata smdk6410_wm1192_pdata = {
	568	.pre_init = wm1192_pre_init,
60f9101a MB	569
	570	.backlight = &wm1192_backlight_pdata,
	571	.dcdc = {
	572	&smdk6410_vddarm, /* DCDC1 */
	573	&smdk6410_vddint, /* DCDC2 */
	574	&wm1192_dcdc3,
	575	},
a7a81d0b	576	.gpio_base = GPIO_BOARD_START,
60f9101a MB	577	.ldo = {
	578	&wm1192_ldo1, /* LDO1 */
	579	&smdk6410_vdduh_mmc, /* LDO2 */
	580	NULL, /* LDO3 NC */
	581	&smdk6410_vddotgi, /* LDO4 */
	582	&smdk6410_vddotg, /* LDO5 */
	583	&smdk6410_vddhi, /* LDO6 */
	584	&smdk6410_vddaudio, /* LDO7 */
	585	&smdk6410_vccm2mtv, /* LDO8 */
	586	&smdk6410_vddpll, /* LDO9 */
	587	&smdk6410_vccmc3bt, /* LDO10 */
	588	&smdk6410_vddalive, /* LDO11 */
	589	},
	590	.status = {
	591	&wm1192_led7_pdata,
	592	&wm1192_led8_pdata,
	593	},
	594	};
	595	#endif
	596
096941ed BD	597	static struct i2c_board_info i2c_devs0[] __initdata = {
096941ed BD	598	{ I2C_BOARD_INFO("24c08", 0x50), },
77897479	599	{ I2C_BOARD_INFO("wm8580", 0x1b), },
ecc558ac	600
60f9101a MB	601	#ifdef CONFIG_SMDK6410_WM1192_EV1
	602	{ I2C_BOARD_INFO("wm8312", 0x34),
	603	.platform_data = &smdk6410_wm1192_pdata,
	604	.irq = S3C_EINT(12),
	605	},
	606	#endif
	607
ecc558ac MB	608	#ifdef CONFIG_SMDK6410_WM1190_EV1
	609	{ I2C_BOARD_INFO("wm8350", 0x1a),
	610	.platform_data = &smdk6410_wm8350_pdata,
	611	.irq = S3C_EINT(12),
	612	},
	613	#endif
096941ed BD	614	};
	615
	616	static struct i2c_board_info i2c_devs1[] __initdata = {
	617	{ I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
5718df9d BD	618	};
5718df9d BD	619
96d78686 BG	620	/* LCD Backlight data */
	621	static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
	622	.no = S3C64XX_GPF(15),
	623	.func = S3C_GPIO_SFN(2),
	624	};
	625
	626	static struct platform_pwm_backlight_data smdk6410_bl_data = {
	627	.pwm_id = 1,
a63652f1	628	.enable_gpio = -1,
96d78686 BG	629	};
96d78686 BG	630
99f6e1f5 JS	631	static struct s3c_hsotg_plat smdk6410_hsotg_pdata;
99f6e1f5 JS	632
5718df9d BD	633	static void __init smdk6410_map_io(void)
5718df9d BD	634	{
d6662c35 BD	635	u32 tmp;
d6662c35 BD	636
5718df9d	637	s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
b69f460d	638	s3c64xx_set_xtal_freq(12000000);
5718df9d	639	s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
04a49b71	640	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
d6662c35 BD	641
	642	/* set the LCD type */
	643
	644	tmp = __raw_readl(S3C64XX_SPCON);
	645	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
	646	tmp \|= S3C64XX_SPCON_LCD_SEL_RGB;
	647	__raw_writel(tmp, S3C64XX_SPCON);
	648
	649	/* remove the lcd bypass */
	650	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
	651	tmp &= ~MIFPCON_LCD_BYPASS;
	652	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
5718df9d BD	653	}
	654
	655	static void __init smdk6410_machine_init(void)
	656	{
f01fdac0 AG	657	u32 cs1;
f01fdac0 AG	658
d85fa24c	659	s3c_i2c0_set_platdata(NULL);
d7ea3743	660	s3c_i2c1_set_platdata(NULL);
438a5d42	661	s3c_fb_set_platdata(&smdk6410_lcd_pdata);
99f6e1f5	662	s3c_hsotg_set_platdata(&smdk6410_hsotg_pdata);
096941ed	663
290d0983 NKC	664	samsung_keypad_set_platdata(&smdk6410_keypad_data);
290d0983 NKC	665
0804765a	666	s3c24xx_ts_set_platdata(NULL);
85b14a3f	667
f01fdac0 AG	668	/* configure nCS1 width to 16 bits */
	669
	670	cs1 = __raw_readl(S3C64XX_SROM_BW) &
	671	~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
	672	cs1 \|= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) \|
	673	(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) \|
	674	(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
	675	S3C64XX_SROM_BW__NCS1__SHIFT;
	676	__raw_writel(cs1, S3C64XX_SROM_BW);
	677
	678	/* set timing for nCS1 suitable for ethernet chip */
	679
	680	__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) \|
	681	(6 << S3C64XX_SROM_BCX__TACP__SHIFT) \|
	682	(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) \|
	683	(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) \|
	684	(0xe << S3C64XX_SROM_BCX__TACC__SHIFT) \|
	685	(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) \|
	686	(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
	687
b7f9a94b MB	688	gpio_request(S3C64XX_GPN(5), "LCD power");
b7f9a94b MB	689	gpio_request(S3C64XX_GPF(13), "LCD power");
b7f9a94b	690
096941ed BD	691	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
	692	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
	693
0ab0b6d2 AK	694	s3c_ide_set_platdata(&smdk6410_ide_pdata);
0ab0b6d2 AK	695
5718df9d	696	platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
7fa33bdb TF	697
7fa33bdb TF	698	samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
5718df9d BD	699	}
	700
	701	MACHINE_START(SMDK6410, "SMDK6410")
afdd225d	702	/* Maintainer: Ben Dooks <ben-linux@fluff.org> */
170a5908	703	.atag_offset = 0x100,
5718df9d BD	704
	705	.init_irq = s3c6410_init_irq,
	706	.map_io = smdk6410_map_io,
	707	.init_machine = smdk6410_machine_init,
04a49b71	708	.init_time = samsung_timer_init,
ff84ded2	709	.restart = s3c64xx_restart,
5718df9d	710	MACHINE_END