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[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-smdk6410.c
CommitLineData
431107ea 1/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
5718df9d
BD		 2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
290d0983 20#include <linux/input.h>
5718df9d 21#include <linux/serial_core.h>
334a1c70 22#include <linux/serial_s3c.h>
5718df9d
BD		 23#include <linux/platform_device.h>
24#include <linux/io.h>
096941ed 25#include <linux/i2c.h>
a7a81d0b 26#include <linux/leds.h>
438a5d42
BD		 27#include <linux/fb.h>
28#include <linux/gpio.h>
29#include <linux/delay.h>
3056ea0a 30#include <linux/smsc911x.h>
42015c13 31#include <linux/regulator/fixed.h>
628e7eb5 32#include <linux/regulator/machine.h>
075d1089 33#include <linux/pwm_backlight.h>
126625e1 34#include <linux/platform_data/s3c-hsotg.h>
438a5d42 35
ecc558ac
MB		 36#ifdef CONFIG_SMDK6410_WM1190_EV1
37#include <linux/mfd/wm8350/core.h>
38#include <linux/mfd/wm8350/pmic.h>
39#endif
438a5d42 40
60f9101a 41#ifdef CONFIG_SMDK6410_WM1192_EV1
a7a81d0b 42#include <linux/mfd/wm831x/core.h>
60f9101a
MB		 43#include <linux/mfd/wm831x/pdata.h>
44#endif
45
438a5d42 46#include <video/platform_lcd.h>
5a213a55 47#include <video/samsung_fimd.h>
5718df9d
BD		 48
49#include <asm/mach/arch.h>
50#include <asm/mach/map.h>
51#include <asm/mach/irq.h>
52
53#include <mach/hardware.h>
54#include <mach/map.h>
55
56#include <asm/irq.h>
57#include <asm/mach-types.h>
58
3501c9ae 59#include <mach/regs-gpio.h>
b0161caa 60#include <mach/gpio-samsung.h>
436d42c6
AB		 61#include <linux/platform_data/ata-samsung_cf.h>
62#include <linux/platform_data/i2c-s3c2410.h>
438a5d42 63#include <plat/fb.h>
3056ea0a 64#include <plat/gpio-cfg.h>
5718df9d 65
5718df9d
BD		 66#include <plat/clock.h>
67#include <plat/devs.h>
68#include <plat/cpu.h>
85b14a3f 69#include <plat/adc.h>
436d42c6 70#include <linux/platform_data/touchscreen-s3c2410.h>
290d0983 71#include <plat/keypad.h>
96d78686 72#include <plat/backlight.h>
04a49b71 73#include <plat/samsung-time.h>
5718df9d 74
b024043b 75#include "common.h"
a81c1970 76#include "regs-modem.h"
8eba8ea2 77#include "regs-srom.h"
f2bfd174 78#include "regs-sys.h"
b024043b 79
5718df9d
BD		 80#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
81#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
82#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
83
84static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
85 [0] = {
86 .hwport = 0,
87 .flags = 0,
bd258e52
MH		 88 .ucon = UCON,
89 .ulcon = ULCON,
90 .ufcon = UFCON,
5718df9d
BD		 91 },
92 [1] = {
93 .hwport = 1,
94 .flags = 0,
bd258e52
MH		 95 .ucon = UCON,
96 .ulcon = ULCON,
97 .ufcon = UFCON,
98 },
99 [2] = {
100 .hwport = 2,
101 .flags = 0,
102 .ucon = UCON,
103 .ulcon = ULCON,
104 .ufcon = UFCON,
105 },
106 [3] = {
107 .hwport = 3,
108 .flags = 0,
109 .ucon = UCON,
110 .ulcon = ULCON,
111 .ufcon = UFCON,
5718df9d
BD		 112 },
113};
114
438a5d42
BD		 115/* framebuffer and LCD setup. */
116
117/* GPF15 = LCD backlight control
118 * GPF13 => Panel power
119 * GPN5 = LCD nRESET signal
120 * PWM_TOUT1 => backlight brightness
121 */
122
123static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
124 unsigned int power)
125{
126 if (power) {
127 gpio_direction_output(S3C64XX_GPF(13), 1);
438a5d42
BD		 128
129 /* fire nRESET on power up */
130 gpio_direction_output(S3C64XX_GPN(5), 0);
131 msleep(10);
132 gpio_direction_output(S3C64XX_GPN(5), 1);
133 msleep(1);
134 } else {
438a5d42
BD		 135 gpio_direction_output(S3C64XX_GPF(13), 0);
136 }
137}
138
139static struct plat_lcd_data smdk6410_lcd_power_data = {
140 .set_power = smdk6410_lcd_power_set,
141};
142
143static struct platform_device smdk6410_lcd_powerdev = {
144 .name = "platform-lcd",
145 .dev.parent = &s3c_device_fb.dev,
146 .dev.platform_data = &smdk6410_lcd_power_data,
147};
148
149static struct s3c_fb_pd_win smdk6410_fb_win0 = {
438a5d42
BD		 150 .max_bpp = 32,
151 .default_bpp = 16,
79d3c41a
TA		 152 .xres = 800,
153 .yres = 480,
001ca74f
BD		 154 .virtual_y = 480 * 2,
155 .virtual_x = 800,
438a5d42
BD		 156};
157
79d3c41a
TA		 158static struct fb_videomode smdk6410_lcd_timing = {
159 .left_margin = 8,
160 .right_margin = 13,
161 .upper_margin = 7,
162 .lower_margin = 5,
163 .hsync_len = 3,
164 .vsync_len = 1,
165 .xres = 800,
166 .yres = 480,
167};
168
438a5d42
BD		 169/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
170static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
171 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
79d3c41a 172 .vtiming = &smdk6410_lcd_timing,
438a5d42
BD		 173 .win[0] = &smdk6410_fb_win0,
174 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
175 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
176};
177
a4e94694
AG		 178/*
179 * Configuring Ethernet on SMDK6410
180 *
181 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
182 * The constant address below corresponds to nCS1
183 *
184 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
185 * 2) CFG6 needs to be switched to "LAN9115" side
186 */
187
3056ea0a 188static struct resource smdk6410_smsc911x_resources[] = {
c858fd5f
TB		 189 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K),
190 [1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \
191 | IRQ_TYPE_LEVEL_LOW),
3056ea0a
MB		 192};
193
194static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
195 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
196 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
197 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
198 .phy_interface = PHY_INTERFACE_MODE_MII,
199};
200
201
202static struct platform_device smdk6410_smsc911x = {
203 .name = "smsc911x",
204 .id = -1,
205 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
206 .resource = &smdk6410_smsc911x_resources[0],
207 .dev = {
208 .platform_data = &smdk6410_smsc911x_pdata,
209 },
210};
211
42015c13 212#ifdef CONFIG_REGULATOR
b5930b83
MB		 213static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = {
214 REGULATOR_SUPPLY("PVDD", "0-001b"),
215 REGULATOR_SUPPLY("AVDD", "0-001b"),
42015c13
MB		 216};
217
218static struct regulator_init_data smdk6410_b_pwr_5v_data = {
219 .constraints = {
220 .always_on = 1,
221 },
222 .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
223 .consumer_supplies = smdk6410_b_pwr_5v_consumers,
224};
225
226static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
227 .supply_name = "B_PWR_5V",
228 .microvolts = 5000000,
229 .init_data = &smdk6410_b_pwr_5v_data,
d3cf4489 230 .gpio = -EINVAL,
42015c13
MB		 231};
232
233static struct platform_device smdk6410_b_pwr_5v = {
234 .name = "reg-fixed-voltage",
235 .id = -1,
236 .dev = {
237 .platform_data = &smdk6410_b_pwr_5v_pdata,
238 },
239};
240#endif
241
0ab0b6d2
AK		 242static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
243 .setup_gpio = s3c64xx_ide_setup_gpio,
244};
245
290d0983
NKC		 246static uint32_t smdk6410_keymap[] __initdata = {
247 /* KEY(row, col, keycode) */
248 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
249 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
250 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
251 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
252};
253
254static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
255 .keymap = smdk6410_keymap,
256 .keymap_size = ARRAY_SIZE(smdk6410_keymap),
257};
258
259static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
260 .keymap_data = &smdk6410_keymap_data,
261 .rows = 2,
262 .cols = 8,
263};
264
027191a8 265static struct map_desc smdk6410_iodesc[] = {};
5718df9d
BD		 266
267static struct platform_device *smdk6410_devices[] __initdata = {
b24636cf 268#ifdef CONFIG_SMDK6410_SD_CH0
39057f23 269 &s3c_device_hsmmc0,
b24636cf
BD		 270#endif
271#ifdef CONFIG_SMDK6410_SD_CH1
272 &s3c_device_hsmmc1,
273#endif
d85fa24c 274 &s3c_device_i2c0,
d7ea3743 275 &s3c_device_i2c1,
438a5d42 276 &s3c_device_fb,
b813248c 277 &s3c_device_ohci,
7fa33bdb 278 &samsung_device_pwm,
06fa1d37 279 &s3c_device_usb_hsotg,
1f100868 280 &s3c64xx_device_iisv4,
290d0983 281 &samsung_device_keypad,
42015c13
MB		 282
283#ifdef CONFIG_REGULATOR
284 &smdk6410_b_pwr_5v,
285#endif
438a5d42 286 &smdk6410_lcd_powerdev,
3056ea0a
MB		 287
288 &smdk6410_smsc911x,
85b14a3f 289 &s3c_device_adc,
0ab0b6d2 290 &s3c_device_cfcon,
9bbf4a63 291 &s3c_device_rtc,
85b14a3f 292 &s3c_device_ts,
b351c4a1 293 &s3c_device_wdt,
5718df9d
BD		 294};
295
60f9101a
MB		 296#ifdef CONFIG_REGULATOR
297/* ARM core */
298static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
b5930b83 299 REGULATOR_SUPPLY("vddarm", NULL),
60f9101a
MB		 300};
301
302/* VDDARM, BUCK1 on J5 */
303static struct regulator_init_data smdk6410_vddarm = {
ecc558ac 304 .constraints = {
60f9101a
MB		 305 .name = "PVDD_ARM",
306 .min_uV = 1000000,
307 .max_uV = 1300000,
308 .always_on = 1,
309 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
310 },
311 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
312 .consumer_supplies = smdk6410_vddarm_consumers,
313};
314
315/* VDD_INT, BUCK2 on J5 */
316static struct regulator_init_data smdk6410_vddint = {
317 .constraints = {
318 .name = "PVDD_INT",
319 .min_uV = 1000000,
ecc558ac
MB		 320 .max_uV = 1200000,
321 .always_on = 1,
60f9101a 322 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
ecc558ac
MB		 323 },
324};
325
60f9101a
MB		 326/* VDD_HI, LDO3 on J5 */
327static struct regulator_init_data smdk6410_vddhi = {
ecc558ac 328 .constraints = {
60f9101a 329 .name = "PVDD_HI",
ecc558ac 330 .always_on = 1,
ecc558ac
MB		 331 },
332};
333
60f9101a
MB		 334/* VDD_PLL, LDO2 on J5 */
335static struct regulator_init_data smdk6410_vddpll = {
336 .constraints = {
337 .name = "PVDD_PLL",
338 .always_on = 1,
42015c13
MB		 339 },
340};
341
60f9101a
MB		 342/* VDD_UH_MMC, LDO5 on J5 */
343static struct regulator_init_data smdk6410_vdduh_mmc = {
ecc558ac 344 .constraints = {
18b52ca5 345 .name = "PVDD_UH+PVDD_MMC",
ecc558ac
MB		 346 .always_on = 1,
347 },
348};
349
60f9101a
MB		 350/* VCCM3BT, LDO8 on J5 */
351static struct regulator_init_data smdk6410_vccmc3bt = {
352 .constraints = {
353 .name = "PVCCM3BT",
354 .always_on = 1,
355 },
e3980b6a
MB		 356};
357
60f9101a
MB		 358/* VCCM2MTV, LDO11 on J5 */
359static struct regulator_init_data smdk6410_vccm2mtv = {
ecc558ac 360 .constraints = {
60f9101a
MB		 361 .name = "PVCCM2MTV",
362 .always_on = 1,
363 },
364};
365
366/* VDD_LCD, LDO12 on J5 */
367static struct regulator_init_data smdk6410_vddlcd = {
368 .constraints = {
369 .name = "PVDD_LCD",
370 .always_on = 1,
371 },
372};
373
374/* VDD_OTGI, LDO9 on J5 */
375static struct regulator_init_data smdk6410_vddotgi = {
376 .constraints = {
377 .name = "PVDD_OTGI",
378 .always_on = 1,
379 },
380};
381
382/* VDD_OTG, LDO14 on J5 */
383static struct regulator_init_data smdk6410_vddotg = {
384 .constraints = {
385 .name = "PVDD_OTG",
ecc558ac
MB		 386 .always_on = 1,
387 },
5718df9d
BD		 388};
389
60f9101a
MB		 390/* VDD_ALIVE, LDO15 on J5 */
391static struct regulator_init_data smdk6410_vddalive = {
ecc558ac
MB		 392 .constraints = {
393 .name = "PVDD_ALIVE",
60f9101a
MB		 394 .always_on = 1,
395 },
396};
397
398/* VDD_AUDIO, VLDO_AUDIO on J5 */
399static struct regulator_init_data smdk6410_vddaudio = {
400 .constraints = {
401 .name = "PVDD_AUDIO",
402 .always_on = 1,
403 },
404};
405#endif
406
407#ifdef CONFIG_SMDK6410_WM1190_EV1
408/* S3C64xx internal logic & PLL */
409static struct regulator_init_data wm8350_dcdc1_data = {
410 .constraints = {
18b52ca5 411 .name = "PVDD_INT+PVDD_PLL",
ecc558ac
MB		 412 .min_uV = 1200000,
413 .max_uV = 1200000,
414 .always_on = 1,
415 .apply_uV = 1,
416 },
417};
418
60f9101a
MB		 419/* Memory */
420static struct regulator_init_data wm8350_dcdc3_data = {
ecc558ac 421 .constraints = {
60f9101a
MB		 422 .name = "PVDD_MEM",
423 .min_uV = 1800000,
424 .max_uV = 1800000,
f53aee29 425 .always_on = 1,
60f9101a
MB		 426 .state_mem = {
427 .uV = 1800000,
428 .mode = REGULATOR_MODE_NORMAL,
429 .enabled = 1,
430 },
431 .initial_state = PM_SUSPEND_MEM,
ecc558ac
MB		 432 },
433};
434
60f9101a
MB		 435/* USB, EXT, PCM, ADC/DAC, USB, MMC */
436static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
b5930b83 437 REGULATOR_SUPPLY("DVDD", "0-001b"),
60f9101a
MB		 438};
439
440static struct regulator_init_data wm8350_dcdc4_data = {
ecc558ac 441 .constraints = {
18b52ca5 442 .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
ecc558ac
MB		 443 .min_uV = 3000000,
444 .max_uV = 3000000,
f53aee29 445 .always_on = 1,
ecc558ac 446 },
60f9101a
MB		 447 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
448 .consumer_supplies = wm8350_dcdc4_consumers,
ecc558ac
MB		 449};
450
451/* OTGi/1190-EV1 HPVDD & AVDD */
452static struct regulator_init_data wm8350_ldo4_data = {
453 .constraints = {
18b52ca5 454 .name = "PVDD_OTGI+HPVDD+AVDD",
ecc558ac
MB		 455 .min_uV = 1200000,
456 .max_uV = 1200000,
457 .apply_uV = 1,
f53aee29 458 .always_on = 1,
ecc558ac
MB		 459 },
460};
461
462static struct {
463 int regulator;
464 struct regulator_init_data *initdata;
465} wm1190_regulators[] = {
466 { WM8350_DCDC_1, &wm8350_dcdc1_data },
467 { WM8350_DCDC_3, &wm8350_dcdc3_data },
468 { WM8350_DCDC_4, &wm8350_dcdc4_data },
60f9101a
MB		 469 { WM8350_DCDC_6, &smdk6410_vddarm },
470 { WM8350_LDO_1, &smdk6410_vddalive },
471 { WM8350_LDO_2, &smdk6410_vddotg },
472 { WM8350_LDO_3, &smdk6410_vddlcd },
ecc558ac
MB		 473 { WM8350_LDO_4, &wm8350_ldo4_data },
474};
475
476static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
477{
478 int i;
479
a3323b72
MB		 480 /* Configure the IRQ line */
481 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
482
ecc558ac
MB		 483 /* Instantiate the regulators */
484 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
485 wm8350_register_regulator(wm8350,
486 wm1190_regulators[i].regulator,
487 wm1190_regulators[i].initdata);
488
489 return 0;
490}
491
492static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
493 .init = smdk6410_wm8350_init,
db9256f3 494 .irq_high = 1,
9fca8786 495 .irq_base = IRQ_BOARD_START,
ecc558ac
MB		 496};
497#endif
498
60f9101a 499#ifdef CONFIG_SMDK6410_WM1192_EV1
a7a81d0b
MB		 500static struct gpio_led wm1192_pmic_leds[] = {
501 {
502 .name = "PMIC:red:power",
503 .gpio = GPIO_BOARD_START + 3,
504 .default_state = LEDS_GPIO_DEFSTATE_ON,
505 },
506};
507
508static struct gpio_led_platform_data wm1192_pmic_led = {
509 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
510 .leds = wm1192_pmic_leds,
511};
512
513static struct platform_device wm1192_pmic_led_dev = {
514 .name = "leds-gpio",
515 .id = -1,
516 .dev = {
517 .platform_data = &wm1192_pmic_led,
518 },
519};
520
60f9101a
MB		 521static int wm1192_pre_init(struct wm831x *wm831x)
522{
a7a81d0b
MB		 523 int ret;
524
60f9101a
MB		 525 /* Configure the IRQ line */
526 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
527
a7a81d0b
MB		 528 ret = platform_device_register(&wm1192_pmic_led_dev);
529 if (ret != 0)
530 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
531
60f9101a
MB		 532 return 0;
533}
534
535static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
536 .isink = 1,
537 .max_uA = 27554,
538};
539
540static struct regulator_init_data wm1192_dcdc3 = {
541 .constraints = {
18b52ca5 542 .name = "PVDD_MEM+PVDD_GPS",
60f9101a
MB		 543 .always_on = 1,
544 },
545};
546
547static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
b5930b83 548 REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */
60f9101a
MB		 549};
550
551static struct regulator_init_data wm1192_ldo1 = {
552 .constraints = {
18b52ca5 553 .name = "PVDD_LCD+PVDD_EXT",
60f9101a
MB		 554 .always_on = 1,
555 },
556 .consumer_supplies = wm1192_ldo1_consumers,
557 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
558};
559
560static struct wm831x_status_pdata wm1192_led7_pdata = {
561 .name = "LED7:green:",
562};
563
564static struct wm831x_status_pdata wm1192_led8_pdata = {
565 .name = "LED8:green:",
566};
567
568static struct wm831x_pdata smdk6410_wm1192_pdata = {
569 .pre_init = wm1192_pre_init,
60f9101a
MB		 570
571 .backlight = &wm1192_backlight_pdata,
572 .dcdc = {
573 &smdk6410_vddarm, /* DCDC1 */
574 &smdk6410_vddint, /* DCDC2 */
575 &wm1192_dcdc3,
576 },
a7a81d0b 577 .gpio_base = GPIO_BOARD_START,
60f9101a
MB		 578 .ldo = {
579 &wm1192_ldo1, /* LDO1 */
580 &smdk6410_vdduh_mmc, /* LDO2 */
581 NULL, /* LDO3 NC */
582 &smdk6410_vddotgi, /* LDO4 */
583 &smdk6410_vddotg, /* LDO5 */
584 &smdk6410_vddhi, /* LDO6 */
585 &smdk6410_vddaudio, /* LDO7 */
586 &smdk6410_vccm2mtv, /* LDO8 */
587 &smdk6410_vddpll, /* LDO9 */
588 &smdk6410_vccmc3bt, /* LDO10 */
589 &smdk6410_vddalive, /* LDO11 */
590 },
591 .status = {
592 &wm1192_led7_pdata,
593 &wm1192_led8_pdata,
594 },
595};
596#endif
597
096941ed
BD		 598static struct i2c_board_info i2c_devs0[] __initdata = {
599 { I2C_BOARD_INFO("24c08", 0x50), },
77897479 600 { I2C_BOARD_INFO("wm8580", 0x1b), },
ecc558ac 601
60f9101a
MB		 602#ifdef CONFIG_SMDK6410_WM1192_EV1
603 { I2C_BOARD_INFO("wm8312", 0x34),
604 .platform_data = &smdk6410_wm1192_pdata,
605 .irq = S3C_EINT(12),
606 },
607#endif
608
ecc558ac
MB		 609#ifdef CONFIG_SMDK6410_WM1190_EV1
610 { I2C_BOARD_INFO("wm8350", 0x1a),
611 .platform_data = &smdk6410_wm8350_pdata,
612 .irq = S3C_EINT(12),
613 },
614#endif
096941ed
BD		 615};
616
617static struct i2c_board_info i2c_devs1[] __initdata = {
618 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
5718df9d
BD		 619};
620
96d78686
BG		 621/* LCD Backlight data */
622static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
623 .no = S3C64XX_GPF(15),
624 .func = S3C_GPIO_SFN(2),
625};
626
627static struct platform_pwm_backlight_data smdk6410_bl_data = {
628 .pwm_id = 1,
a63652f1 629 .enable_gpio = -1,
96d78686
BG		 630};
631
99f6e1f5
JS		 632static struct s3c_hsotg_plat smdk6410_hsotg_pdata;
633
5718df9d
BD		 634static void __init smdk6410_map_io(void)
635{
d6662c35
BD		 636 u32 tmp;
637
5718df9d 638 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
b69f460d 639 s3c64xx_set_xtal_freq(12000000);
5718df9d 640 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
04a49b71 641 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
d6662c35
BD		 642
643 /* set the LCD type */
644
645 tmp = __raw_readl(S3C64XX_SPCON);
646 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
647 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
648 __raw_writel(tmp, S3C64XX_SPCON);
649
650 /* remove the lcd bypass */
651 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
652 tmp &= ~MIFPCON_LCD_BYPASS;
653 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
5718df9d
BD		 654}
655
656static void __init smdk6410_machine_init(void)
657{
f01fdac0
AG		 658 u32 cs1;
659
d85fa24c 660 s3c_i2c0_set_platdata(NULL);
d7ea3743 661 s3c_i2c1_set_platdata(NULL);
438a5d42 662 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
99f6e1f5 663 s3c_hsotg_set_platdata(&smdk6410_hsotg_pdata);
096941ed 664
290d0983
NKC		 665 samsung_keypad_set_platdata(&smdk6410_keypad_data);
666
0804765a 667 s3c24xx_ts_set_platdata(NULL);
85b14a3f 668
f01fdac0
AG		 669 /* configure nCS1 width to 16 bits */
670
671 cs1 = __raw_readl(S3C64XX_SROM_BW) &
672 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
673 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
674 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
675 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
676 S3C64XX_SROM_BW__NCS1__SHIFT;
677 __raw_writel(cs1, S3C64XX_SROM_BW);
678
679 /* set timing for nCS1 suitable for ethernet chip */
680
681 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
682 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
683 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
684 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
685 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
686 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
687 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
688
b7f9a94b
MB		 689 gpio_request(S3C64XX_GPN(5), "LCD power");
690 gpio_request(S3C64XX_GPF(13), "LCD power");
b7f9a94b 691
096941ed
BD		 692 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
693 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
694
0ab0b6d2
AK		 695 s3c_ide_set_platdata(&smdk6410_ide_pdata);
696
5718df9d 697 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
7fa33bdb
TF		 698
699 samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
5718df9d
BD		 700}
701
702MACHINE_START(SMDK6410, "SMDK6410")
afdd225d 703 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
170a5908 704 .atag_offset = 0x100,
5718df9d
BD		 705
706 .init_irq = s3c6410_init_irq,
707 .map_io = smdk6410_map_io,
708 .init_machine = smdk6410_machine_init,
cc8f252b 709 .init_late = s3c64xx_init_late,
04a49b71 710 .init_time = samsung_timer_init,
ff84ded2 711 .restart = s3c64xx_restart,
5718df9d 712MACHINE_END
Linux kernel - Deliverables
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