[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-smdk6410.c

/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
 *
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2008 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
*/

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/fb.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/smsc911x.h>
#include <linux/regulator/fixed.h>

#ifdef CONFIG_SMDK6410_WM1190_EV1
#include <linux/mfd/wm8350/core.h>
#include <linux/mfd/wm8350/pmic.h>
#endif

#ifdef CONFIG_SMDK6410_WM1192_EV1
#include <linux/mfd/wm831x/pdata.h>
#endif

#include <video/platform_lcd.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <mach/hardware.h>
#include <mach/regs-fb.h>
#include <mach/map.h>

#include <asm/irq.h>
#include <asm/mach-types.h>

#include <plat/regs-serial.h>
#include <mach/regs-modem.h>
#include <mach/regs-gpio.h>
#include <mach/regs-sys.h>
#include <mach/regs-srom.h>
#include <plat/iic.h>
#include <plat/fb.h>
#include <plat/gpio-cfg.h>

#include <mach/s3c6410.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>

#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE

static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
	[0] = {
		.hwport	     = 0,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
	[1] = {
		.hwport	     = 1,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
	[2] = {
		.hwport	     = 2,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
	[3] = {
		.hwport	     = 3,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
};

/* framebuffer and LCD setup. */

/* GPF15 = LCD backlight control
 * GPF13 => Panel power
 * GPN5 = LCD nRESET signal
 * PWM_TOUT1 => backlight brightness
 */

static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
				   unsigned int power)
{
	if (power) {
		gpio_direction_output(S3C64XX_GPF(13), 1);
		gpio_direction_output(S3C64XX_GPF(15), 1);

		/* fire nRESET on power up */
		gpio_direction_output(S3C64XX_GPN(5), 0);
		msleep(10);
		gpio_direction_output(S3C64XX_GPN(5), 1);
		msleep(1);
	} else {
		gpio_direction_output(S3C64XX_GPF(15), 0);
		gpio_direction_output(S3C64XX_GPF(13), 0);
	}
}

static struct plat_lcd_data smdk6410_lcd_power_data = {
	.set_power	= smdk6410_lcd_power_set,
};

static struct platform_device smdk6410_lcd_powerdev = {
	.name			= "platform-lcd",
	.dev.parent		= &s3c_device_fb.dev,
	.dev.platform_data	= &smdk6410_lcd_power_data,
};

static struct s3c_fb_pd_win smdk6410_fb_win0 = {
	/* this is to ensure we use win0 */
	.win_mode	= {
		.pixclock	= 41094,
		.left_margin	= 8,
		.right_margin	= 13,
		.upper_margin	= 7,
		.lower_margin	= 5,
		.hsync_len	= 3,
		.vsync_len	= 1,
		.xres		= 800,
		.yres		= 480,
	},
	.max_bpp	= 32,
	.default_bpp	= 16,
};

/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
	.win[0]		= &smdk6410_fb_win0,
	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
};

/*
 * Configuring Ethernet on SMDK6410
 *
 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
 * The constant address below corresponds to nCS1
 *
 *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
 *  2) CFG6 needs to be switched to "LAN9115" side
 */

static struct resource smdk6410_smsc911x_resources[] = {
	[0] = {
		.start = S3C64XX_PA_XM0CSN1,
		.end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = S3C_EINT(10),
		.end   = S3C_EINT(10),
		.flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
	},
};

static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
	.irq_polarity  = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type      = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	.flags         = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
	.phy_interface = PHY_INTERFACE_MODE_MII,
};


static struct platform_device smdk6410_smsc911x = {
	.name          = "smsc911x",
	.id            = -1,
	.num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
	.resource      = &smdk6410_smsc911x_resources[0],
	.dev = {
		.platform_data = &smdk6410_smsc911x_pdata,
	},
};

#ifdef CONFIG_REGULATOR
static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
	{
		/* WM8580 */
		.supply = "PVDD",
		.dev_name = "0-001b",
	},
	{
		/* WM8580 */
		.supply = "AVDD",
		.dev_name = "0-001b",
	},
};

static struct regulator_init_data smdk6410_b_pwr_5v_data = {
	.constraints = {
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
	.consumer_supplies = smdk6410_b_pwr_5v_consumers,
};

static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
	.supply_name = "B_PWR_5V",
	.microvolts = 5000000,
	.init_data = &smdk6410_b_pwr_5v_data,
	.gpio = -EINVAL,
};

static struct platform_device smdk6410_b_pwr_5v = {
	.name          = "reg-fixed-voltage",
	.id            = -1,
	.dev = {
		.platform_data = &smdk6410_b_pwr_5v_pdata,
	},
};
#endif

static struct map_desc smdk6410_iodesc[] = {};

static struct platform_device *smdk6410_devices[] __initdata = {
#ifdef CONFIG_SMDK6410_SD_CH0
	&s3c_device_hsmmc0,
#endif
#ifdef CONFIG_SMDK6410_SD_CH1
	&s3c_device_hsmmc1,
#endif
	&s3c_device_i2c0,
	&s3c_device_i2c1,
	&s3c_device_fb,
	&s3c_device_ohci,
	&s3c_device_usb_hsotg,

#ifdef CONFIG_REGULATOR
	&smdk6410_b_pwr_5v,
#endif
	&smdk6410_lcd_powerdev,

	&smdk6410_smsc911x,
};

#ifdef CONFIG_REGULATOR
/* ARM core */
static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
	{
		.supply = "vddarm",
	}
};

/* VDDARM, BUCK1 on J5 */
static struct regulator_init_data smdk6410_vddarm = {
	.constraints = {
		.name = "PVDD_ARM",
		.min_uV = 1000000,
		.max_uV = 1300000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
	.num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
	.consumer_supplies = smdk6410_vddarm_consumers,
};

/* VDD_INT, BUCK2 on J5 */
static struct regulator_init_data smdk6410_vddint = {
	.constraints = {
		.name = "PVDD_INT",
		.min_uV = 1000000,
		.max_uV = 1200000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
};

/* VDD_HI, LDO3 on J5 */
static struct regulator_init_data smdk6410_vddhi = {
	.constraints = {
		.name = "PVDD_HI",
		.always_on = 1,
	},
};

/* VDD_PLL, LDO2 on J5 */
static struct regulator_init_data smdk6410_vddpll = {
	.constraints = {
		.name = "PVDD_PLL",
		.always_on = 1,
	},
};

/* VDD_UH_MMC, LDO5 on J5 */
static struct regulator_init_data smdk6410_vdduh_mmc = {
	.constraints = {
		.name = "PVDD_UH/PVDD_MMC",
		.always_on = 1,
	},
};

/* VCCM3BT, LDO8 on J5 */
static struct regulator_init_data smdk6410_vccmc3bt = {
	.constraints = {
		.name = "PVCCM3BT",
		.always_on = 1,
	},
};

/* VCCM2MTV, LDO11 on J5 */
static struct regulator_init_data smdk6410_vccm2mtv = {
	.constraints = {
		.name = "PVCCM2MTV",
		.always_on = 1,
	},
};

/* VDD_LCD, LDO12 on J5 */
static struct regulator_init_data smdk6410_vddlcd = {
	.constraints = {
		.name = "PVDD_LCD",
		.always_on = 1,
	},
};

/* VDD_OTGI, LDO9 on J5 */
static struct regulator_init_data smdk6410_vddotgi = {
	.constraints = {
		.name = "PVDD_OTGI",
		.always_on = 1,
	},
};

/* VDD_OTG, LDO14 on J5 */
static struct regulator_init_data smdk6410_vddotg = {
	.constraints = {
		.name = "PVDD_OTG",
		.always_on = 1,
	},
};

/* VDD_ALIVE, LDO15 on J5 */
static struct regulator_init_data smdk6410_vddalive = {
	.constraints = {
		.name = "PVDD_ALIVE",
		.always_on = 1,
	},
};

/* VDD_AUDIO, VLDO_AUDIO on J5 */
static struct regulator_init_data smdk6410_vddaudio = {
	.constraints = {
		.name = "PVDD_AUDIO",
		.always_on = 1,
	},
};
#endif

#ifdef CONFIG_SMDK6410_WM1190_EV1
/* S3C64xx internal logic & PLL */
static struct regulator_init_data wm8350_dcdc1_data = {
	.constraints = {
		.name = "PVDD_INT/PVDD_PLL",
		.min_uV = 1200000,
		.max_uV = 1200000,
		.always_on = 1,
		.apply_uV = 1,
	},
};

/* Memory */
static struct regulator_init_data wm8350_dcdc3_data = {
	.constraints = {
		.name = "PVDD_MEM",
		.min_uV = 1800000,
		.max_uV = 1800000,
		.always_on = 1,
		.state_mem = {
			 .uV = 1800000,
			 .mode = REGULATOR_MODE_NORMAL,
			 .enabled = 1,
		},
		.initial_state = PM_SUSPEND_MEM,
	},
};

/* USB, EXT, PCM, ADC/DAC, USB, MMC */
static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
	{
		/* WM8580 */
		.supply = "DVDD",
		.dev_name = "0-001b",
	},
};

static struct regulator_init_data wm8350_dcdc4_data = {
	.constraints = {
		.name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
		.min_uV = 3000000,
		.max_uV = 3000000,
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
	.consumer_supplies = wm8350_dcdc4_consumers,
};

/* OTGi/1190-EV1 HPVDD & AVDD */
static struct regulator_init_data wm8350_ldo4_data = {
	.constraints = {
		.name = "PVDD_OTGI/HPVDD/AVDD",
		.min_uV = 1200000,
		.max_uV = 1200000,
		.apply_uV = 1,
		.always_on = 1,
	},
};

static struct {
	int regulator;
	struct regulator_init_data *initdata;
} wm1190_regulators[] = {
	{ WM8350_DCDC_1, &wm8350_dcdc1_data },
	{ WM8350_DCDC_3, &wm8350_dcdc3_data },
	{ WM8350_DCDC_4, &wm8350_dcdc4_data },
	{ WM8350_DCDC_6, &smdk6410_vddarm },
	{ WM8350_LDO_1, &smdk6410_vddalive },
	{ WM8350_LDO_2, &smdk6410_vddotg },
	{ WM8350_LDO_3, &smdk6410_vddlcd },
	{ WM8350_LDO_4, &wm8350_ldo4_data },
};

static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
{
	int i;

	/* Configure the IRQ line */
	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);

	/* Instantiate the regulators */
	for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
		wm8350_register_regulator(wm8350,
					  wm1190_regulators[i].regulator,
					  wm1190_regulators[i].initdata);

	return 0;
}

static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
	.init = smdk6410_wm8350_init,
	.irq_high = 1,
	.irq_base = IRQ_BOARD_START,
};
#endif

#ifdef CONFIG_SMDK6410_WM1192_EV1
static int wm1192_pre_init(struct wm831x *wm831x)
{
	/* Configure the IRQ line */
	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);

	return 0;
}

static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
	.isink = 1,
	.max_uA = 27554,
};

static struct regulator_init_data wm1192_dcdc3 = {
	.constraints = {
		.name = "PVDD_MEM/PVDD_GPS",
		.always_on = 1,
	},
};

static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
	{ .supply = "DVDD", .dev_name = "0-001b", },   /* WM8580 */
};

static struct regulator_init_data wm1192_ldo1 = {
	.constraints = {
		.name = "PVDD_LCD/PVDD_EXT",
		.always_on = 1,
	},
	.consumer_supplies = wm1192_ldo1_consumers,
	.num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
};

static struct wm831x_status_pdata wm1192_led7_pdata = {
	.name = "LED7:green:",
};

static struct wm831x_status_pdata wm1192_led8_pdata = {
	.name = "LED8:green:",
};

static struct wm831x_pdata smdk6410_wm1192_pdata = {
	.pre_init = wm1192_pre_init,
	.irq_base = IRQ_BOARD_START,

	.backlight = &wm1192_backlight_pdata,
	.dcdc = {
		&smdk6410_vddarm,  /* DCDC1 */
		&smdk6410_vddint,  /* DCDC2 */
		&wm1192_dcdc3,
	},
	.ldo = {
		 &wm1192_ldo1,        /* LDO1 */
		 &smdk6410_vdduh_mmc, /* LDO2 */
		 NULL,                /* LDO3 NC */
		 &smdk6410_vddotgi,   /* LDO4 */
		 &smdk6410_vddotg,    /* LDO5 */
		 &smdk6410_vddhi,     /* LDO6 */
		 &smdk6410_vddaudio,  /* LDO7 */
		 &smdk6410_vccm2mtv,  /* LDO8 */
		 &smdk6410_vddpll,    /* LDO9 */
		 &smdk6410_vccmc3bt,  /* LDO10 */
		 &smdk6410_vddalive,  /* LDO11 */
	},
	.status = {
		&wm1192_led7_pdata,
		&wm1192_led8_pdata,
	},
};
#endif

static struct i2c_board_info i2c_devs0[] __initdata = {
	{ I2C_BOARD_INFO("24c08", 0x50), },
	{ I2C_BOARD_INFO("wm8580", 0x1b), },

#ifdef CONFIG_SMDK6410_WM1192_EV1
	{ I2C_BOARD_INFO("wm8312", 0x34),
	  .platform_data = &smdk6410_wm1192_pdata,
	  .irq = S3C_EINT(12),
	},
#endif

#ifdef CONFIG_SMDK6410_WM1190_EV1
	{ I2C_BOARD_INFO("wm8350", 0x1a),
	  .platform_data = &smdk6410_wm8350_pdata,
	  .irq = S3C_EINT(12),
	},
#endif
};

static struct i2c_board_info i2c_devs1[] __initdata = {
	{ I2C_BOARD_INFO("24c128", 0x57), },	/* Samsung S524AD0XD1 */
};

static void __init smdk6410_map_io(void)
{
	u32 tmp;

	s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
	s3c24xx_init_clocks(12000000);
	s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));

	/* set the LCD type */

	tmp = __raw_readl(S3C64XX_SPCON);
	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
	tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
	__raw_writel(tmp, S3C64XX_SPCON);

	/* remove the lcd bypass */
	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
	tmp &= ~MIFPCON_LCD_BYPASS;
	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
}

static void __init smdk6410_machine_init(void)
{
	u32 cs1;

	s3c_i2c0_set_platdata(NULL);
	s3c_i2c1_set_platdata(NULL);
	s3c_fb_set_platdata(&smdk6410_lcd_pdata);

	/* configure nCS1 width to 16 bits */

	cs1 = __raw_readl(S3C64XX_SROM_BW) &
		    ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
	cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
		(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
		(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
						   S3C64XX_SROM_BW__NCS1__SHIFT;
	__raw_writel(cs1, S3C64XX_SROM_BW);

	/* set timing for nCS1 suitable for ethernet chip */

	__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
		     (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
		     (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
		     (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
		     (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
		     (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
		     (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);

	gpio_request(S3C64XX_GPN(5), "LCD power");
	gpio_request(S3C64XX_GPF(13), "LCD power");
	gpio_request(S3C64XX_GPF(15), "LCD power");

	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));

	platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
}

MACHINE_START(SMDK6410, "SMDK6410")
	/* Maintainer: Ben Dooks <ben@fluff.org> */
	.phys_io	= S3C_PA_UART & 0xfff00000,
	.io_pg_offst	= (((u32)S3C_VA_UART) >> 18) & 0xfffc,
	.boot_params	= S3C64XX_PA_SDRAM + 0x100,

	.init_irq	= s3c6410_init_irq,
	.map_io		= smdk6410_map_io,
	.init_machine	= smdk6410_machine_init,
	.timer		= &s3c24xx_timer,
MACHINE_END
Commit	Line	Data
431107ea	1	/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
5718df9d BD	2	*
	3	* Copyright 2008 Openmoko, Inc.
	4	* Copyright 2008 Simtec Electronics
	5	* Ben Dooks <ben@simtec.co.uk>
	6	* http://armlinux.simtec.co.uk/
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/types.h>
	16	#include <linux/interrupt.h>
	17	#include <linux/list.h>
	18	#include <linux/timer.h>
	19	#include <linux/init.h>
	20	#include <linux/serial_core.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/io.h>
096941ed	23	#include <linux/i2c.h>
438a5d42 BD	24	#include <linux/fb.h>
	25	#include <linux/gpio.h>
	26	#include <linux/delay.h>
3056ea0a	27	#include <linux/smsc911x.h>
42015c13	28	#include <linux/regulator/fixed.h>
438a5d42	29
ecc558ac MB	30	#ifdef CONFIG_SMDK6410_WM1190_EV1
	31	#include <linux/mfd/wm8350/core.h>
	32	#include <linux/mfd/wm8350/pmic.h>
	33	#endif
438a5d42	34
60f9101a MB	35	#ifdef CONFIG_SMDK6410_WM1192_EV1
	36	#include <linux/mfd/wm831x/pdata.h>
	37	#endif
	38
438a5d42	39	#include <video/platform_lcd.h>
5718df9d BD	40
	41	#include <asm/mach/arch.h>
	42	#include <asm/mach/map.h>
	43	#include <asm/mach/irq.h>
	44
	45	#include <mach/hardware.h>
438a5d42	46	#include <mach/regs-fb.h>
5718df9d BD	47	#include <mach/map.h>
	48
	49	#include <asm/irq.h>
	50	#include <asm/mach-types.h>
	51
	52	#include <plat/regs-serial.h>
3501c9ae BD	53	#include <mach/regs-modem.h>
	54	#include <mach/regs-gpio.h>
	55	#include <mach/regs-sys.h>
	56	#include <mach/regs-srom.h>
d85fa24c	57	#include <plat/iic.h>
438a5d42	58	#include <plat/fb.h>
3056ea0a	59	#include <plat/gpio-cfg.h>
5718df9d	60
f7be9aba	61	#include <mach/s3c6410.h>
5718df9d BD	62	#include <plat/clock.h>
	63	#include <plat/devs.h>
	64	#include <plat/cpu.h>
	65
	66	#define UCON S3C2410_UCON_DEFAULT \| S3C2410_UCON_UCLK
	67	#define ULCON S3C2410_LCON_CS8 \| S3C2410_LCON_PNONE \| S3C2410_LCON_STOPB
	68	#define UFCON S3C2410_UFCON_RXTRIG8 \| S3C2410_UFCON_FIFOMODE
	69
	70	static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
	71	[0] = {
	72	.hwport = 0,
	73	.flags = 0,
bd258e52 MH	74	.ucon = UCON,
	75	.ulcon = ULCON,
	76	.ufcon = UFCON,
5718df9d BD	77	},
	78	[1] = {
	79	.hwport = 1,
	80	.flags = 0,
bd258e52 MH	81	.ucon = UCON,
	82	.ulcon = ULCON,
	83	.ufcon = UFCON,
	84	},
	85	[2] = {
	86	.hwport = 2,
	87	.flags = 0,
	88	.ucon = UCON,
	89	.ulcon = ULCON,
	90	.ufcon = UFCON,
	91	},
	92	[3] = {
	93	.hwport = 3,
	94	.flags = 0,
	95	.ucon = UCON,
	96	.ulcon = ULCON,
	97	.ufcon = UFCON,
5718df9d BD	98	},
	99	};
	100
438a5d42 BD	101	/* framebuffer and LCD setup. */
	102
	103	/* GPF15 = LCD backlight control
	104	* GPF13 => Panel power
	105	* GPN5 = LCD nRESET signal
	106	* PWM_TOUT1 => backlight brightness
	107	*/
	108
	109	static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
	110	unsigned int power)
	111	{
	112	if (power) {
	113	gpio_direction_output(S3C64XX_GPF(13), 1);
	114	gpio_direction_output(S3C64XX_GPF(15), 1);
	115
	116	/* fire nRESET on power up */
	117	gpio_direction_output(S3C64XX_GPN(5), 0);
	118	msleep(10);
	119	gpio_direction_output(S3C64XX_GPN(5), 1);
	120	msleep(1);
	121	} else {
	122	gpio_direction_output(S3C64XX_GPF(15), 0);
	123	gpio_direction_output(S3C64XX_GPF(13), 0);
	124	}
	125	}
	126
	127	static struct plat_lcd_data smdk6410_lcd_power_data = {
	128	.set_power = smdk6410_lcd_power_set,
	129	};
	130
	131	static struct platform_device smdk6410_lcd_powerdev = {
	132	.name = "platform-lcd",
	133	.dev.parent = &s3c_device_fb.dev,
	134	.dev.platform_data = &smdk6410_lcd_power_data,
	135	};
	136
	137	static struct s3c_fb_pd_win smdk6410_fb_win0 = {
	138	/* this is to ensure we use win0 */
	139	.win_mode = {
	140	.pixclock = 41094,
	141	.left_margin = 8,
	142	.right_margin = 13,
	143	.upper_margin = 7,
	144	.lower_margin = 5,
	145	.hsync_len = 3,
	146	.vsync_len = 1,
	147	.xres = 800,
	148	.yres = 480,
	149	},
	150	.max_bpp = 32,
	151	.default_bpp = 16,
	152	};
	153
	154	/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
	155	static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
	156	.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
	157	.win[0] = &smdk6410_fb_win0,
	158	.vidcon0 = VIDCON0_VIDOUT_RGB \| VIDCON0_PNRMODE_RGB,
	159	.vidcon1 = VIDCON1_INV_HSYNC \| VIDCON1_INV_VSYNC,
	160	};
	161
a4e94694 AG	162	/*
	163	* Configuring Ethernet on SMDK6410
	164	*
	165	* Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
	166	* The constant address below corresponds to nCS1
	167	*
	168	* 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
	169	* 2) CFG6 needs to be switched to "LAN9115" side
	170	*/
	171
3056ea0a MB	172	static struct resource smdk6410_smsc911x_resources[] = {
3056ea0a MB	173	[0] = {
f01fdac0 AG	174	.start = S3C64XX_PA_XM0CSN1,
f01fdac0 AG	175	.end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
3056ea0a MB	176	.flags = IORESOURCE_MEM,
	177	},
	178	[1] = {
	179	.start = S3C_EINT(10),
	180	.end = S3C_EINT(10),
	181	.flags = IORESOURCE_IRQ \| IRQ_TYPE_LEVEL_LOW,
	182	},
	183	};
	184
	185	static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
	186	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	187	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	188	.flags = SMSC911X_USE_32BIT \| SMSC911X_FORCE_INTERNAL_PHY,
	189	.phy_interface = PHY_INTERFACE_MODE_MII,
	190	};
	191
	192
	193	static struct platform_device smdk6410_smsc911x = {
	194	.name = "smsc911x",
	195	.id = -1,
	196	.num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
	197	.resource = &smdk6410_smsc911x_resources[0],
	198	.dev = {
	199	.platform_data = &smdk6410_smsc911x_pdata,
	200	},
	201	};
	202
42015c13 MB	203	#ifdef CONFIG_REGULATOR
	204	static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
	205	{
	206	/* WM8580 */
	207	.supply = "PVDD",
	208	.dev_name = "0-001b",
	209	},
	210	{
	211	/* WM8580 */
	212	.supply = "AVDD",
	213	.dev_name = "0-001b",
	214	},
	215	};
	216
	217	static struct regulator_init_data smdk6410_b_pwr_5v_data = {
	218	.constraints = {
	219	.always_on = 1,
	220	},
	221	.num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
	222	.consumer_supplies = smdk6410_b_pwr_5v_consumers,
	223	};
	224
	225	static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
	226	.supply_name = "B_PWR_5V",
	227	.microvolts = 5000000,
	228	.init_data = &smdk6410_b_pwr_5v_data,
d3cf4489	229	.gpio = -EINVAL,
42015c13 MB	230	};
	231
	232	static struct platform_device smdk6410_b_pwr_5v = {
	233	.name = "reg-fixed-voltage",
	234	.id = -1,
	235	.dev = {
	236	.platform_data = &smdk6410_b_pwr_5v_pdata,
	237	},
	238	};
	239	#endif
	240
027191a8	241	static struct map_desc smdk6410_iodesc[] = {};
5718df9d BD	242
5718df9d BD	243	static struct platform_device *smdk6410_devices[] __initdata = {
b24636cf	244	#ifdef CONFIG_SMDK6410_SD_CH0
39057f23	245	&s3c_device_hsmmc0,
b24636cf BD	246	#endif
	247	#ifdef CONFIG_SMDK6410_SD_CH1
	248	&s3c_device_hsmmc1,
	249	#endif
d85fa24c	250	&s3c_device_i2c0,
d7ea3743	251	&s3c_device_i2c1,
438a5d42	252	&s3c_device_fb,
b813248c	253	&s3c_device_ohci,
06fa1d37	254	&s3c_device_usb_hsotg,
42015c13 MB	255
	256	#ifdef CONFIG_REGULATOR
	257	&smdk6410_b_pwr_5v,
	258	#endif
438a5d42	259	&smdk6410_lcd_powerdev,
3056ea0a MB	260
3056ea0a MB	261	&smdk6410_smsc911x,
5718df9d BD	262	};
5718df9d BD	263
60f9101a MB	264	#ifdef CONFIG_REGULATOR
	265	/* ARM core */
	266	static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
	267	{
	268	.supply = "vddarm",
	269	}
	270	};
	271
	272	/* VDDARM, BUCK1 on J5 */
	273	static struct regulator_init_data smdk6410_vddarm = {
ecc558ac	274	.constraints = {
60f9101a MB	275	.name = "PVDD_ARM",
	276	.min_uV = 1000000,
	277	.max_uV = 1300000,
	278	.always_on = 1,
	279	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	280	},
	281	.num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
	282	.consumer_supplies = smdk6410_vddarm_consumers,
	283	};
	284
	285	/* VDD_INT, BUCK2 on J5 */
	286	static struct regulator_init_data smdk6410_vddint = {
	287	.constraints = {
	288	.name = "PVDD_INT",
	289	.min_uV = 1000000,
ecc558ac MB	290	.max_uV = 1200000,
ecc558ac MB	291	.always_on = 1,
60f9101a	292	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
ecc558ac MB	293	},
	294	};
	295
60f9101a MB	296	/* VDD_HI, LDO3 on J5 */
60f9101a MB	297	static struct regulator_init_data smdk6410_vddhi = {
ecc558ac	298	.constraints = {
60f9101a	299	.name = "PVDD_HI",
ecc558ac	300	.always_on = 1,
ecc558ac MB	301	},
	302	};
	303
60f9101a MB	304	/* VDD_PLL, LDO2 on J5 */
	305	static struct regulator_init_data smdk6410_vddpll = {
	306	.constraints = {
	307	.name = "PVDD_PLL",
	308	.always_on = 1,
42015c13 MB	309	},
	310	};
	311
60f9101a MB	312	/* VDD_UH_MMC, LDO5 on J5 */
60f9101a MB	313	static struct regulator_init_data smdk6410_vdduh_mmc = {
ecc558ac	314	.constraints = {
60f9101a	315	.name = "PVDD_UH/PVDD_MMC",
ecc558ac MB	316	.always_on = 1,
	317	},
	318	};
	319
60f9101a MB	320	/* VCCM3BT, LDO8 on J5 */
	321	static struct regulator_init_data smdk6410_vccmc3bt = {
	322	.constraints = {
	323	.name = "PVCCM3BT",
	324	.always_on = 1,
	325	},
e3980b6a MB	326	};
e3980b6a MB	327
60f9101a MB	328	/* VCCM2MTV, LDO11 on J5 */
60f9101a MB	329	static struct regulator_init_data smdk6410_vccm2mtv = {
ecc558ac	330	.constraints = {
60f9101a MB	331	.name = "PVCCM2MTV",
	332	.always_on = 1,
	333	},
	334	};
	335
	336	/* VDD_LCD, LDO12 on J5 */
	337	static struct regulator_init_data smdk6410_vddlcd = {
	338	.constraints = {
	339	.name = "PVDD_LCD",
	340	.always_on = 1,
	341	},
	342	};
	343
	344	/* VDD_OTGI, LDO9 on J5 */
	345	static struct regulator_init_data smdk6410_vddotgi = {
	346	.constraints = {
	347	.name = "PVDD_OTGI",
	348	.always_on = 1,
	349	},
	350	};
	351
	352	/* VDD_OTG, LDO14 on J5 */
	353	static struct regulator_init_data smdk6410_vddotg = {
	354	.constraints = {
	355	.name = "PVDD_OTG",
ecc558ac MB	356	.always_on = 1,
ecc558ac MB	357	},
5718df9d BD	358	};
5718df9d BD	359
60f9101a MB	360	/* VDD_ALIVE, LDO15 on J5 */
60f9101a MB	361	static struct regulator_init_data smdk6410_vddalive = {
ecc558ac MB	362	.constraints = {
ecc558ac MB	363	.name = "PVDD_ALIVE",
60f9101a MB	364	.always_on = 1,
	365	},
	366	};
	367
	368	/* VDD_AUDIO, VLDO_AUDIO on J5 */
	369	static struct regulator_init_data smdk6410_vddaudio = {
	370	.constraints = {
	371	.name = "PVDD_AUDIO",
	372	.always_on = 1,
	373	},
	374	};
	375	#endif
	376
	377	#ifdef CONFIG_SMDK6410_WM1190_EV1
	378	/* S3C64xx internal logic & PLL */
	379	static struct regulator_init_data wm8350_dcdc1_data = {
	380	.constraints = {
	381	.name = "PVDD_INT/PVDD_PLL",
ecc558ac MB	382	.min_uV = 1200000,
	383	.max_uV = 1200000,
	384	.always_on = 1,
	385	.apply_uV = 1,
	386	},
	387	};
	388
60f9101a MB	389	/* Memory */
60f9101a MB	390	static struct regulator_init_data wm8350_dcdc3_data = {
ecc558ac	391	.constraints = {
60f9101a MB	392	.name = "PVDD_MEM",
	393	.min_uV = 1800000,
	394	.max_uV = 1800000,
f53aee29	395	.always_on = 1,
60f9101a MB	396	.state_mem = {
	397	.uV = 1800000,
	398	.mode = REGULATOR_MODE_NORMAL,
	399	.enabled = 1,
	400	},
	401	.initial_state = PM_SUSPEND_MEM,
ecc558ac MB	402	},
	403	};
	404
60f9101a MB	405	/* USB, EXT, PCM, ADC/DAC, USB, MMC */
	406	static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
	407	{
	408	/* WM8580 */
	409	.supply = "DVDD",
	410	.dev_name = "0-001b",
	411	},
	412	};
	413
	414	static struct regulator_init_data wm8350_dcdc4_data = {
ecc558ac	415	.constraints = {
60f9101a	416	.name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
ecc558ac MB	417	.min_uV = 3000000,
ecc558ac MB	418	.max_uV = 3000000,
f53aee29	419	.always_on = 1,
ecc558ac	420	},
60f9101a MB	421	.num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
60f9101a MB	422	.consumer_supplies = wm8350_dcdc4_consumers,
ecc558ac MB	423	};
	424
	425	/* OTGi/1190-EV1 HPVDD & AVDD */
	426	static struct regulator_init_data wm8350_ldo4_data = {
	427	.constraints = {
	428	.name = "PVDD_OTGI/HPVDD/AVDD",
	429	.min_uV = 1200000,
	430	.max_uV = 1200000,
	431	.apply_uV = 1,
f53aee29	432	.always_on = 1,
ecc558ac MB	433	},
	434	};
	435
	436	static struct {
	437	int regulator;
	438	struct regulator_init_data *initdata;
	439	} wm1190_regulators[] = {
	440	{ WM8350_DCDC_1, &wm8350_dcdc1_data },
	441	{ WM8350_DCDC_3, &wm8350_dcdc3_data },
	442	{ WM8350_DCDC_4, &wm8350_dcdc4_data },
60f9101a MB	443	{ WM8350_DCDC_6, &smdk6410_vddarm },
	444	{ WM8350_LDO_1, &smdk6410_vddalive },
	445	{ WM8350_LDO_2, &smdk6410_vddotg },
	446	{ WM8350_LDO_3, &smdk6410_vddlcd },
ecc558ac MB	447	{ WM8350_LDO_4, &wm8350_ldo4_data },
	448	};
	449
	450	static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
	451	{
	452	int i;
	453
a3323b72 MB	454	/* Configure the IRQ line */
	455	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
	456
ecc558ac MB	457	/* Instantiate the regulators */
	458	for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
	459	wm8350_register_regulator(wm8350,
	460	wm1190_regulators[i].regulator,
	461	wm1190_regulators[i].initdata);
	462
	463	return 0;
	464	}
	465
	466	static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
	467	.init = smdk6410_wm8350_init,
db9256f3	468	.irq_high = 1,
9fca8786	469	.irq_base = IRQ_BOARD_START,
ecc558ac MB	470	};
	471	#endif
	472
60f9101a MB	473	#ifdef CONFIG_SMDK6410_WM1192_EV1
	474	static int wm1192_pre_init(struct wm831x *wm831x)
	475	{
	476	/* Configure the IRQ line */
	477	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
	478
	479	return 0;
	480	}
	481
	482	static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
	483	.isink = 1,
	484	.max_uA = 27554,
	485	};
	486
	487	static struct regulator_init_data wm1192_dcdc3 = {
	488	.constraints = {
	489	.name = "PVDD_MEM/PVDD_GPS",
	490	.always_on = 1,
	491	},
	492	};
	493
	494	static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
	495	{ .supply = "DVDD", .dev_name = "0-001b", }, /* WM8580 */
	496	};
	497
	498	static struct regulator_init_data wm1192_ldo1 = {
	499	.constraints = {
	500	.name = "PVDD_LCD/PVDD_EXT",
	501	.always_on = 1,
	502	},
	503	.consumer_supplies = wm1192_ldo1_consumers,
	504	.num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
	505	};
	506
	507	static struct wm831x_status_pdata wm1192_led7_pdata = {
	508	.name = "LED7:green:",
	509	};
	510
	511	static struct wm831x_status_pdata wm1192_led8_pdata = {
	512	.name = "LED8:green:",
	513	};
	514
	515	static struct wm831x_pdata smdk6410_wm1192_pdata = {
	516	.pre_init = wm1192_pre_init,
	517	.irq_base = IRQ_BOARD_START,
	518
	519	.backlight = &wm1192_backlight_pdata,
	520	.dcdc = {
	521	&smdk6410_vddarm, /* DCDC1 */
	522	&smdk6410_vddint, /* DCDC2 */
	523	&wm1192_dcdc3,
	524	},
	525	.ldo = {
	526	&wm1192_ldo1, /* LDO1 */
	527	&smdk6410_vdduh_mmc, /* LDO2 */
	528	NULL, /* LDO3 NC */
	529	&smdk6410_vddotgi, /* LDO4 */
	530	&smdk6410_vddotg, /* LDO5 */
	531	&smdk6410_vddhi, /* LDO6 */
	532	&smdk6410_vddaudio, /* LDO7 */
	533	&smdk6410_vccm2mtv, /* LDO8 */
	534	&smdk6410_vddpll, /* LDO9 */
	535	&smdk6410_vccmc3bt, /* LDO10 */
	536	&smdk6410_vddalive, /* LDO11 */
537	},
538	.status = {
539	&wm1192_led7_pdata,
540	&wm1192_led8_pdata,
541	},
542	};
543	#endif
544
096941ed BD	545	static struct i2c_board_info i2c_devs0[] __initdata = {
096941ed BD	546	{ I2C_BOARD_INFO("24c08", 0x50), },
77897479	547	{ I2C_BOARD_INFO("wm8580", 0x1b), },
ecc558ac	548
60f9101a MB	549	#ifdef CONFIG_SMDK6410_WM1192_EV1
	550	{ I2C_BOARD_INFO("wm8312", 0x34),
	551	.platform_data = &smdk6410_wm1192_pdata,
	552	.irq = S3C_EINT(12),
	553	},
	554	#endif
	555
ecc558ac MB	556	#ifdef CONFIG_SMDK6410_WM1190_EV1
	557	{ I2C_BOARD_INFO("wm8350", 0x1a),
	558	.platform_data = &smdk6410_wm8350_pdata,
	559	.irq = S3C_EINT(12),
	560	},
	561	#endif
096941ed BD	562	};
	563
	564	static struct i2c_board_info i2c_devs1[] __initdata = {
	565	{ I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
5718df9d BD	566	};
5718df9d BD	567
5718df9d BD	568	static void __init smdk6410_map_io(void)
5718df9d BD	569	{
d6662c35 BD	570	u32 tmp;
d6662c35 BD	571
5718df9d BD	572	s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
	573	s3c24xx_init_clocks(12000000);
	574	s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
d6662c35 BD	575
	576	/* set the LCD type */
	577
	578	tmp = __raw_readl(S3C64XX_SPCON);
	579	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
	580	tmp \|= S3C64XX_SPCON_LCD_SEL_RGB;
	581	__raw_writel(tmp, S3C64XX_SPCON);
	582
	583	/* remove the lcd bypass */
	584	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
	585	tmp &= ~MIFPCON_LCD_BYPASS;
	586	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
5718df9d BD	587	}
	588
	589	static void __init smdk6410_machine_init(void)
	590	{
f01fdac0 AG	591	u32 cs1;
f01fdac0 AG	592
d85fa24c	593	s3c_i2c0_set_platdata(NULL);
d7ea3743	594	s3c_i2c1_set_platdata(NULL);
438a5d42	595	s3c_fb_set_platdata(&smdk6410_lcd_pdata);
096941ed	596
f01fdac0 AG	597	/* configure nCS1 width to 16 bits */
	598
	599	cs1 = __raw_readl(S3C64XX_SROM_BW) &
	600	~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
	601	cs1 \|= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) \|
	602	(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) \|
	603	(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
	604	S3C64XX_SROM_BW__NCS1__SHIFT;
	605	__raw_writel(cs1, S3C64XX_SROM_BW);
	606
	607	/* set timing for nCS1 suitable for ethernet chip */
	608
	609	__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) \|
	610	(6 << S3C64XX_SROM_BCX__TACP__SHIFT) \|
	611	(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) \|
	612	(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) \|
	613	(0xe << S3C64XX_SROM_BCX__TACC__SHIFT) \|
	614	(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) \|
	615	(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
	616
b7f9a94b MB	617	gpio_request(S3C64XX_GPN(5), "LCD power");
	618	gpio_request(S3C64XX_GPF(13), "LCD power");
	619	gpio_request(S3C64XX_GPF(15), "LCD power");
	620
096941ed BD	621	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
	622	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
	623
5718df9d BD	624	platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
	625	}
	626
	627	MACHINE_START(SMDK6410, "SMDK6410")
	628	/* Maintainer: Ben Dooks <ben@fluff.org> */
	629	.phys_io = S3C_PA_UART & 0xfff00000,
	630	.io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
	631	.boot_params = S3C64XX_PA_SDRAM + 0x100,
	632
	633	.init_irq = s3c6410_init_irq,
	634	.map_io = smdk6410_map_io,
	635	.init_machine = smdk6410_machine_init,
	636	.timer = &s3c24xx_timer,
	637	MACHINE_END