Commit | Line | Data |
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431107ea | 1 | /* linux/arch/arm/mach-s3c64xx/s3c6410.c |
d626aeed BD |
2 | * |
3 | * Copyright 2008 Simtec Electronics | |
4 | * Copyright 2008 Simtec Electronics | |
5 | * Ben Dooks <ben@simtec.co.uk> | |
6 | * http://armlinux.simtec.co.uk/ | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
c836c90e TF |
13 | /* |
14 | * NOTE: Code in this file is not used when booting with Device Tree support. | |
15 | */ | |
16 | ||
d626aeed BD |
17 | #include <linux/kernel.h> |
18 | #include <linux/types.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/list.h> | |
21 | #include <linux/timer.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/clk.h> | |
24 | #include <linux/io.h> | |
4a858cfc | 25 | #include <linux/device.h> |
d626aeed | 26 | #include <linux/serial_core.h> |
334a1c70 | 27 | #include <linux/serial_s3c.h> |
d626aeed | 28 | #include <linux/platform_device.h> |
c836c90e | 29 | #include <linux/of.h> |
d626aeed BD |
30 | |
31 | #include <asm/mach/arch.h> | |
32 | #include <asm/mach/map.h> | |
33 | #include <asm/mach/irq.h> | |
34 | ||
35 | #include <mach/hardware.h> | |
36 | #include <asm/irq.h> | |
37 | ||
38 | #include <plat/cpu-freq.h> | |
3501c9ae | 39 | #include <mach/regs-clock.h> |
d626aeed BD |
40 | |
41 | #include <plat/cpu.h> | |
42 | #include <plat/devs.h> | |
43 | #include <plat/clock.h> | |
5cc7fd88 | 44 | #include <plat/sdhci.h> |
0ab0b6d2 | 45 | #include <plat/ata-core.h> |
50e9769a | 46 | #include <plat/adc-core.h> |
4f507d19 | 47 | #include <plat/iic-core.h> |
999304be | 48 | #include <plat/onenand-core.h> |
b024043b KK |
49 | |
50 | #include "common.h" | |
d626aeed | 51 | |
d626aeed BD |
52 | void __init s3c6410_map_io(void) |
53 | { | |
5cc7fd88 BD |
54 | /* initialise device information early */ |
55 | s3c6410_default_sdhci0(); | |
a2205cd2 | 56 | s3c6410_default_sdhci1(); |
92b118f6 | 57 | s3c6410_default_sdhci2(); |
4f507d19 BD |
58 | |
59 | /* the i2c devices are directly compatible with s3c2440 */ | |
60 | s3c_i2c0_setname("s3c2440-i2c"); | |
61 | s3c_i2c1_setname("s3c2440-i2c"); | |
14077ea6 | 62 | |
50e9769a | 63 | s3c_adc_setname("s3c64xx-adc"); |
14077ea6 | 64 | s3c_device_nand.name = "s3c6400-nand"; |
999304be MS |
65 | s3c_onenand_setname("s3c6410-onenand"); |
66 | s3c64xx_onenand1_setname("s3c6410-onenand"); | |
0ab0b6d2 | 67 | s3c_cfcon_setname("s3c64xx-pata"); |
d626aeed BD |
68 | } |
69 | ||
d9b79fb5 BD |
70 | void __init s3c6410_init_irq(void) |
71 | { | |
72 | /* VIC0 is missing IRQ7, VIC1 is fully populated. */ | |
73 | s3c64xx_init_irq(~0 & ~(1 << 7), ~0); | |
74 | } | |
75 | ||
4a858cfc KS |
76 | struct bus_type s3c6410_subsys = { |
77 | .name = "s3c6410-core", | |
78 | .dev_name = "s3c6410-core", | |
d626aeed BD |
79 | }; |
80 | ||
4a858cfc KS |
81 | static struct device s3c6410_dev = { |
82 | .bus = &s3c6410_subsys, | |
d626aeed BD |
83 | }; |
84 | ||
85 | static int __init s3c6410_core_init(void) | |
86 | { | |
c836c90e TF |
87 | /* Not applicable when using DT. */ |
88 | if (of_have_populated_dt()) | |
89 | return 0; | |
90 | ||
4a858cfc | 91 | return subsys_system_register(&s3c6410_subsys, NULL); |
d626aeed BD |
92 | } |
93 | ||
94 | core_initcall(s3c6410_core_init); | |
95 | ||
96 | int __init s3c6410_init(void) | |
97 | { | |
98 | printk("S3C6410: Initialising architecture\n"); | |
99 | ||
4a858cfc | 100 | return device_register(&s3c6410_dev); |
d626aeed | 101 | } |