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1 | /* linux/arch/arm/mach-s5p64x0/include/mach/map.h |
2 | * | |
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com | |
5 | * | |
6 | * S5P64X0 - Memory map definitions | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __ASM_ARCH_MAP_H | |
14 | #define __ASM_ARCH_MAP_H __FILE__ | |
15 | ||
16 | #include <plat/map-base.h> | |
17 | #include <plat/map-s5p.h> | |
18 | ||
19 | #define S5P64X0_PA_SDRAM (0x20000000) | |
20 | ||
21 | #define S5P64X0_PA_CHIPID (0xE0000000) | |
22 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID | |
23 | ||
24 | #define S5P64X0_PA_SYSCON (0xE0100000) | |
25 | #define S5P_PA_SYSCON S5P64X0_PA_SYSCON | |
26 | ||
27 | #define S5P64X0_PA_GPIO (0xE0308000) | |
28 | ||
29 | #define S5P64X0_PA_VIC0 (0xE4000000) | |
30 | #define S5P64X0_PA_VIC1 (0xE4100000) | |
31 | ||
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32 | #define S5P64X0_PA_SROMC (0xE7000000) |
33 | #define S5P_PA_SROMC S5P64X0_PA_SROMC | |
34 | ||
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35 | #define S5P64X0_PA_PDMA (0xE9000000) |
36 | ||
37 | #define S5P64X0_PA_TIMER (0xEA000000) | |
38 | #define S5P_PA_TIMER S5P64X0_PA_TIMER | |
39 | ||
40 | #define S5P64X0_PA_RTC (0xEA100000) | |
41 | ||
42 | #define S5P64X0_PA_WDT (0xEA200000) | |
43 | ||
44 | #define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET)) | |
45 | #define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000)) | |
46 | ||
47 | #define S5P_PA_UART0 S5P6450_PA_UART(0) | |
48 | #define S5P_PA_UART1 S5P6450_PA_UART(1) | |
49 | #define S5P_PA_UART2 S5P6450_PA_UART(2) | |
50 | #define S5P_PA_UART3 S5P6450_PA_UART(3) | |
51 | #define S5P_PA_UART4 S5P6450_PA_UART(4) | |
52 | #define S5P_PA_UART5 S5P6450_PA_UART(5) | |
53 | ||
54 | #define S5P_SZ_UART SZ_256 | |
55 | ||
56 | #define S5P6440_PA_IIC0 (0xEC104000) | |
57 | #define S5P6440_PA_IIC1 (0xEC20F000) | |
58 | #define S5P6450_PA_IIC0 (0xEC100000) | |
59 | #define S5P6450_PA_IIC1 (0xEC200000) | |
60 | ||
61 | #define S5P64X0_PA_SPI0 (0xEC400000) | |
62 | #define S5P64X0_PA_SPI1 (0xEC500000) | |
63 | ||
64 | #define S5P64X0_PA_HSOTG (0xED100000) | |
65 | ||
66 | #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | |
67 | ||
68 | #define S5P64X0_PA_I2S (0xF2000000) | |
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69 | #define S5P6450_PA_I2S1 0xF2800000 |
70 | #define S5P6450_PA_I2S2 0xF2900000 | |
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71 | |
72 | #define S5P64X0_PA_PCM (0xF2100000) | |
73 | ||
74 | #define S5P64X0_PA_ADC (0xF3000000) | |
75 | ||
76 | /* compatibiltiy defines. */ | |
77 | ||
78 | #define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0) | |
79 | #define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1) | |
80 | #define S3C_PA_HSMMC2 S5P64X0_PA_HSMMC(2) | |
81 | #define S3C_PA_IIC S5P6440_PA_IIC0 | |
82 | #define S3C_PA_IIC1 S5P6440_PA_IIC1 | |
83 | #define S3C_PA_RTC S5P64X0_PA_RTC | |
84 | #define S3C_PA_WDT S5P64X0_PA_WDT | |
85 | ||
86 | #define SAMSUNG_PA_ADC S5P64X0_PA_ADC | |
87 | ||
88 | #endif /* __ASM_ARCH_MAP_H */ |