projects / deliverable / linux.git / blame
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|---|---|---|
| a2e0d624 KK |
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/map.h |
| 2 | * | |
| ede38875 | 3 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. |
| a2e0d624 KK |
4 | * http://www.samsung.com |
| 5 | * | |
| 6 | * S5P64X0 - Memory map definitions | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License version 2 as | |
| 10 | * published by the Free Software Foundation. | |
| 11 | */ | |
| 12 | ||
| 13 | #ifndef __ASM_ARCH_MAP_H | |
| 14 | #define __ASM_ARCH_MAP_H __FILE__ | |
| 15 | ||
| 16 | #include <plat/map-base.h> | |
| 17 | #include <plat/map-s5p.h> | |
| 18 | ||
| ede38875 | 19 | #define S5P64X0_PA_SDRAM 0x20000000 |
| a2e0d624 | 20 | |
| ede38875 | 21 | #define S5P64X0_PA_CHIPID 0xE0000000 |
| a2e0d624 | 22 | |
| ede38875 | 23 | #define S5P64X0_PA_SYSCON 0xE0100000 |
| a2e0d624 | 24 | |
| ede38875 | 25 | #define S5P64X0_PA_GPIO 0xE0308000 |
| a2e0d624 | 26 | |
| ede38875 KK |
27 | #define S5P64X0_PA_VIC0 0xE4000000 |
| 28 | #define S5P64X0_PA_VIC1 0xE4100000 | |
| a2e0d624 | 29 | |
| ede38875 | 30 | #define S5P64X0_PA_SROMC 0xE7000000 |
| a2e0d624 | 31 | |
| ede38875 | 32 | #define S5P64X0_PA_PDMA 0xE9000000 |
| a2e0d624 | 33 | |
| ede38875 KK |
34 | #define S5P64X0_PA_TIMER 0xEA000000 |
| 35 | #define S5P64X0_PA_RTC 0xEA100000 | |
| 36 | #define S5P64X0_PA_WDT 0xEA200000 | |
| a2e0d624 | 37 | |
| ede38875 KK |
38 | #define S5P6440_PA_IIC0 0xEC104000 |
| 39 | #define S5P6440_PA_IIC1 0xEC20F000 | |
| 40 | #define S5P6450_PA_IIC0 0xEC100000 | |
| 41 | #define S5P6450_PA_IIC1 0xEC200000 | |
| a2e0d624 | 42 | |
| ede38875 KK |
43 | #define S5P64X0_PA_SPI0 0xEC400000 |
| 44 | #define S5P64X0_PA_SPI1 0xEC500000 | |
| a2e0d624 | 45 | |
| ede38875 | 46 | #define S5P64X0_PA_HSOTG 0xED100000 |
| a2e0d624 KK |
47 | |
| 48 | #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | |
| 49 | ||
| d93f5eef AK |
50 | #define S5P64X0_PA_FB 0xEE000000 |
| 51 | ||
| ede38875 | 52 | #define S5P64X0_PA_I2S 0xF2000000 |
| cf57b1a7 JB |
53 | #define S5P6450_PA_I2S1 0xF2800000 |
| 54 | #define S5P6450_PA_I2S2 0xF2900000 | |
| a2e0d624 | 55 | |
| ede38875 | 56 | #define S5P64X0_PA_PCM 0xF2100000 |
| a2e0d624 | 57 | |
| ede38875 | 58 | #define S5P64X0_PA_ADC 0xF3000000 |
| a2e0d624 | 59 | |
| ede38875 | 60 | /* Compatibiltiy Defines */ |
| a2e0d624 KK |
61 | |
| 62 | #define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0) | |
| 63 | #define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1) | |
| 64 | #define S3C_PA_HSMMC2 S5P64X0_PA_HSMMC(2) | |
| 65 | #define S3C_PA_IIC S5P6440_PA_IIC0 | |
| 66 | #define S3C_PA_IIC1 S5P6440_PA_IIC1 | |
| 67 | #define S3C_PA_RTC S5P64X0_PA_RTC | |
| 68 | #define S3C_PA_WDT S5P64X0_PA_WDT | |
| d93f5eef | 69 | #define S3C_PA_FB S5P64X0_PA_FB |
| a2e0d624 | 70 | |
| ede38875 KK |
71 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID |
| 72 | #define S5P_PA_SROMC S5P64X0_PA_SROMC | |
| 73 | #define S5P_PA_SYSCON S5P64X0_PA_SYSCON | |
| 74 | #define S5P_PA_TIMER S5P64X0_PA_TIMER | |
| 75 | ||
| a2e0d624 KK |
76 | #define SAMSUNG_PA_ADC S5P64X0_PA_ADC |
| 77 | ||
| ede38875 KK |
78 | /* UART */ |
| 79 | ||
| 80 | #define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET)) | |
| 81 | #define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000)) | |
| 82 | ||
| 83 | #define S5P_PA_UART0 S5P6450_PA_UART(0) | |
| 84 | #define S5P_PA_UART1 S5P6450_PA_UART(1) | |
| 85 | #define S5P_PA_UART2 S5P6450_PA_UART(2) | |
| 86 | #define S5P_PA_UART3 S5P6450_PA_UART(3) | |
| 87 | #define S5P_PA_UART4 S5P6450_PA_UART(4) | |
| 88 | #define S5P_PA_UART5 S5P6450_PA_UART(5) | |
| 89 | ||
| 90 | #define S5P_SZ_UART SZ_256 | |
| 91 | ||
| a2e0d624 | 92 | #endif /* __ASM_ARCH_MAP_H */ |