projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 8acd1ade BM |
1 | /* linux/arch/arm/mach-s5pc100/cpu.c |
| 2 | * | |
| 3 | * Copyright 2009 Samsung Electronics Co. | |
| 4 | * Byungho Min <bhmin@samsung.com> | |
| 5 | * | |
| 6 | * Based on mach-s3c6410/cpu.c | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License version 2 as | |
| 10 | * published by the Free Software Foundation. | |
| 11 | */ | |
| 12 | ||
| 13 | #include <linux/kernel.h> | |
| 14 | #include <linux/types.h> | |
| 15 | #include <linux/interrupt.h> | |
| 16 | #include <linux/list.h> | |
| 17 | #include <linux/timer.h> | |
| 18 | #include <linux/init.h> | |
| 19 | #include <linux/clk.h> | |
| 20 | #include <linux/io.h> | |
| 21 | #include <linux/sysdev.h> | |
| 22 | #include <linux/serial_core.h> | |
| 23 | #include <linux/platform_device.h> | |
| 24 | ||
| 25 | #include <asm/mach/arch.h> | |
| 26 | #include <asm/mach/map.h> | |
| 27 | #include <asm/mach/irq.h> | |
| 28 | ||
| acc84707 MS |
29 | #include <asm/proc-fns.h> |
| 30 | ||
| 8acd1ade BM |
31 | #include <mach/hardware.h> |
| 32 | #include <mach/map.h> | |
| 33 | #include <asm/irq.h> | |
| 34 | ||
| 8acd1ade | 35 | #include <plat/regs-serial.h> |
| acc84707 | 36 | #include <mach/regs-clock.h> |
| 8acd1ade BM |
37 | |
| 38 | #include <plat/cpu.h> | |
| 39 | #include <plat/devs.h> | |
| 40 | #include <plat/clock.h> | |
| 8acd1ade | 41 | #include <plat/iic-core.h> |
| acc84707 | 42 | #include <plat/sdhci.h> |
| 999304be MS |
43 | #include <plat/onenand-core.h> |
| 44 | ||
| 8acd1ade BM |
45 | #include <plat/s5pc100.h> |
| 46 | ||
| 47 | /* Initial IO mappings */ | |
| 48 | ||
| 49 | static struct map_desc s5pc100_iodesc[] __initdata = { | |
| acc84707 MS |
50 | { |
| 51 | .virtual = (unsigned long)S5P_VA_SYSTIMER, | |
| 52 | .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), | |
| 53 | .length = SZ_16K, | |
| 54 | .type = MT_DEVICE, | |
| 55 | }, { | |
| 56 | .virtual = (unsigned long)VA_VIC2, | |
| 57 | .pfn = __phys_to_pfn(S5PC100_PA_VIC2), | |
| 58 | .length = SZ_16K, | |
| 59 | .type = MT_DEVICE, | |
| 60 | }, { | |
| 61 | .virtual = (unsigned long)S5PC100_VA_OTHERS, | |
| 62 | .pfn = __phys_to_pfn(S5PC100_PA_OTHERS), | |
| 63 | .length = SZ_4K, | |
| 64 | .type = MT_DEVICE, | |
| 65 | } | |
| 8acd1ade BM |
66 | }; |
| 67 | ||
| c3fcf5d1 KP |
68 | static void s5pc100_idle(void) |
| 69 | { | |
| acc84707 MS |
70 | if (!need_resched()) |
| 71 | cpu_do_idle(); | |
| c3fcf5d1 | 72 | |
| acc84707 | 73 | local_irq_enable(); |
| c3fcf5d1 KP |
74 | } |
| 75 | ||
| 8acd1ade BM |
76 | /* s5pc100_map_io |
| 77 | * | |
| 78 | * register the standard cpu IO areas | |
| 79 | */ | |
| 80 | ||
| 81 | void __init s5pc100_map_io(void) | |
| 82 | { | |
| 83 | iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); | |
| 84 | ||
| 85 | /* initialise device information early */ | |
| 86cd4f5f KP |
86 | s5pc100_default_sdhci0(); |
| 87 | s5pc100_default_sdhci1(); | |
| 88 | s5pc100_default_sdhci2(); | |
| 5eda288f KP |
89 | |
| 90 | /* the i2c devices are directly compatible with s3c2440 */ | |
| 91 | s3c_i2c0_setname("s3c2440-i2c"); | |
| 92 | s3c_i2c1_setname("s3c2440-i2c"); | |
| 999304be MS |
93 | |
| 94 | s3c_onenand_setname("s5pc100-onenand"); | |
| 8acd1ade BM |
95 | } |
| 96 | ||
| 97 | void __init s5pc100_init_clocks(int xtal) | |
| 98 | { | |
| acc84707 MS |
99 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); |
| 100 | ||
| 8acd1ade | 101 | s3c24xx_register_baseclocks(xtal); |
| acc84707 | 102 | s5p_register_clocks(xtal); |
| 8acd1ade BM |
103 | s5pc100_register_clocks(); |
| 104 | s5pc100_setup_clocks(); | |
| 105 | } | |
| 106 | ||
| 107 | void __init s5pc100_init_irq(void) | |
| 108 | { | |
| acc84707 | 109 | u32 vic[] = {~0, ~0, ~0}; |
| 8acd1ade BM |
110 | |
| 111 | /* VIC0, VIC1, and VIC2 are fully populated. */ | |
| acc84707 | 112 | s5p_init_irq(vic, ARRAY_SIZE(vic)); |
| 8acd1ade BM |
113 | } |
| 114 | ||
| acc84707 | 115 | static struct sysdev_class s5pc100_sysclass = { |
| 8acd1ade BM |
116 | .name = "s5pc100-core", |
| 117 | }; | |
| 118 | ||
| 119 | static struct sys_device s5pc100_sysdev = { | |
| 120 | .cls = &s5pc100_sysclass, | |
| 121 | }; | |
| 122 | ||
| 123 | static int __init s5pc100_core_init(void) | |
| 124 | { | |
| 125 | return sysdev_class_register(&s5pc100_sysclass); | |
| 126 | } | |
| 127 | ||
| 128 | core_initcall(s5pc100_core_init); | |
| 129 | ||
| 130 | int __init s5pc100_init(void) | |
| 131 | { | |
| acc84707 | 132 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); |
| 8acd1ade | 133 | |
| acc84707 MS |
134 | /* set idle function */ |
| 135 | pm_idle = s5pc100_idle; | |
| c3fcf5d1 | 136 | |
| 8acd1ade BM |
137 | return sysdev_register(&s5pc100_sysdev); |
| 138 | } |