projects / deliverable / linux.git / blame
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|---|---|---|
| 8acd1ade BM |
1 | /* linux/arch/arm/mach-s5pc100/cpu.c |
| 2 | * | |
| 3 | * Copyright 2009 Samsung Electronics Co. | |
| 4 | * Byungho Min <bhmin@samsung.com> | |
| 5 | * | |
| 6 | * Based on mach-s3c6410/cpu.c | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License version 2 as | |
| 10 | * published by the Free Software Foundation. | |
| 11 | */ | |
| 12 | ||
| 13 | #include <linux/kernel.h> | |
| 14 | #include <linux/types.h> | |
| 15 | #include <linux/interrupt.h> | |
| 16 | #include <linux/list.h> | |
| 17 | #include <linux/timer.h> | |
| 18 | #include <linux/init.h> | |
| 19 | #include <linux/clk.h> | |
| 20 | #include <linux/io.h> | |
| 21 | #include <linux/sysdev.h> | |
| 22 | #include <linux/serial_core.h> | |
| 23 | #include <linux/platform_device.h> | |
| 24 | ||
| c3fcf5d1 KP |
25 | #include <asm/proc-fns.h> |
| 26 | ||
| 8acd1ade BM |
27 | #include <asm/mach/arch.h> |
| 28 | #include <asm/mach/map.h> | |
| 29 | #include <asm/mach/irq.h> | |
| 30 | ||
| 31 | #include <mach/hardware.h> | |
| 32 | #include <mach/map.h> | |
| 33 | #include <asm/irq.h> | |
| 34 | ||
| 35 | #include <plat/cpu-freq.h> | |
| 36 | #include <plat/regs-serial.h> | |
| c3fcf5d1 | 37 | #include <plat/regs-power.h> |
| 8acd1ade BM |
38 | |
| 39 | #include <plat/cpu.h> | |
| 40 | #include <plat/devs.h> | |
| 41 | #include <plat/clock.h> | |
| 42 | #include <plat/sdhci.h> | |
| 43 | #include <plat/iic-core.h> | |
| 44 | #include <plat/s5pc100.h> | |
| 45 | ||
| 46 | /* Initial IO mappings */ | |
| 47 | ||
| 48 | static struct map_desc s5pc100_iodesc[] __initdata = { | |
| 49 | }; | |
| 50 | ||
| c3fcf5d1 KP |
51 | static void s5pc100_idle(void) |
| 52 | { | |
| 53 | unsigned long tmp; | |
| 54 | ||
| 55 | tmp = __raw_readl(S5PC100_PWR_CFG); | |
| 56 | tmp &= ~S5PC100_PWRCFG_CFG_DEEP_IDLE; | |
| 57 | tmp &= ~S5PC100_PWRCFG_CFG_WFI_MASK; | |
| 58 | tmp |= S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE; | |
| 59 | __raw_writel(tmp, S5PC100_PWR_CFG); | |
| 60 | ||
| 61 | tmp = __raw_readl(S5PC100_OTHERS); | |
| 62 | tmp |= S5PC100_PMU_INT_DISABLE; | |
| 63 | __raw_writel(tmp, S5PC100_OTHERS); | |
| 64 | ||
| 65 | cpu_do_idle(); | |
| 66 | } | |
| 67 | ||
| 8acd1ade BM |
68 | /* s5pc100_map_io |
| 69 | * | |
| 70 | * register the standard cpu IO areas | |
| 71 | */ | |
| 72 | ||
| 73 | void __init s5pc100_map_io(void) | |
| 74 | { | |
| 75 | iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); | |
| 76 | ||
| 77 | /* initialise device information early */ | |
| 86cd4f5f KP |
78 | s5pc100_default_sdhci0(); |
| 79 | s5pc100_default_sdhci1(); | |
| 80 | s5pc100_default_sdhci2(); | |
| 5eda288f KP |
81 | |
| 82 | /* the i2c devices are directly compatible with s3c2440 */ | |
| 83 | s3c_i2c0_setname("s3c2440-i2c"); | |
| 84 | s3c_i2c1_setname("s3c2440-i2c"); | |
| 8acd1ade BM |
85 | } |
| 86 | ||
| 87 | void __init s5pc100_init_clocks(int xtal) | |
| 88 | { | |
| 89 | printk(KERN_DEBUG "%s: initialising clocks\n", __func__); | |
| 90 | s3c24xx_register_baseclocks(xtal); | |
| 91 | s5pc1xx_register_clocks(); | |
| 92 | s5pc100_register_clocks(); | |
| 93 | s5pc100_setup_clocks(); | |
| 94 | } | |
| 95 | ||
| 96 | void __init s5pc100_init_irq(void) | |
| 97 | { | |
| 98 | u32 vic_valid[] = {~0, ~0, ~0}; | |
| 99 | ||
| 100 | /* VIC0, VIC1, and VIC2 are fully populated. */ | |
| 101 | s5pc1xx_init_irq(vic_valid, ARRAY_SIZE(vic_valid)); | |
| 102 | } | |
| 103 | ||
| 104 | struct sysdev_class s5pc100_sysclass = { | |
| 105 | .name = "s5pc100-core", | |
| 106 | }; | |
| 107 | ||
| 108 | static struct sys_device s5pc100_sysdev = { | |
| 109 | .cls = &s5pc100_sysclass, | |
| 110 | }; | |
| 111 | ||
| 112 | static int __init s5pc100_core_init(void) | |
| 113 | { | |
| 114 | return sysdev_class_register(&s5pc100_sysclass); | |
| 115 | } | |
| 116 | ||
| 117 | core_initcall(s5pc100_core_init); | |
| 118 | ||
| 119 | int __init s5pc100_init(void) | |
| 120 | { | |
| 121 | printk(KERN_DEBUG "S5PC100: Initialising architecture\n"); | |
| 122 | ||
| c3fcf5d1 KP |
123 | s5pc1xx_idle = s5pc100_idle; |
| 124 | ||
| 8acd1ade BM |
125 | return sysdev_register(&s5pc100_sysdev); |
| 126 | } |