[deliverable/linux.git] / arch / arm / mach-s5pv210 / common.c

/*
 * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Common Codes for S5PV210
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/device.h>
#include <clocksource/samsung_pwm.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
#include <linux/dma-mapping.h>
#include <linux/serial_core.h>

#include <asm/proc-fns.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <mach/map.h>
#include <mach/regs-clock.h>

#include <plat/cpu.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/sdhci.h>
#include <plat/adc-core.h>
#include <plat/ata-core.h>
#include <plat/fb-core.h>
#include <plat/fimc-core.h>
#include <plat/iic-core.h>
#include <plat/keypad-core.h>
#include <plat/pwm-core.h>
#include <plat/tv-core.h>
#include <plat/spi-core.h>
#include <plat/regs-serial.h>

#include "common.h"

static const char name_s5pv210[] = "S5PV210/S5PC110";

static struct cpu_table cpu_ids[] __initdata = {
	{
		.idcode		= S5PV210_CPU_ID,
		.idmask		= S5PV210_CPU_MASK,
		.map_io		= s5pv210_map_io,
		.init_clocks	= s5pv210_init_clocks,
		.init_uarts	= s5pv210_init_uarts,
		.init		= s5pv210_init,
		.name		= name_s5pv210,
	},
};

/* Initial IO mappings */

static struct map_desc s5pv210_iodesc[] __initdata = {
	{
		.virtual	= (unsigned long)S5P_VA_CHIPID,
		.pfn		= __phys_to_pfn(S5PV210_PA_CHIPID),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)S3C_VA_SYS,
		.pfn		= __phys_to_pfn(S5PV210_PA_SYSCON),
		.length		= SZ_64K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)S3C_VA_TIMER,
		.pfn		= __phys_to_pfn(S5PV210_PA_TIMER),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)S3C_VA_WATCHDOG,
		.pfn		= __phys_to_pfn(S5PV210_PA_WATCHDOG),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)S5P_VA_SROMC,
		.pfn		= __phys_to_pfn(S5PV210_PA_SROMC),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)S5P_VA_SYSTIMER,
		.pfn		= __phys_to_pfn(S5PV210_PA_SYSTIMER),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)S5P_VA_GPIO,
		.pfn		= __phys_to_pfn(S5PV210_PA_GPIO),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)VA_VIC0,
		.pfn		= __phys_to_pfn(S5PV210_PA_VIC0),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)VA_VIC1,
		.pfn		= __phys_to_pfn(S5PV210_PA_VIC1),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)VA_VIC2,
		.pfn		= __phys_to_pfn(S5PV210_PA_VIC2),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)VA_VIC3,
		.pfn		= __phys_to_pfn(S5PV210_PA_VIC3),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)S3C_VA_UART,
		.pfn		= __phys_to_pfn(S3C_PA_UART),
		.length		= SZ_512K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)S5P_VA_DMC0,
		.pfn		= __phys_to_pfn(S5PV210_PA_DMC0),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)S5P_VA_DMC1,
		.pfn		= __phys_to_pfn(S5PV210_PA_DMC1),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)S3C_VA_USB_HSPHY,
		.pfn		=__phys_to_pfn(S5PV210_PA_HSPHY),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}
};

void s5pv210_restart(enum reboot_mode mode, const char *cmd)
{
	__raw_writel(0x1, S5P_SWRESET);
}

static struct samsung_pwm_variant s5pv210_pwm_variant = {
	.bits		= 32,
	.div_base	= 0,
	.has_tint_cstat	= true,
	.tclk_mask	= (1 << 5),
};

/*
 * s5pv210_map_io
 *
 * register the standard cpu IO areas
 */

void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
{
	/* initialize the io descriptors we need for initialization */
	iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
	if (mach_desc)
		iotable_init(mach_desc, size);

	/* detect cpu id and rev. */
	s5p_init_cpu(S5P_VA_CHIPID);

	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));

	samsung_pwm_set_platdata(&s5pv210_pwm_variant);
}

void __init s5pv210_map_io(void)
{
	/* initialise device information early */
	s5pv210_default_sdhci0();
	s5pv210_default_sdhci1();
	s5pv210_default_sdhci2();
	s5pv210_default_sdhci3();

	s3c_adc_setname("samsung-adc-v3");

	s3c_cfcon_setname("s5pv210-pata");

	s3c_fimc_setname(0, "s5pv210-fimc");
	s3c_fimc_setname(1, "s5pv210-fimc");
	s3c_fimc_setname(2, "s5pv210-fimc");

	/* the i2c devices are directly compatible with s3c2440 */
	s3c_i2c0_setname("s3c2440-i2c");
	s3c_i2c1_setname("s3c2440-i2c");
	s3c_i2c2_setname("s3c2440-i2c");

	s3c_fb_setname("s5pv210-fb");

	/* Use s5pv210-keypad instead of samsung-keypad */
	samsung_keypad_setname("s5pv210-keypad");

	/* setup TV devices */
	s5p_hdmi_setname("s5pv210-hdmi");

	s3c64xx_spi_setname("s5pv210-spi");
}

void __init s5pv210_init_clocks(int xtal)
{
	printk(KERN_DEBUG "%s: initializing clocks\n", __func__);

	s3c24xx_register_baseclocks(xtal);
	s5p_register_clocks(xtal);
	s5pv210_register_clocks();
	s5pv210_setup_clocks();
}

void __init s5pv210_init_irq(void)
{
	u32 vic[4];	/* S5PV210 supports 4 VIC */

	/* All the VICs are fully populated. */
	vic[0] = ~0;
	vic[1] = ~0;
	vic[2] = ~0;
	vic[3] = ~0;

	s5p_init_irq(vic, ARRAY_SIZE(vic));
}

struct bus_type s5pv210_subsys = {
	.name		= "s5pv210-core",
	.dev_name	= "s5pv210-core",
};

static struct device s5pv210_dev = {
	.bus	= &s5pv210_subsys,
};

static int __init s5pv210_core_init(void)
{
	return subsys_system_register(&s5pv210_subsys, NULL);
}
core_initcall(s5pv210_core_init);

int __init s5pv210_init(void)
{
	printk(KERN_INFO "S5PV210: Initializing architecture\n");
	return device_register(&s5pv210_dev);
}

/* uart registration process */

void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{
	s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
}
Commit	Line	Data
3fa754c2 KK	1	/*
3fa754c2 KK	2	* Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
19a2c065	3	* http://www.samsung.com
939d28aa	4	*
3fa754c2 KK	5	* Common Codes for S5PV210
3fa754c2 KK	6	*
939d28aa KK	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
3fa754c2	10	*/
939d28aa KK	11
	12	#include <linux/kernel.h>
	13	#include <linux/types.h>
	14	#include <linux/interrupt.h>
	15	#include <linux/list.h>
	16	#include <linux/timer.h>
	17	#include <linux/init.h>
	18	#include <linux/module.h>
	19	#include <linux/clk.h>
	20	#include <linux/io.h>
4a858cfc	21	#include <linux/device.h>
1c161fd0	22	#include <clocksource/samsung_pwm.h>
939d28aa	23	#include <linux/platform_device.h>
4341f9b3	24	#include <linux/sched.h>
a06a58ab	25	#include <linux/dma-mapping.h>
3fa754c2	26	#include <linux/serial_core.h>
939d28aa	27
3fa754c2	28	#include <asm/proc-fns.h>
939d28aa KK	29	#include <asm/mach/arch.h>
	30	#include <asm/mach/map.h>
	31	#include <asm/mach/irq.h>
	32
939d28aa KK	33	#include <mach/map.h>
	34	#include <mach/regs-clock.h>
	35
	36	#include <plat/cpu.h>
939d28aa	37	#include <plat/clock.h>
3fa754c2	38	#include <plat/devs.h>
3fa754c2	39	#include <plat/sdhci.h>
50e9769a	40	#include <plat/adc-core.h>
4b9a5ad5	41	#include <plat/ata-core.h>
3fa754c2	42	#include <plat/fb-core.h>
33c14ff8	43	#include <plat/fimc-core.h>
c8d833bf	44	#include <plat/iic-core.h>
e7d0628c	45	#include <plat/keypad-core.h>
1c161fd0	46	#include <plat/pwm-core.h>
fbf05563	47	#include <plat/tv-core.h>
308b3afb	48	#include <plat/spi-core.h>
3fa754c2 KK	49	#include <plat/regs-serial.h>
	50
	51	#include "common.h"
	52
	53	static const char name_s5pv210[] = "S5PV210/S5PC110";
	54
	55	static struct cpu_table cpu_ids[] __initdata = {
	56	{
	57	.idcode = S5PV210_CPU_ID,
	58	.idmask = S5PV210_CPU_MASK,
	59	.map_io = s5pv210_map_io,
	60	.init_clocks = s5pv210_init_clocks,
	61	.init_uarts = s5pv210_init_uarts,
	62	.init = s5pv210_init,
	63	.name = name_s5pv210,
	64	},
	65	};
939d28aa KK	66
	67	/* Initial IO mappings */
	68
	69	static struct map_desc s5pv210_iodesc[] __initdata = {
	70	{
3fa754c2 KK	71	.virtual = (unsigned long)S5P_VA_CHIPID,
	72	.pfn = __phys_to_pfn(S5PV210_PA_CHIPID),
	73	.length = SZ_4K,
	74	.type = MT_DEVICE,
	75	}, {
	76	.virtual = (unsigned long)S3C_VA_SYS,
	77	.pfn = __phys_to_pfn(S5PV210_PA_SYSCON),
	78	.length = SZ_64K,
	79	.type = MT_DEVICE,
	80	}, {
	81	.virtual = (unsigned long)S3C_VA_TIMER,
	82	.pfn = __phys_to_pfn(S5PV210_PA_TIMER),
	83	.length = SZ_16K,
	84	.type = MT_DEVICE,
	85	}, {
	86	.virtual = (unsigned long)S3C_VA_WATCHDOG,
	87	.pfn = __phys_to_pfn(S5PV210_PA_WATCHDOG),
	88	.length = SZ_4K,
	89	.type = MT_DEVICE,
	90	}, {
	91	.virtual = (unsigned long)S5P_VA_SROMC,
	92	.pfn = __phys_to_pfn(S5PV210_PA_SROMC),
	93	.length = SZ_4K,
	94	.type = MT_DEVICE,
	95	}, {
939d28aa KK	96	.virtual = (unsigned long)S5P_VA_SYSTIMER,
939d28aa KK	97	.pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER),
a203a13a	98	.length = SZ_4K,
939d28aa	99	.type = MT_DEVICE,
19a2c065 KK	100	}, {
	101	.virtual = (unsigned long)S5P_VA_GPIO,
	102	.pfn = __phys_to_pfn(S5PV210_PA_GPIO),
	103	.length = SZ_4K,
	104	.type = MT_DEVICE,
	105	}, {
	106	.virtual = (unsigned long)VA_VIC0,
	107	.pfn = __phys_to_pfn(S5PV210_PA_VIC0),
	108	.length = SZ_16K,
	109	.type = MT_DEVICE,
	110	}, {
	111	.virtual = (unsigned long)VA_VIC1,
	112	.pfn = __phys_to_pfn(S5PV210_PA_VIC1),
	113	.length = SZ_16K,
	114	.type = MT_DEVICE,
939d28aa KK	115	}, {
	116	.virtual = (unsigned long)VA_VIC2,
	117	.pfn = __phys_to_pfn(S5PV210_PA_VIC2),
	118	.length = SZ_16K,
	119	.type = MT_DEVICE,
	120	}, {
	121	.virtual = (unsigned long)VA_VIC3,
	122	.pfn = __phys_to_pfn(S5PV210_PA_VIC3),
	123	.length = SZ_16K,
	124	.type = MT_DEVICE,
19a2c065 KK	125	}, {
	126	.virtual = (unsigned long)S3C_VA_UART,
	127	.pfn = __phys_to_pfn(S3C_PA_UART),
	128	.length = SZ_512K,
	129	.type = MT_DEVICE,
1d826d14 JL	130	}, {
	131	.virtual = (unsigned long)S5P_VA_DMC0,
	132	.pfn = __phys_to_pfn(S5PV210_PA_DMC0),
	133	.length = SZ_4K,
	134	.type = MT_DEVICE,
	135	}, {
	136	.virtual = (unsigned long)S5P_VA_DMC1,
	137	.pfn = __phys_to_pfn(S5PV210_PA_DMC1),
	138	.length = SZ_4K,
	139	.type = MT_DEVICE,
ca1931ca MS	140	}, {
	141	.virtual = (unsigned long)S3C_VA_USB_HSPHY,
	142	.pfn =__phys_to_pfn(S5PV210_PA_HSPHY),
	143	.length = SZ_4K,
	144	.type = MT_DEVICE,
939d28aa KK	145	}
	146	};
	147
7b6d864b	148	void s5pv210_restart(enum reboot_mode mode, const char *cmd)
4550ee20 JL	149	{
	150	__raw_writel(0x1, S5P_SWRESET);
	151	}
	152
1c161fd0 TF	153	static struct samsung_pwm_variant s5pv210_pwm_variant = {
	154	.bits = 32,
	155	.div_base = 0,
	156	.has_tint_cstat = true,
	157	.tclk_mask = (1 << 5),
	158	};
	159
3fa754c2 KK	160	/*
3fa754c2 KK	161	* s5pv210_map_io
939d28aa KK	162	*
939d28aa KK	163	* register the standard cpu IO areas
3fa754c2	164	*/
939d28aa	165
3fa754c2	166	void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
939d28aa	167	{
3fa754c2	168	/* initialize the io descriptors we need for initialization */
939d28aa	169	iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
3fa754c2 KK	170	if (mach_desc)
	171	iotable_init(mach_desc, size);
	172
	173	/* detect cpu id and rev. */
	174	s5p_init_cpu(S5P_VA_CHIPID);
	175
	176	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
1c161fd0 TF	177
1c161fd0 TF	178	samsung_pwm_set_platdata(&s5pv210_pwm_variant);
3fa754c2 KK	179	}
	180
	181	void __init s5pv210_map_io(void)
	182	{
e6f66a9f MS	183	/* initialise device information early */
	184	s5pv210_default_sdhci0();
	185	s5pv210_default_sdhci1();
	186	s5pv210_default_sdhci2();
976a62f2	187	s5pv210_default_sdhci3();
e6f66a9f	188
a0428f3a	189	s3c_adc_setname("samsung-adc-v3");
50e9769a	190
4b9a5ad5 AK	191	s3c_cfcon_setname("s5pv210-pata");
4b9a5ad5 AK	192
d61bd77f KK	193	s3c_fimc_setname(0, "s5pv210-fimc");
	194	s3c_fimc_setname(1, "s5pv210-fimc");
	195	s3c_fimc_setname(2, "s5pv210-fimc");
e6f66a9f	196
c8d833bf MS	197	/* the i2c devices are directly compatible with s3c2440 */
	198	s3c_i2c0_setname("s3c2440-i2c");
	199	s3c_i2c1_setname("s3c2440-i2c");
	200	s3c_i2c2_setname("s3c2440-i2c");
eb42b044 PO	201
eb42b044 PO	202	s3c_fb_setname("s5pv210-fb");
636d1742	203
e7d0628c JS	204	/* Use s5pv210-keypad instead of samsung-keypad */
e7d0628c JS	205	samsung_keypad_setname("s5pv210-keypad");
fbf05563 TS	206
	207	/* setup TV devices */
	208	s5p_hdmi_setname("s5pv210-hdmi");
308b3afb HS	209
308b3afb HS	210	s3c64xx_spi_setname("s5pv210-spi");
939d28aa KK	211	}
	212
	213	void __init s5pv210_init_clocks(int xtal)
	214	{
	215	printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
	216
	217	s3c24xx_register_baseclocks(xtal);
	218	s5p_register_clocks(xtal);
	219	s5pv210_register_clocks();
	220	s5pv210_setup_clocks();
	221	}
	222
	223	void __init s5pv210_init_irq(void)
	224	{
	225	u32 vic[4]; /* S5PV210 supports 4 VIC */
	226
	227	/* All the VICs are fully populated. */
	228	vic[0] = ~0;
	229	vic[1] = ~0;
	230	vic[2] = ~0;
	231	vic[3] = ~0;
	232
	233	s5p_init_irq(vic, ARRAY_SIZE(vic));
	234	}
	235
4a858cfc KS	236	struct bus_type s5pv210_subsys = {
	237	.name = "s5pv210-core",
	238	.dev_name = "s5pv210-core",
939d28aa KK	239	};
939d28aa KK	240
4a858cfc KS	241	static struct device s5pv210_dev = {
4a858cfc KS	242	.bus = &s5pv210_subsys,
939d28aa KK	243	};
	244
	245	static int __init s5pv210_core_init(void)
	246	{
4a858cfc	247	return subsys_system_register(&s5pv210_subsys, NULL);
939d28aa	248	}
939d28aa KK	249	core_initcall(s5pv210_core_init);
	250
	251	int __init s5pv210_init(void)
	252	{
	253	printk(KERN_INFO "S5PV210: Initializing architecture\n");
4a858cfc	254	return device_register(&s5pv210_dev);
939d28aa	255	}
3fa754c2	256
3fa754c2 KK	257	/* uart registration process */
	258
	259	void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no)
	260	{
3fa754c2 KK	261	s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
3fa754c2 KK	262	}