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3fa754c2 KK |
1 | /* |
2 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. | |
19a2c065 | 3 | * http://www.samsung.com |
939d28aa | 4 | * |
3fa754c2 KK |
5 | * Common Codes for S5PV210 |
6 | * | |
939d28aa KK |
7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
3fa754c2 | 10 | */ |
939d28aa KK |
11 | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/types.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/list.h> | |
16 | #include <linux/timer.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/clk.h> | |
20 | #include <linux/io.h> | |
21 | #include <linux/sysdev.h> | |
22 | #include <linux/platform_device.h> | |
4341f9b3 | 23 | #include <linux/sched.h> |
a06a58ab | 24 | #include <linux/dma-mapping.h> |
3fa754c2 | 25 | #include <linux/serial_core.h> |
939d28aa | 26 | |
3fa754c2 | 27 | #include <asm/proc-fns.h> |
939d28aa KK |
28 | #include <asm/mach/arch.h> |
29 | #include <asm/mach/map.h> | |
30 | #include <asm/mach/irq.h> | |
31 | ||
939d28aa KK |
32 | #include <mach/map.h> |
33 | #include <mach/regs-clock.h> | |
34 | ||
35 | #include <plat/cpu.h> | |
939d28aa | 36 | #include <plat/clock.h> |
3fa754c2 KK |
37 | #include <plat/devs.h> |
38 | #include <plat/reset.h> | |
39 | #include <plat/sdhci.h> | |
50e9769a | 40 | #include <plat/adc-core.h> |
4b9a5ad5 | 41 | #include <plat/ata-core.h> |
3fa754c2 | 42 | #include <plat/fb-core.h> |
33c14ff8 | 43 | #include <plat/fimc-core.h> |
c8d833bf | 44 | #include <plat/iic-core.h> |
e7d0628c | 45 | #include <plat/keypad-core.h> |
fbf05563 | 46 | #include <plat/tv-core.h> |
3fa754c2 KK |
47 | #include <plat/regs-serial.h> |
48 | ||
49 | #include "common.h" | |
50 | ||
51 | static const char name_s5pv210[] = "S5PV210/S5PC110"; | |
52 | ||
53 | static struct cpu_table cpu_ids[] __initdata = { | |
54 | { | |
55 | .idcode = S5PV210_CPU_ID, | |
56 | .idmask = S5PV210_CPU_MASK, | |
57 | .map_io = s5pv210_map_io, | |
58 | .init_clocks = s5pv210_init_clocks, | |
59 | .init_uarts = s5pv210_init_uarts, | |
60 | .init = s5pv210_init, | |
61 | .name = name_s5pv210, | |
62 | }, | |
63 | }; | |
939d28aa KK |
64 | |
65 | /* Initial IO mappings */ | |
66 | ||
67 | static struct map_desc s5pv210_iodesc[] __initdata = { | |
68 | { | |
3fa754c2 KK |
69 | .virtual = (unsigned long)S5P_VA_CHIPID, |
70 | .pfn = __phys_to_pfn(S5PV210_PA_CHIPID), | |
71 | .length = SZ_4K, | |
72 | .type = MT_DEVICE, | |
73 | }, { | |
74 | .virtual = (unsigned long)S3C_VA_SYS, | |
75 | .pfn = __phys_to_pfn(S5PV210_PA_SYSCON), | |
76 | .length = SZ_64K, | |
77 | .type = MT_DEVICE, | |
78 | }, { | |
79 | .virtual = (unsigned long)S3C_VA_TIMER, | |
80 | .pfn = __phys_to_pfn(S5PV210_PA_TIMER), | |
81 | .length = SZ_16K, | |
82 | .type = MT_DEVICE, | |
83 | }, { | |
84 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | |
85 | .pfn = __phys_to_pfn(S5PV210_PA_WATCHDOG), | |
86 | .length = SZ_4K, | |
87 | .type = MT_DEVICE, | |
88 | }, { | |
89 | .virtual = (unsigned long)S5P_VA_SROMC, | |
90 | .pfn = __phys_to_pfn(S5PV210_PA_SROMC), | |
91 | .length = SZ_4K, | |
92 | .type = MT_DEVICE, | |
93 | }, { | |
939d28aa KK |
94 | .virtual = (unsigned long)S5P_VA_SYSTIMER, |
95 | .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER), | |
a203a13a | 96 | .length = SZ_4K, |
939d28aa | 97 | .type = MT_DEVICE, |
19a2c065 KK |
98 | }, { |
99 | .virtual = (unsigned long)S5P_VA_GPIO, | |
100 | .pfn = __phys_to_pfn(S5PV210_PA_GPIO), | |
101 | .length = SZ_4K, | |
102 | .type = MT_DEVICE, | |
103 | }, { | |
104 | .virtual = (unsigned long)VA_VIC0, | |
105 | .pfn = __phys_to_pfn(S5PV210_PA_VIC0), | |
106 | .length = SZ_16K, | |
107 | .type = MT_DEVICE, | |
108 | }, { | |
109 | .virtual = (unsigned long)VA_VIC1, | |
110 | .pfn = __phys_to_pfn(S5PV210_PA_VIC1), | |
111 | .length = SZ_16K, | |
112 | .type = MT_DEVICE, | |
939d28aa KK |
113 | }, { |
114 | .virtual = (unsigned long)VA_VIC2, | |
115 | .pfn = __phys_to_pfn(S5PV210_PA_VIC2), | |
116 | .length = SZ_16K, | |
117 | .type = MT_DEVICE, | |
118 | }, { | |
119 | .virtual = (unsigned long)VA_VIC3, | |
120 | .pfn = __phys_to_pfn(S5PV210_PA_VIC3), | |
121 | .length = SZ_16K, | |
122 | .type = MT_DEVICE, | |
19a2c065 KK |
123 | }, { |
124 | .virtual = (unsigned long)S3C_VA_UART, | |
125 | .pfn = __phys_to_pfn(S3C_PA_UART), | |
126 | .length = SZ_512K, | |
127 | .type = MT_DEVICE, | |
1d826d14 JL |
128 | }, { |
129 | .virtual = (unsigned long)S5P_VA_DMC0, | |
130 | .pfn = __phys_to_pfn(S5PV210_PA_DMC0), | |
131 | .length = SZ_4K, | |
132 | .type = MT_DEVICE, | |
133 | }, { | |
134 | .virtual = (unsigned long)S5P_VA_DMC1, | |
135 | .pfn = __phys_to_pfn(S5PV210_PA_DMC1), | |
136 | .length = SZ_4K, | |
137 | .type = MT_DEVICE, | |
ca1931ca MS |
138 | }, { |
139 | .virtual = (unsigned long)S3C_VA_USB_HSPHY, | |
140 | .pfn =__phys_to_pfn(S5PV210_PA_HSPHY), | |
141 | .length = SZ_4K, | |
142 | .type = MT_DEVICE, | |
939d28aa KK |
143 | } |
144 | }; | |
145 | ||
146 | static void s5pv210_idle(void) | |
147 | { | |
148 | if (!need_resched()) | |
149 | cpu_do_idle(); | |
150 | ||
151 | local_irq_enable(); | |
152 | } | |
153 | ||
4550ee20 JL |
154 | static void s5pv210_sw_reset(void) |
155 | { | |
156 | __raw_writel(0x1, S5P_SWRESET); | |
157 | } | |
158 | ||
3fa754c2 KK |
159 | /* |
160 | * s5pv210_map_io | |
939d28aa KK |
161 | * |
162 | * register the standard cpu IO areas | |
3fa754c2 | 163 | */ |
939d28aa | 164 | |
3fa754c2 | 165 | void __init s5pv210_init_io(struct map_desc *mach_desc, int size) |
939d28aa | 166 | { |
3fa754c2 | 167 | /* initialize the io descriptors we need for initialization */ |
939d28aa | 168 | iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); |
3fa754c2 KK |
169 | if (mach_desc) |
170 | iotable_init(mach_desc, size); | |
171 | ||
172 | /* detect cpu id and rev. */ | |
173 | s5p_init_cpu(S5P_VA_CHIPID); | |
174 | ||
175 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | |
176 | } | |
177 | ||
178 | void __init s5pv210_map_io(void) | |
179 | { | |
a06a58ab | 180 | init_consistent_dma_size(14 << 20); |
c8d833bf | 181 | |
e6f66a9f MS |
182 | /* initialise device information early */ |
183 | s5pv210_default_sdhci0(); | |
184 | s5pv210_default_sdhci1(); | |
185 | s5pv210_default_sdhci2(); | |
976a62f2 | 186 | s5pv210_default_sdhci3(); |
e6f66a9f | 187 | |
a0428f3a | 188 | s3c_adc_setname("samsung-adc-v3"); |
50e9769a | 189 | |
4b9a5ad5 AK |
190 | s3c_cfcon_setname("s5pv210-pata"); |
191 | ||
d61bd77f KK |
192 | s3c_fimc_setname(0, "s5pv210-fimc"); |
193 | s3c_fimc_setname(1, "s5pv210-fimc"); | |
194 | s3c_fimc_setname(2, "s5pv210-fimc"); | |
e6f66a9f | 195 | |
c8d833bf MS |
196 | /* the i2c devices are directly compatible with s3c2440 */ |
197 | s3c_i2c0_setname("s3c2440-i2c"); | |
198 | s3c_i2c1_setname("s3c2440-i2c"); | |
199 | s3c_i2c2_setname("s3c2440-i2c"); | |
eb42b044 PO |
200 | |
201 | s3c_fb_setname("s5pv210-fb"); | |
636d1742 | 202 | |
e7d0628c JS |
203 | /* Use s5pv210-keypad instead of samsung-keypad */ |
204 | samsung_keypad_setname("s5pv210-keypad"); | |
fbf05563 TS |
205 | |
206 | /* setup TV devices */ | |
207 | s5p_hdmi_setname("s5pv210-hdmi"); | |
939d28aa KK |
208 | } |
209 | ||
210 | void __init s5pv210_init_clocks(int xtal) | |
211 | { | |
212 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | |
213 | ||
214 | s3c24xx_register_baseclocks(xtal); | |
215 | s5p_register_clocks(xtal); | |
216 | s5pv210_register_clocks(); | |
217 | s5pv210_setup_clocks(); | |
218 | } | |
219 | ||
220 | void __init s5pv210_init_irq(void) | |
221 | { | |
222 | u32 vic[4]; /* S5PV210 supports 4 VIC */ | |
223 | ||
224 | /* All the VICs are fully populated. */ | |
225 | vic[0] = ~0; | |
226 | vic[1] = ~0; | |
227 | vic[2] = ~0; | |
228 | vic[3] = ~0; | |
229 | ||
230 | s5p_init_irq(vic, ARRAY_SIZE(vic)); | |
231 | } | |
232 | ||
0ad73cef | 233 | struct sysdev_class s5pv210_sysclass = { |
939d28aa KK |
234 | .name = "s5pv210-core", |
235 | }; | |
236 | ||
237 | static struct sys_device s5pv210_sysdev = { | |
238 | .cls = &s5pv210_sysclass, | |
239 | }; | |
240 | ||
241 | static int __init s5pv210_core_init(void) | |
242 | { | |
243 | return sysdev_class_register(&s5pv210_sysclass); | |
244 | } | |
939d28aa KK |
245 | core_initcall(s5pv210_core_init); |
246 | ||
247 | int __init s5pv210_init(void) | |
248 | { | |
249 | printk(KERN_INFO "S5PV210: Initializing architecture\n"); | |
250 | ||
251 | /* set idle function */ | |
252 | pm_idle = s5pv210_idle; | |
253 | ||
4550ee20 JL |
254 | /* set sw_reset function */ |
255 | s5p_reset_hook = s5pv210_sw_reset; | |
256 | ||
939d28aa KK |
257 | return sysdev_register(&s5pv210_sysdev); |
258 | } | |
3fa754c2 KK |
259 | |
260 | static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = { | |
261 | [0] = { | |
262 | .name = "pclk", | |
263 | .divisor = 1, | |
264 | .min_baud = 0, | |
265 | .max_baud = 0, | |
266 | }, | |
267 | }; | |
268 | ||
269 | /* uart registration process */ | |
270 | ||
271 | void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |
272 | { | |
273 | struct s3c2410_uartcfg *tcfg = cfg; | |
274 | u32 ucnt; | |
275 | ||
276 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { | |
277 | if (!tcfg->clocks) { | |
278 | tcfg->clocks = s5pv210_serial_clocks; | |
279 | tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks); | |
280 | } | |
281 | } | |
282 | ||
283 | s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); | |
284 | } |