Merge tag 'power-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux...
[deliverable/linux.git] / arch / arm / mach-s5pv210 / common.c
CommitLineData
3fa754c2
KK
1/*
2 * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
19a2c065 3 * http://www.samsung.com
939d28aa 4 *
3fa754c2
KK
5 * Common Codes for S5PV210
6 *
939d28aa
KK
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
3fa754c2 10 */
939d28aa
KK
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
18#include <linux/module.h>
19#include <linux/clk.h>
20#include <linux/io.h>
4a858cfc 21#include <linux/device.h>
1c161fd0 22#include <clocksource/samsung_pwm.h>
939d28aa 23#include <linux/platform_device.h>
4341f9b3 24#include <linux/sched.h>
a06a58ab 25#include <linux/dma-mapping.h>
3fa754c2 26#include <linux/serial_core.h>
334a1c70 27#include <linux/serial_s3c.h>
939d28aa 28
3fa754c2 29#include <asm/proc-fns.h>
939d28aa
KK
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/irq.h>
33
939d28aa
KK
34#include <mach/map.h>
35#include <mach/regs-clock.h>
36
37#include <plat/cpu.h>
939d28aa 38#include <plat/clock.h>
3fa754c2 39#include <plat/devs.h>
3fa754c2 40#include <plat/sdhci.h>
50e9769a 41#include <plat/adc-core.h>
4b9a5ad5 42#include <plat/ata-core.h>
3fa754c2 43#include <plat/fb-core.h>
33c14ff8 44#include <plat/fimc-core.h>
c8d833bf 45#include <plat/iic-core.h>
e7d0628c 46#include <plat/keypad-core.h>
1c161fd0 47#include <plat/pwm-core.h>
fbf05563 48#include <plat/tv-core.h>
308b3afb 49#include <plat/spi-core.h>
3fa754c2
KK
50
51#include "common.h"
52
53static const char name_s5pv210[] = "S5PV210/S5PC110";
54
55static struct cpu_table cpu_ids[] __initdata = {
56 {
57 .idcode = S5PV210_CPU_ID,
58 .idmask = S5PV210_CPU_MASK,
59 .map_io = s5pv210_map_io,
60 .init_clocks = s5pv210_init_clocks,
61 .init_uarts = s5pv210_init_uarts,
62 .init = s5pv210_init,
63 .name = name_s5pv210,
64 },
65};
939d28aa
KK
66
67/* Initial IO mappings */
68
69static struct map_desc s5pv210_iodesc[] __initdata = {
70 {
3fa754c2
KK
71 .virtual = (unsigned long)S5P_VA_CHIPID,
72 .pfn = __phys_to_pfn(S5PV210_PA_CHIPID),
73 .length = SZ_4K,
74 .type = MT_DEVICE,
75 }, {
76 .virtual = (unsigned long)S3C_VA_SYS,
77 .pfn = __phys_to_pfn(S5PV210_PA_SYSCON),
78 .length = SZ_64K,
79 .type = MT_DEVICE,
80 }, {
81 .virtual = (unsigned long)S3C_VA_TIMER,
82 .pfn = __phys_to_pfn(S5PV210_PA_TIMER),
83 .length = SZ_16K,
84 .type = MT_DEVICE,
85 }, {
86 .virtual = (unsigned long)S3C_VA_WATCHDOG,
87 .pfn = __phys_to_pfn(S5PV210_PA_WATCHDOG),
88 .length = SZ_4K,
89 .type = MT_DEVICE,
90 }, {
91 .virtual = (unsigned long)S5P_VA_SROMC,
92 .pfn = __phys_to_pfn(S5PV210_PA_SROMC),
93 .length = SZ_4K,
94 .type = MT_DEVICE,
95 }, {
939d28aa
KK
96 .virtual = (unsigned long)S5P_VA_SYSTIMER,
97 .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER),
a203a13a 98 .length = SZ_4K,
939d28aa 99 .type = MT_DEVICE,
19a2c065
KK
100 }, {
101 .virtual = (unsigned long)S5P_VA_GPIO,
102 .pfn = __phys_to_pfn(S5PV210_PA_GPIO),
103 .length = SZ_4K,
104 .type = MT_DEVICE,
105 }, {
106 .virtual = (unsigned long)VA_VIC0,
107 .pfn = __phys_to_pfn(S5PV210_PA_VIC0),
108 .length = SZ_16K,
109 .type = MT_DEVICE,
110 }, {
111 .virtual = (unsigned long)VA_VIC1,
112 .pfn = __phys_to_pfn(S5PV210_PA_VIC1),
113 .length = SZ_16K,
114 .type = MT_DEVICE,
939d28aa
KK
115 }, {
116 .virtual = (unsigned long)VA_VIC2,
117 .pfn = __phys_to_pfn(S5PV210_PA_VIC2),
118 .length = SZ_16K,
119 .type = MT_DEVICE,
120 }, {
121 .virtual = (unsigned long)VA_VIC3,
122 .pfn = __phys_to_pfn(S5PV210_PA_VIC3),
123 .length = SZ_16K,
124 .type = MT_DEVICE,
19a2c065
KK
125 }, {
126 .virtual = (unsigned long)S3C_VA_UART,
127 .pfn = __phys_to_pfn(S3C_PA_UART),
128 .length = SZ_512K,
129 .type = MT_DEVICE,
1d826d14
JL
130 }, {
131 .virtual = (unsigned long)S5P_VA_DMC0,
132 .pfn = __phys_to_pfn(S5PV210_PA_DMC0),
133 .length = SZ_4K,
134 .type = MT_DEVICE,
135 }, {
136 .virtual = (unsigned long)S5P_VA_DMC1,
137 .pfn = __phys_to_pfn(S5PV210_PA_DMC1),
138 .length = SZ_4K,
139 .type = MT_DEVICE,
ca1931ca
MS
140 }, {
141 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
142 .pfn =__phys_to_pfn(S5PV210_PA_HSPHY),
143 .length = SZ_4K,
144 .type = MT_DEVICE,
939d28aa
KK
145 }
146};
147
7b6d864b 148void s5pv210_restart(enum reboot_mode mode, const char *cmd)
4550ee20
JL
149{
150 __raw_writel(0x1, S5P_SWRESET);
151}
152
1c161fd0
TF
153static struct samsung_pwm_variant s5pv210_pwm_variant = {
154 .bits = 32,
155 .div_base = 0,
156 .has_tint_cstat = true,
157 .tclk_mask = (1 << 5),
158};
159
4280506a
TF
160void __init samsung_set_timer_source(unsigned int event, unsigned int source)
161{
162 s5pv210_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
163 s5pv210_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
164}
165
166void __init samsung_timer_init(void)
167{
168 unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
169 IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
170 IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
171 };
172
173 samsung_pwm_clocksource_init(S3C_VA_TIMER,
174 timer_irqs, &s5pv210_pwm_variant);
175}
176
3fa754c2
KK
177/*
178 * s5pv210_map_io
939d28aa
KK
179 *
180 * register the standard cpu IO areas
3fa754c2 181 */
939d28aa 182
3fa754c2 183void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
939d28aa 184{
3fa754c2 185 /* initialize the io descriptors we need for initialization */
939d28aa 186 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
3fa754c2
KK
187 if (mach_desc)
188 iotable_init(mach_desc, size);
189
190 /* detect cpu id and rev. */
191 s5p_init_cpu(S5P_VA_CHIPID);
192
193 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
1c161fd0
TF
194
195 samsung_pwm_set_platdata(&s5pv210_pwm_variant);
3fa754c2
KK
196}
197
198void __init s5pv210_map_io(void)
199{
e6f66a9f
MS
200 /* initialise device information early */
201 s5pv210_default_sdhci0();
202 s5pv210_default_sdhci1();
203 s5pv210_default_sdhci2();
976a62f2 204 s5pv210_default_sdhci3();
e6f66a9f 205
a0428f3a 206 s3c_adc_setname("samsung-adc-v3");
50e9769a 207
4b9a5ad5
AK
208 s3c_cfcon_setname("s5pv210-pata");
209
d61bd77f
KK
210 s3c_fimc_setname(0, "s5pv210-fimc");
211 s3c_fimc_setname(1, "s5pv210-fimc");
212 s3c_fimc_setname(2, "s5pv210-fimc");
e6f66a9f 213
c8d833bf
MS
214 /* the i2c devices are directly compatible with s3c2440 */
215 s3c_i2c0_setname("s3c2440-i2c");
216 s3c_i2c1_setname("s3c2440-i2c");
217 s3c_i2c2_setname("s3c2440-i2c");
eb42b044
PO
218
219 s3c_fb_setname("s5pv210-fb");
636d1742 220
e7d0628c
JS
221 /* Use s5pv210-keypad instead of samsung-keypad */
222 samsung_keypad_setname("s5pv210-keypad");
fbf05563
TS
223
224 /* setup TV devices */
225 s5p_hdmi_setname("s5pv210-hdmi");
308b3afb
HS
226
227 s3c64xx_spi_setname("s5pv210-spi");
939d28aa
KK
228}
229
230void __init s5pv210_init_clocks(int xtal)
231{
232 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
233
234 s3c24xx_register_baseclocks(xtal);
235 s5p_register_clocks(xtal);
236 s5pv210_register_clocks();
237 s5pv210_setup_clocks();
238}
239
240void __init s5pv210_init_irq(void)
241{
242 u32 vic[4]; /* S5PV210 supports 4 VIC */
243
244 /* All the VICs are fully populated. */
245 vic[0] = ~0;
246 vic[1] = ~0;
247 vic[2] = ~0;
248 vic[3] = ~0;
249
250 s5p_init_irq(vic, ARRAY_SIZE(vic));
251}
252
4a858cfc
KS
253struct bus_type s5pv210_subsys = {
254 .name = "s5pv210-core",
255 .dev_name = "s5pv210-core",
939d28aa
KK
256};
257
4a858cfc
KS
258static struct device s5pv210_dev = {
259 .bus = &s5pv210_subsys,
939d28aa
KK
260};
261
262static int __init s5pv210_core_init(void)
263{
4a858cfc 264 return subsys_system_register(&s5pv210_subsys, NULL);
939d28aa 265}
939d28aa
KK
266core_initcall(s5pv210_core_init);
267
268int __init s5pv210_init(void)
269{
270 printk(KERN_INFO "S5PV210: Initializing architecture\n");
4a858cfc 271 return device_register(&s5pv210_dev);
939d28aa 272}
3fa754c2 273
3fa754c2
KK
274/* uart registration process */
275
276void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no)
277{
3fa754c2
KK
278 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
279}
This page took 0.259867 seconds and 5 git commands to generate.