[deliverable/linux.git] / arch / arm / mach-s5pv210 / include / mach / map.h

/* linux/arch/arm/mach-s5pv210/include/mach/map.h
 *
 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com/
 *
 * S5PV210 - Memory map definitions
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#ifndef __ASM_ARCH_MAP_H
#define __ASM_ARCH_MAP_H __FILE__

#include <plat/map-base.h>
#include <plat/map-s5p.h>

#define S5PV210_PA_SDRAM		0x20000000

#define S5PV210_PA_SROM_BANK5		0xA8000000

#define S5PC110_PA_ONENAND		0xB0000000
#define S5PC110_PA_ONENAND_DMA		0xB0600000

#define S5PV210_PA_CHIPID		0xE0000000

#define S5PV210_PA_SYSCON		0xE0100000

#define S5PV210_PA_GPIO			0xE0200000

#define S5PV210_PA_SPDIF		0xE1100000

#define S5PV210_PA_SPI0			0xE1300000
#define S5PV210_PA_SPI1			0xE1400000

#define S5PV210_PA_KEYPAD		0xE1600000

#define S5PV210_PA_ADC			0xE1700000

#define S5PV210_PA_IIC0			0xE1800000
#define S5PV210_PA_IIC1			0xFAB00000
#define S5PV210_PA_IIC2			0xE1A00000

#define S5PV210_PA_AC97			0xE2200000

#define S5PV210_PA_PCM0			0xE2300000
#define S5PV210_PA_PCM1			0xE1200000
#define S5PV210_PA_PCM2			0xE2B00000

#define S5PV210_PA_TIMER		0xE2500000
#define S5PV210_PA_SYSTIMER		0xE2600000
#define S5PV210_PA_WATCHDOG		0xE2700000
#define S5PV210_PA_RTC			0xE2800000

#define S5PV210_PA_UART			0xE2900000

#define S5PV210_PA_SROMC		0xE8000000

#define S5PV210_PA_CFCON		0xE8200000

#define S5PV210_PA_MFC			0xF1700000

#define S5PV210_PA_HSMMC(x)		(0xEB000000 + ((x) * 0x100000))

#define S5PV210_PA_HSOTG		0xEC000000
#define S5PV210_PA_HSPHY		0xEC100000

#define S5PV210_PA_IIS0			0xEEE30000
#define S5PV210_PA_IIS1			0xE2100000
#define S5PV210_PA_IIS2			0xE2A00000

#define S5PV210_PA_DMC0			0xF0000000
#define S5PV210_PA_DMC1			0xF1400000

#define S5PV210_PA_VIC0			0xF2000000
#define S5PV210_PA_VIC1			0xF2100000
#define S5PV210_PA_VIC2			0xF2200000
#define S5PV210_PA_VIC3			0xF2300000

#define S5PV210_PA_FB			0xF8000000

#define S5PV210_PA_MDMA			0xFA200000
#define S5PV210_PA_PDMA0		0xE0900000
#define S5PV210_PA_PDMA1		0xE0A00000

#define S5PV210_PA_MIPI_CSIS		0xFA600000

#define S5PV210_PA_FIMC0		0xFB200000
#define S5PV210_PA_FIMC1		0xFB300000
#define S5PV210_PA_FIMC2		0xFB400000

#define S5PV210_PA_SDO			0xF9000000
#define S5PV210_PA_VP			0xF9100000
#define S5PV210_PA_MIXER		0xF9200000
#define S5PV210_PA_HDMI			0xFA100000
#define S5PV210_PA_IIC_HDMIPHY		0xFA900000

/* Compatibiltiy Defines */

#define S3C_PA_FB			S5PV210_PA_FB
#define S3C_PA_HSMMC0			S5PV210_PA_HSMMC(0)
#define S3C_PA_HSMMC1			S5PV210_PA_HSMMC(1)
#define S3C_PA_HSMMC2			S5PV210_PA_HSMMC(2)
#define S3C_PA_HSMMC3			S5PV210_PA_HSMMC(3)
#define S3C_PA_IIC			S5PV210_PA_IIC0
#define S3C_PA_IIC1			S5PV210_PA_IIC1
#define S3C_PA_IIC2			S5PV210_PA_IIC2
#define S3C_PA_RTC			S5PV210_PA_RTC
#define S3C_PA_USB_HSOTG		S5PV210_PA_HSOTG
#define S3C_PA_WDT			S5PV210_PA_WATCHDOG

#define S5P_PA_CHIPID			S5PV210_PA_CHIPID
#define S5P_PA_FIMC0			S5PV210_PA_FIMC0
#define S5P_PA_FIMC1			S5PV210_PA_FIMC1
#define S5P_PA_FIMC2			S5PV210_PA_FIMC2
#define S5P_PA_MIPI_CSIS0		S5PV210_PA_MIPI_CSIS
#define S5P_PA_MFC			S5PV210_PA_MFC
#define S5P_PA_IIC_HDMIPHY		S5PV210_PA_IIC_HDMIPHY

#define S5P_PA_SDO			S5PV210_PA_SDO
#define S5P_PA_VP			S5PV210_PA_VP
#define S5P_PA_MIXER			S5PV210_PA_MIXER
#define S5P_PA_HDMI			S5PV210_PA_HDMI

#define S5P_PA_ONENAND			S5PC110_PA_ONENAND
#define S5P_PA_ONENAND_DMA		S5PC110_PA_ONENAND_DMA
#define S5P_PA_SDRAM			S5PV210_PA_SDRAM
#define S5P_PA_SROMC			S5PV210_PA_SROMC
#define S5P_PA_SYSCON			S5PV210_PA_SYSCON
#define S5P_PA_TIMER			S5PV210_PA_TIMER

#define SAMSUNG_PA_ADC			S5PV210_PA_ADC
#define SAMSUNG_PA_CFCON		S5PV210_PA_CFCON
#define SAMSUNG_PA_KEYPAD		S5PV210_PA_KEYPAD

/* UART */

#define S3C_VA_UARTx(x)			(S3C_VA_UART + ((x) * S3C_UART_OFFSET))

#define S3C_PA_UART			S5PV210_PA_UART

#define S5P_PA_UART(x)			(S3C_PA_UART + ((x) * S3C_UART_OFFSET))
#define S5P_PA_UART0			S5P_PA_UART(0)
#define S5P_PA_UART1			S5P_PA_UART(1)
#define S5P_PA_UART2			S5P_PA_UART(2)
#define S5P_PA_UART3			S5P_PA_UART(3)

#define S5P_SZ_UART			SZ_256

#endif /* __ASM_ARCH_MAP_H */
Commit	Line	Data
939d28aa KK	1	/* linux/arch/arm/mach-s5pv210/include/mach/map.h
939d28aa KK	2	*
ece3410e	3	* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
939d28aa KK	4	* http://www.samsung.com/
	5	*
	6	* S5PV210 - Memory map definitions
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
	13	#ifndef __ASM_ARCH_MAP_H
	14	#define __ASM_ARCH_MAP_H __FILE__
	15
	16	#include <plat/map-base.h>
	17	#include <plat/map-s5p.h>
	18
ece3410e	19	#define S5PV210_PA_SDRAM 0x20000000
9b580cdb	20
ece3410e	21	#define S5PV210_PA_SROM_BANK5 0xA8000000
13904fba	22
ece3410e KK	23	#define S5PC110_PA_ONENAND 0xB0000000
ece3410e KK	24	#define S5PC110_PA_ONENAND_DMA 0xB0600000
999304be	25
ece3410e	26	#define S5PV210_PA_CHIPID 0xE0000000
939d28aa	27
ece3410e	28	#define S5PV210_PA_SYSCON 0xE0100000
939d28aa	29
ece3410e	30	#define S5PV210_PA_GPIO 0xE0200000
939d28aa	31
ece3410e	32	#define S5PV210_PA_SPDIF 0xE1100000
f0c303a6	33
ece3410e KK	34	#define S5PV210_PA_SPI0 0xE1300000
ece3410e KK	35	#define S5PV210_PA_SPI1 0xE1400000
e7d0628c	36
ece3410e	37	#define S5PV210_PA_KEYPAD 0xE1600000
939d28aa	38
ece3410e	39	#define S5PV210_PA_ADC 0xE1700000
939d28aa	40
ece3410e KK	41	#define S5PV210_PA_IIC0 0xE1800000
	42	#define S5PV210_PA_IIC1 0xFAB00000
	43	#define S5PV210_PA_IIC2 0xE1A00000
939d28aa	44
ece3410e	45	#define S5PV210_PA_AC97 0xE2200000
5b7d7b22	46
ece3410e KK	47	#define S5PV210_PA_PCM0 0xE2300000
	48	#define S5PV210_PA_PCM1 0xE1200000
	49	#define S5PV210_PA_PCM2 0xE2B00000
939d28aa	50
ece3410e KK	51	#define S5PV210_PA_TIMER 0xE2500000
	52	#define S5PV210_PA_SYSTIMER 0xE2600000
	53	#define S5PV210_PA_WATCHDOG 0xE2700000
	54	#define S5PV210_PA_RTC 0xE2800000
939d28aa	55
ece3410e	56	#define S5PV210_PA_UART 0xE2900000
939d28aa	57
ece3410e	58	#define S5PV210_PA_SROMC 0xE8000000
dc425471	59
ece3410e	60	#define S5PV210_PA_CFCON 0xE8200000
939d28aa	61
0f75a96b KD	62	#define S5PV210_PA_MFC 0xF1700000
0f75a96b KD	63
ece3410e	64	#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000))
4b9a5ad5	65
ece3410e KK	66	#define S5PV210_PA_HSOTG 0xEC000000
ece3410e KK	67	#define S5PV210_PA_HSPHY 0xEC100000
7d1a2077	68
ece3410e KK	69	#define S5PV210_PA_IIS0 0xEEE30000
	70	#define S5PV210_PA_IIS1 0xE2100000
	71	#define S5PV210_PA_IIS2 0xE2A00000
5b696a67	72
ece3410e KK	73	#define S5PV210_PA_DMC0 0xF0000000
ece3410e KK	74	#define S5PV210_PA_DMC1 0xF1400000
33c14ff8	75
ece3410e KK	76	#define S5PV210_PA_VIC0 0xF2000000
	77	#define S5PV210_PA_VIC1 0xF2100000
	78	#define S5PV210_PA_VIC2 0xF2200000
	79	#define S5PV210_PA_VIC3 0xF2300000
e6f66a9f	80
ece3410e	81	#define S5PV210_PA_FB 0xF8000000
ca1931ca	82
ece3410e KK	83	#define S5PV210_PA_MDMA 0xFA200000
	84	#define S5PV210_PA_PDMA0 0xE0900000
	85	#define S5PV210_PA_PDMA1 0xE0A00000
939d28aa	86
ece3410e	87	#define S5PV210_PA_MIPI_CSIS 0xFA600000
939d28aa	88
ece3410e KK	89	#define S5PV210_PA_FIMC0 0xFB200000
	90	#define S5PV210_PA_FIMC1 0xFB300000
	91	#define S5PV210_PA_FIMC2 0xFB400000
494edadd	92
fbf05563 TS	93	#define S5PV210_PA_SDO 0xF9000000
	94	#define S5PV210_PA_VP 0xF9100000
	95	#define S5PV210_PA_MIXER 0xF9200000
	96	#define S5PV210_PA_HDMI 0xFA100000
c40e7e0d TS	97	#define S5PV210_PA_IIC_HDMIPHY 0xFA900000
c40e7e0d TS	98
ece3410e	99	/* Compatibiltiy Defines */
602bf0cf	100
ece3410e KK	101	#define S3C_PA_FB S5PV210_PA_FB
	102	#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0)
	103	#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1)
	104	#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2)
	105	#define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3)
	106	#define S3C_PA_IIC S5PV210_PA_IIC0
	107	#define S3C_PA_IIC1 S5PV210_PA_IIC1
	108	#define S3C_PA_IIC2 S5PV210_PA_IIC2
	109	#define S3C_PA_RTC S5PV210_PA_RTC
	110	#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG
	111	#define S3C_PA_WDT S5PV210_PA_WATCHDOG
602bf0cf	112
ece3410e KK	113	#define S5P_PA_CHIPID S5PV210_PA_CHIPID
	114	#define S5P_PA_FIMC0 S5PV210_PA_FIMC0
	115	#define S5P_PA_FIMC1 S5PV210_PA_FIMC1
	116	#define S5P_PA_FIMC2 S5PV210_PA_FIMC2
	117	#define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS
0f75a96b	118	#define S5P_PA_MFC S5PV210_PA_MFC
c40e7e0d	119	#define S5P_PA_IIC_HDMIPHY S5PV210_PA_IIC_HDMIPHY
fbf05563 TS	120
	121	#define S5P_PA_SDO S5PV210_PA_SDO
	122	#define S5P_PA_VP S5PV210_PA_VP
	123	#define S5P_PA_MIXER S5PV210_PA_MIXER
	124	#define S5P_PA_HDMI S5PV210_PA_HDMI
	125
ece3410e KK	126	#define S5P_PA_ONENAND S5PC110_PA_ONENAND
	127	#define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA
	128	#define S5P_PA_SDRAM S5PV210_PA_SDRAM
	129	#define S5P_PA_SROMC S5PV210_PA_SROMC
	130	#define S5P_PA_SYSCON S5PV210_PA_SYSCON
	131	#define S5P_PA_TIMER S5PV210_PA_TIMER
602bf0cf	132
ece3410e KK	133	#define SAMSUNG_PA_ADC S5PV210_PA_ADC
	134	#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON
	135	#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD
41d8289d	136
ece3410e	137	/* UART */
1d826d14	138
ece3410e	139	#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
5905bbfa	140
ece3410e	141	#define S3C_PA_UART S5PV210_PA_UART
939d28aa	142
ece3410e KK	143	#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
	144	#define S5P_PA_UART0 S5P_PA_UART(0)
	145	#define S5P_PA_UART1 S5P_PA_UART(1)
	146	#define S5P_PA_UART2 S5P_PA_UART(2)
	147	#define S5P_PA_UART3 S5P_PA_UART(3)
	148
	149	#define S5P_SZ_UART SZ_256
939d28aa KK	150
939d28aa KK	151	#endif /* __ASM_ARCH_MAP_H */