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d947e792 MS |
1 | /* linux/arch/arm/mach-s5pv210/mach-aquila.c |
2 | * | |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com/ | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/serial_core.h> | |
b315032f | 15 | #include <linux/fb.h> |
a1660c12 MS |
16 | #include <linux/i2c.h> |
17 | #include <linux/i2c-gpio.h> | |
18 | #include <linux/mfd/max8998.h> | |
80849798 CC |
19 | #include <linux/mfd/wm8994/pdata.h> |
20 | #include <linux/regulator/fixed.h> | |
a1660c12 MS |
21 | #include <linux/gpio_keys.h> |
22 | #include <linux/input.h> | |
23 | #include <linux/gpio.h> | |
d947e792 MS |
24 | |
25 | #include <asm/mach/arch.h> | |
26 | #include <asm/mach/map.h> | |
27 | #include <asm/setup.h> | |
28 | #include <asm/mach-types.h> | |
29 | ||
5a213a55 | 30 | #include <video/samsung_fimd.h> |
d947e792 MS |
31 | #include <mach/map.h> |
32 | #include <mach/regs-clock.h> | |
33 | ||
a1660c12 | 34 | #include <plat/gpio-cfg.h> |
d947e792 | 35 | #include <plat/regs-serial.h> |
d947e792 MS |
36 | #include <plat/devs.h> |
37 | #include <plat/cpu.h> | |
b315032f | 38 | #include <plat/fb.h> |
187749bb | 39 | #include <plat/fimc-core.h> |
ba3fbef9 | 40 | #include <plat/sdhci.h> |
20780fcc | 41 | #include <plat/s5p-time.h> |
d947e792 | 42 | |
3fa754c2 KK |
43 | #include "common.h" |
44 | ||
d947e792 | 45 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
c8def085 | 46 | #define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
d947e792 MS |
47 | S3C2410_UCON_RXILEVEL | \ |
48 | S3C2410_UCON_TXIRQMODE | \ | |
49 | S3C2410_UCON_RXIRQMODE | \ | |
50 | S3C2410_UCON_RXFIFO_TOI | \ | |
51 | S3C2443_UCON_RXERR_IRQEN) | |
52 | ||
c8def085 | 53 | #define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8 |
d947e792 | 54 | |
f2b7e3c5 | 55 | #define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE |
d947e792 | 56 | |
df01714a | 57 | static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = { |
d947e792 MS |
58 | [0] = { |
59 | .hwport = 0, | |
60 | .flags = 0, | |
c8def085 KK |
61 | .ucon = AQUILA_UCON_DEFAULT, |
62 | .ulcon = AQUILA_ULCON_DEFAULT, | |
df01714a JS |
63 | /* |
64 | * Actually UART0 can support 256 bytes fifo, but aquila board | |
65 | * supports 128 bytes fifo because of initial chip bug | |
66 | */ | |
f2b7e3c5 | 67 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 68 | S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128, |
d947e792 MS |
69 | }, |
70 | [1] = { | |
71 | .hwport = 1, | |
72 | .flags = 0, | |
c8def085 KK |
73 | .ucon = AQUILA_UCON_DEFAULT, |
74 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 75 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 76 | S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64, |
d947e792 MS |
77 | }, |
78 | [2] = { | |
79 | .hwport = 2, | |
80 | .flags = 0, | |
c8def085 KK |
81 | .ucon = AQUILA_UCON_DEFAULT, |
82 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 83 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 84 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, |
d947e792 MS |
85 | }, |
86 | [3] = { | |
87 | .hwport = 3, | |
88 | .flags = 0, | |
c8def085 KK |
89 | .ucon = AQUILA_UCON_DEFAULT, |
90 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 91 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 92 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, |
d947e792 MS |
93 | }, |
94 | }; | |
95 | ||
b315032f MS |
96 | /* Frame Buffer */ |
97 | static struct s3c_fb_pd_win aquila_fb_win0 = { | |
b315032f MS |
98 | .max_bpp = 32, |
99 | .default_bpp = 16, | |
79d3c41a TA |
100 | .xres = 480, |
101 | .yres = 800, | |
b315032f MS |
102 | }; |
103 | ||
104 | static struct s3c_fb_pd_win aquila_fb_win1 = { | |
b315032f MS |
105 | .max_bpp = 32, |
106 | .default_bpp = 16, | |
79d3c41a TA |
107 | .xres = 480, |
108 | .yres = 800, | |
109 | }; | |
110 | ||
111 | static struct fb_videomode aquila_lcd_timing = { | |
112 | .left_margin = 16, | |
113 | .right_margin = 16, | |
114 | .upper_margin = 3, | |
115 | .lower_margin = 28, | |
116 | .hsync_len = 2, | |
117 | .vsync_len = 2, | |
118 | .xres = 480, | |
119 | .yres = 800, | |
b315032f MS |
120 | }; |
121 | ||
122 | static struct s3c_fb_platdata aquila_lcd_pdata __initdata = { | |
123 | .win[0] = &aquila_fb_win0, | |
124 | .win[1] = &aquila_fb_win1, | |
79d3c41a | 125 | .vtiming = &aquila_lcd_timing, |
b315032f MS |
126 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, |
127 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | | |
128 | VIDCON1_INV_VCLK | VIDCON1_INV_VDEN, | |
129 | .setup_gpio = s5pv210_fb_gpio_setup_24bpp, | |
130 | }; | |
131 | ||
a1660c12 MS |
132 | /* MAX8998 regulators */ |
133 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | |
134 | ||
135 | static struct regulator_init_data aquila_ldo2_data = { | |
136 | .constraints = { | |
137 | .name = "VALIVE_1.1V", | |
138 | .min_uV = 1100000, | |
139 | .max_uV = 1100000, | |
140 | .apply_uV = 1, | |
141 | .always_on = 1, | |
142 | .state_mem = { | |
143 | .enabled = 1, | |
144 | }, | |
145 | }, | |
146 | }; | |
147 | ||
148 | static struct regulator_init_data aquila_ldo3_data = { | |
149 | .constraints = { | |
d1061331 | 150 | .name = "VUSB+MIPI_1.1V", |
a1660c12 MS |
151 | .min_uV = 1100000, |
152 | .max_uV = 1100000, | |
153 | .apply_uV = 1, | |
154 | .always_on = 1, | |
155 | }, | |
156 | }; | |
157 | ||
158 | static struct regulator_init_data aquila_ldo4_data = { | |
159 | .constraints = { | |
160 | .name = "VDAC_3.3V", | |
161 | .min_uV = 3300000, | |
162 | .max_uV = 3300000, | |
163 | .apply_uV = 1, | |
164 | }, | |
165 | }; | |
166 | ||
167 | static struct regulator_init_data aquila_ldo5_data = { | |
168 | .constraints = { | |
169 | .name = "VTF_2.8V", | |
170 | .min_uV = 2800000, | |
171 | .max_uV = 2800000, | |
172 | .apply_uV = 1, | |
173 | }, | |
174 | }; | |
175 | ||
176 | static struct regulator_init_data aquila_ldo6_data = { | |
177 | .constraints = { | |
178 | .name = "VCC_3.3V", | |
179 | .min_uV = 3300000, | |
180 | .max_uV = 3300000, | |
181 | .apply_uV = 1, | |
182 | }, | |
183 | }; | |
184 | ||
185 | static struct regulator_init_data aquila_ldo7_data = { | |
186 | .constraints = { | |
187 | .name = "VCC_3.0V", | |
188 | .min_uV = 3000000, | |
189 | .max_uV = 3000000, | |
190 | .apply_uV = 1, | |
191 | .boot_on = 1, | |
192 | .always_on = 1, | |
193 | }, | |
194 | }; | |
195 | ||
196 | static struct regulator_init_data aquila_ldo8_data = { | |
197 | .constraints = { | |
d1061331 | 198 | .name = "VUSB+VADC_3.3V", |
a1660c12 MS |
199 | .min_uV = 3300000, |
200 | .max_uV = 3300000, | |
201 | .apply_uV = 1, | |
202 | .always_on = 1, | |
203 | }, | |
204 | }; | |
205 | ||
206 | static struct regulator_init_data aquila_ldo9_data = { | |
207 | .constraints = { | |
d1061331 | 208 | .name = "VCC+VCAM_2.8V", |
a1660c12 MS |
209 | .min_uV = 2800000, |
210 | .max_uV = 2800000, | |
211 | .apply_uV = 1, | |
212 | .always_on = 1, | |
213 | }, | |
214 | }; | |
215 | ||
216 | static struct regulator_init_data aquila_ldo10_data = { | |
217 | .constraints = { | |
218 | .name = "VPLL_1.1V", | |
219 | .min_uV = 1100000, | |
220 | .max_uV = 1100000, | |
221 | .apply_uV = 1, | |
222 | .boot_on = 1, | |
223 | }, | |
224 | }; | |
225 | ||
226 | static struct regulator_init_data aquila_ldo11_data = { | |
227 | .constraints = { | |
228 | .name = "CAM_IO_2.8V", | |
229 | .min_uV = 2800000, | |
230 | .max_uV = 2800000, | |
231 | .apply_uV = 1, | |
232 | .always_on = 1, | |
233 | }, | |
234 | }; | |
235 | ||
236 | static struct regulator_init_data aquila_ldo12_data = { | |
237 | .constraints = { | |
238 | .name = "CAM_ISP_1.2V", | |
239 | .min_uV = 1200000, | |
240 | .max_uV = 1200000, | |
241 | .apply_uV = 1, | |
242 | .always_on = 1, | |
243 | }, | |
244 | }; | |
245 | ||
246 | static struct regulator_init_data aquila_ldo13_data = { | |
247 | .constraints = { | |
248 | .name = "CAM_A_2.8V", | |
249 | .min_uV = 2800000, | |
250 | .max_uV = 2800000, | |
251 | .apply_uV = 1, | |
252 | .always_on = 1, | |
253 | }, | |
254 | }; | |
255 | ||
256 | static struct regulator_init_data aquila_ldo14_data = { | |
257 | .constraints = { | |
258 | .name = "CAM_CIF_1.8V", | |
259 | .min_uV = 1800000, | |
260 | .max_uV = 1800000, | |
261 | .apply_uV = 1, | |
262 | .always_on = 1, | |
263 | }, | |
264 | }; | |
265 | ||
266 | static struct regulator_init_data aquila_ldo15_data = { | |
267 | .constraints = { | |
268 | .name = "CAM_AF_3.3V", | |
269 | .min_uV = 3300000, | |
270 | .max_uV = 3300000, | |
271 | .apply_uV = 1, | |
272 | .always_on = 1, | |
273 | }, | |
274 | }; | |
275 | ||
276 | static struct regulator_init_data aquila_ldo16_data = { | |
277 | .constraints = { | |
278 | .name = "VMIPI_1.8V", | |
279 | .min_uV = 1800000, | |
280 | .max_uV = 1800000, | |
281 | .apply_uV = 1, | |
282 | .always_on = 1, | |
283 | }, | |
284 | }; | |
285 | ||
286 | static struct regulator_init_data aquila_ldo17_data = { | |
287 | .constraints = { | |
288 | .name = "CAM_8M_1.8V", | |
289 | .min_uV = 1800000, | |
290 | .max_uV = 1800000, | |
291 | .apply_uV = 1, | |
292 | .always_on = 1, | |
293 | }, | |
294 | }; | |
295 | ||
296 | /* BUCK */ | |
d3f9c570 KK |
297 | static struct regulator_consumer_supply buck1_consumer = |
298 | REGULATOR_SUPPLY("vddarm", NULL); | |
a1660c12 | 299 | |
d3f9c570 KK |
300 | static struct regulator_consumer_supply buck2_consumer = |
301 | REGULATOR_SUPPLY("vddint", NULL); | |
a1660c12 MS |
302 | |
303 | static struct regulator_init_data aquila_buck1_data = { | |
304 | .constraints = { | |
305 | .name = "VARM_1.2V", | |
306 | .min_uV = 1200000, | |
307 | .max_uV = 1200000, | |
308 | .apply_uV = 1, | |
309 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
310 | REGULATOR_CHANGE_STATUS, | |
311 | }, | |
d3f9c570 KK |
312 | .num_consumer_supplies = 1, |
313 | .consumer_supplies = &buck1_consumer, | |
a1660c12 MS |
314 | }; |
315 | ||
316 | static struct regulator_init_data aquila_buck2_data = { | |
317 | .constraints = { | |
318 | .name = "VINT_1.2V", | |
319 | .min_uV = 1200000, | |
320 | .max_uV = 1200000, | |
321 | .apply_uV = 1, | |
322 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
323 | REGULATOR_CHANGE_STATUS, | |
324 | }, | |
d3f9c570 KK |
325 | .num_consumer_supplies = 1, |
326 | .consumer_supplies = &buck2_consumer, | |
a1660c12 MS |
327 | }; |
328 | ||
329 | static struct regulator_init_data aquila_buck3_data = { | |
330 | .constraints = { | |
331 | .name = "VCC_1.8V", | |
332 | .min_uV = 1800000, | |
333 | .max_uV = 1800000, | |
334 | .apply_uV = 1, | |
335 | .state_mem = { | |
336 | .enabled = 1, | |
337 | }, | |
338 | }, | |
339 | }; | |
340 | ||
341 | static struct regulator_init_data aquila_buck4_data = { | |
342 | .constraints = { | |
343 | .name = "CAM_CORE_1.2V", | |
344 | .min_uV = 1200000, | |
345 | .max_uV = 1200000, | |
346 | .apply_uV = 1, | |
347 | .always_on = 1, | |
348 | }, | |
349 | }; | |
350 | ||
351 | static struct max8998_regulator_data aquila_regulators[] = { | |
352 | { MAX8998_LDO2, &aquila_ldo2_data }, | |
353 | { MAX8998_LDO3, &aquila_ldo3_data }, | |
354 | { MAX8998_LDO4, &aquila_ldo4_data }, | |
355 | { MAX8998_LDO5, &aquila_ldo5_data }, | |
356 | { MAX8998_LDO6, &aquila_ldo6_data }, | |
357 | { MAX8998_LDO7, &aquila_ldo7_data }, | |
358 | { MAX8998_LDO8, &aquila_ldo8_data }, | |
359 | { MAX8998_LDO9, &aquila_ldo9_data }, | |
360 | { MAX8998_LDO10, &aquila_ldo10_data }, | |
361 | { MAX8998_LDO11, &aquila_ldo11_data }, | |
362 | { MAX8998_LDO12, &aquila_ldo12_data }, | |
363 | { MAX8998_LDO13, &aquila_ldo13_data }, | |
364 | { MAX8998_LDO14, &aquila_ldo14_data }, | |
365 | { MAX8998_LDO15, &aquila_ldo15_data }, | |
366 | { MAX8998_LDO16, &aquila_ldo16_data }, | |
367 | { MAX8998_LDO17, &aquila_ldo17_data }, | |
368 | { MAX8998_BUCK1, &aquila_buck1_data }, | |
369 | { MAX8998_BUCK2, &aquila_buck2_data }, | |
370 | { MAX8998_BUCK3, &aquila_buck3_data }, | |
371 | { MAX8998_BUCK4, &aquila_buck4_data }, | |
372 | }; | |
373 | ||
374 | static struct max8998_platform_data aquila_max8998_pdata = { | |
375 | .num_regulators = ARRAY_SIZE(aquila_regulators), | |
376 | .regulators = aquila_regulators, | |
cb186886 MS |
377 | .buck1_set1 = S5PV210_GPH0(3), |
378 | .buck1_set2 = S5PV210_GPH0(4), | |
379 | .buck2_set3 = S5PV210_GPH0(5), | |
979f395d MS |
380 | .buck1_voltage1 = 1200000, |
381 | .buck1_voltage2 = 1200000, | |
382 | .buck1_voltage3 = 1200000, | |
383 | .buck1_voltage4 = 1200000, | |
384 | .buck2_voltage1 = 1200000, | |
385 | .buck2_voltage2 = 1200000, | |
a1660c12 MS |
386 | }; |
387 | #endif | |
388 | ||
80849798 | 389 | static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = { |
d3f9c570 KK |
390 | REGULATOR_SUPPLY("DBVDD", "5-001a"), |
391 | REGULATOR_SUPPLY("AVDD2", "5-001a"), | |
392 | REGULATOR_SUPPLY("CPVDD", "5-001a"), | |
80849798 CC |
393 | }; |
394 | ||
395 | static struct regulator_consumer_supply wm8994_fixed_voltage1_supplies[] = { | |
d3f9c570 KK |
396 | REGULATOR_SUPPLY("SPKVDD1", "5-001a"), |
397 | REGULATOR_SUPPLY("SPKVDD2", "5-001a"), | |
80849798 CC |
398 | }; |
399 | ||
400 | static struct regulator_init_data wm8994_fixed_voltage0_init_data = { | |
401 | .constraints = { | |
402 | .always_on = 1, | |
403 | }, | |
404 | .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage0_supplies), | |
405 | .consumer_supplies = wm8994_fixed_voltage0_supplies, | |
406 | }; | |
407 | ||
408 | static struct regulator_init_data wm8994_fixed_voltage1_init_data = { | |
409 | .constraints = { | |
410 | .always_on = 1, | |
411 | }, | |
412 | .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage1_supplies), | |
413 | .consumer_supplies = wm8994_fixed_voltage1_supplies, | |
414 | }; | |
415 | ||
416 | static struct fixed_voltage_config wm8994_fixed_voltage0_config = { | |
417 | .supply_name = "VCC_1.8V_PDA", | |
418 | .microvolts = 1800000, | |
419 | .gpio = -EINVAL, | |
420 | .init_data = &wm8994_fixed_voltage0_init_data, | |
421 | }; | |
422 | ||
423 | static struct fixed_voltage_config wm8994_fixed_voltage1_config = { | |
424 | .supply_name = "V_BAT", | |
425 | .microvolts = 3700000, | |
426 | .gpio = -EINVAL, | |
427 | .init_data = &wm8994_fixed_voltage1_init_data, | |
428 | }; | |
429 | ||
430 | static struct platform_device wm8994_fixed_voltage0 = { | |
431 | .name = "reg-fixed-voltage", | |
432 | .id = 0, | |
433 | .dev = { | |
434 | .platform_data = &wm8994_fixed_voltage0_config, | |
435 | }, | |
436 | }; | |
437 | ||
438 | static struct platform_device wm8994_fixed_voltage1 = { | |
439 | .name = "reg-fixed-voltage", | |
440 | .id = 1, | |
441 | .dev = { | |
442 | .platform_data = &wm8994_fixed_voltage1_config, | |
443 | }, | |
444 | }; | |
445 | ||
d3f9c570 KK |
446 | static struct regulator_consumer_supply wm8994_avdd1_supply = |
447 | REGULATOR_SUPPLY("AVDD1", "5-001a"); | |
80849798 | 448 | |
d3f9c570 KK |
449 | static struct regulator_consumer_supply wm8994_dcvdd_supply = |
450 | REGULATOR_SUPPLY("DCVDD", "5-001a"); | |
80849798 CC |
451 | |
452 | static struct regulator_init_data wm8994_ldo1_data = { | |
453 | .constraints = { | |
454 | .name = "AVDD1_3.0V", | |
455 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
456 | }, | |
457 | .num_consumer_supplies = 1, | |
458 | .consumer_supplies = &wm8994_avdd1_supply, | |
459 | }; | |
460 | ||
461 | static struct regulator_init_data wm8994_ldo2_data = { | |
462 | .constraints = { | |
463 | .name = "DCVDD_1.0V", | |
464 | }, | |
465 | .num_consumer_supplies = 1, | |
466 | .consumer_supplies = &wm8994_dcvdd_supply, | |
467 | }; | |
468 | ||
469 | static struct wm8994_pdata wm8994_platform_data = { | |
470 | /* configure gpio1 function: 0x0001(Logic level input/output) */ | |
471 | .gpio_defaults[0] = 0x0001, | |
472 | /* configure gpio3/4/5/7 function for AIF2 voice */ | |
473 | .gpio_defaults[2] = 0x8100, | |
474 | .gpio_defaults[3] = 0x8100, | |
475 | .gpio_defaults[4] = 0x8100, | |
476 | .gpio_defaults[6] = 0x0100, | |
477 | /* configure gpio8/9/10/11 function for AIF3 BT */ | |
478 | .gpio_defaults[7] = 0x8100, | |
479 | .gpio_defaults[8] = 0x0100, | |
480 | .gpio_defaults[9] = 0x0100, | |
481 | .gpio_defaults[10] = 0x0100, | |
70499329 KK |
482 | .ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */ |
483 | .ldo[1] = { 0, &wm8994_ldo2_data }, | |
80849798 CC |
484 | }; |
485 | ||
a1660c12 MS |
486 | /* GPIO I2C PMIC */ |
487 | #define AP_I2C_GPIO_PMIC_BUS_4 4 | |
488 | static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = { | |
489 | .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */ | |
490 | .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */ | |
491 | }; | |
492 | ||
493 | static struct platform_device aquila_i2c_gpio_pmic = { | |
494 | .name = "i2c-gpio", | |
495 | .id = AP_I2C_GPIO_PMIC_BUS_4, | |
496 | .dev = { | |
497 | .platform_data = &aquila_i2c_gpio_pmic_data, | |
498 | }, | |
499 | }; | |
500 | ||
501 | static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = { | |
502 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | |
503 | { | |
504 | /* 0xCC when SRAD = 0 */ | |
505 | I2C_BOARD_INFO("max8998", 0xCC >> 1), | |
506 | .platform_data = &aquila_max8998_pdata, | |
507 | }, | |
508 | #endif | |
509 | }; | |
510 | ||
5112267e CC |
511 | /* GPIO I2C AP 1.8V */ |
512 | #define AP_I2C_GPIO_BUS_5 5 | |
513 | static struct i2c_gpio_platform_data aquila_i2c_gpio5_data = { | |
514 | .sda_pin = S5PV210_MP05(3), /* XM0ADDR_11 */ | |
515 | .scl_pin = S5PV210_MP05(2), /* XM0ADDR_10 */ | |
516 | }; | |
517 | ||
518 | static struct platform_device aquila_i2c_gpio5 = { | |
519 | .name = "i2c-gpio", | |
520 | .id = AP_I2C_GPIO_BUS_5, | |
521 | .dev = { | |
522 | .platform_data = &aquila_i2c_gpio5_data, | |
523 | }, | |
524 | }; | |
525 | ||
526 | static struct i2c_board_info i2c_gpio5_devs[] __initdata = { | |
527 | { | |
528 | /* CS/ADDR = low 0x34 (FYI: high = 0x36) */ | |
529 | I2C_BOARD_INFO("wm8994", 0x1a), | |
80849798 | 530 | .platform_data = &wm8994_platform_data, |
5112267e CC |
531 | }, |
532 | }; | |
533 | ||
a1660c12 MS |
534 | /* PMIC Power button */ |
535 | static struct gpio_keys_button aquila_gpio_keys_table[] = { | |
536 | { | |
537 | .code = KEY_POWER, | |
538 | .gpio = S5PV210_GPH2(6), | |
539 | .desc = "gpio-keys: KEY_POWER", | |
540 | .type = EV_KEY, | |
541 | .active_low = 1, | |
542 | .wakeup = 1, | |
543 | .debounce_interval = 1, | |
544 | }, | |
545 | }; | |
546 | ||
547 | static struct gpio_keys_platform_data aquila_gpio_keys_data = { | |
548 | .buttons = aquila_gpio_keys_table, | |
549 | .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table), | |
550 | }; | |
551 | ||
552 | static struct platform_device aquila_device_gpiokeys = { | |
553 | .name = "gpio-keys", | |
554 | .dev = { | |
555 | .platform_data = &aquila_gpio_keys_data, | |
556 | }, | |
557 | }; | |
558 | ||
559 | static void __init aquila_pmic_init(void) | |
560 | { | |
561 | /* AP_PMIC_IRQ: EINT7 */ | |
562 | s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf)); | |
563 | s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP); | |
564 | ||
565 | /* nPower: EINT22 */ | |
566 | s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf)); | |
567 | s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP); | |
568 | } | |
569 | ||
ba3fbef9 MS |
570 | /* MoviNAND */ |
571 | static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = { | |
572 | .max_width = 4, | |
573 | .cd_type = S3C_SDHCI_CD_PERMANENT, | |
574 | }; | |
575 | ||
576 | /* Wireless LAN */ | |
577 | static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = { | |
578 | .max_width = 4, | |
579 | .cd_type = S3C_SDHCI_CD_EXTERNAL, | |
580 | /* ext_cd_{init,cleanup} callbacks will be added later */ | |
581 | }; | |
582 | ||
583 | /* External Flash */ | |
584 | #define AQUILA_EXT_FLASH_EN S5PV210_MP05(4) | |
585 | #define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4) | |
586 | static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = { | |
587 | .max_width = 4, | |
588 | .cd_type = S3C_SDHCI_CD_GPIO, | |
589 | .ext_cd_gpio = AQUILA_EXT_FLASH_CD, | |
590 | .ext_cd_gpio_invert = 1, | |
591 | }; | |
592 | ||
593 | static void aquila_setup_sdhci(void) | |
594 | { | |
2f4f0b42 | 595 | gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN"); |
ba3fbef9 MS |
596 | |
597 | s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); | |
598 | s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); | |
599 | s3c_sdhci2_set_platdata(&aquila_hsmmc2_data); | |
600 | }; | |
601 | ||
c01c4692 SK |
602 | /* Audio device */ |
603 | static struct platform_device aquila_device_audio = { | |
604 | .name = "smdk-audio", | |
605 | .id = -1, | |
606 | }; | |
607 | ||
d947e792 | 608 | static struct platform_device *aquila_devices[] __initdata = { |
a1660c12 | 609 | &aquila_i2c_gpio_pmic, |
5112267e | 610 | &aquila_i2c_gpio5, |
a1660c12 | 611 | &aquila_device_gpiokeys, |
c01c4692 | 612 | &aquila_device_audio, |
b315032f | 613 | &s3c_device_fb, |
13904fba | 614 | &s5p_device_onenand, |
ba3fbef9 MS |
615 | &s3c_device_hsmmc0, |
616 | &s3c_device_hsmmc1, | |
617 | &s3c_device_hsmmc2, | |
7200c11d SN |
618 | &s5p_device_fimc0, |
619 | &s5p_device_fimc1, | |
620 | &s5p_device_fimc2, | |
48c18756 | 621 | &s5p_device_fimc_md, |
6c29e71c | 622 | &s5pv210_device_iis0, |
80849798 CC |
623 | &wm8994_fixed_voltage0, |
624 | &wm8994_fixed_voltage1, | |
d947e792 MS |
625 | }; |
626 | ||
6c29e71c CC |
627 | static void __init aquila_sound_init(void) |
628 | { | |
629 | unsigned int gpio; | |
630 | ||
631 | /* CODEC_XTAL_EN | |
632 | * | |
633 | * The Aquila board have a oscillator which provide main clock | |
634 | * to WM8994 codec. The oscillator provide 24MHz clock to WM8994 | |
635 | * clock. Set gpio setting of "CODEC_XTAL_EN" to enable a oscillator. | |
636 | * */ | |
637 | gpio = S5PV210_GPH3(2); /* XEINT_26 */ | |
638 | gpio_request(gpio, "CODEC_XTAL_EN"); | |
639 | s3c_gpio_cfgpin(gpio, S3C_GPIO_OUTPUT); | |
640 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | |
641 | ||
642 | /* Ths main clock of WM8994 codec uses the output of CLKOUT pin. | |
643 | * The CLKOUT[9:8] set to 0x3(XUSBXTI) of 0xE010E000(OTHERS) | |
644 | * because it needs 24MHz clock to operate WM8994 codec. | |
645 | */ | |
646 | __raw_writel(__raw_readl(S5P_OTHERS) | (0x3 << 8), S5P_OTHERS); | |
647 | } | |
648 | ||
d947e792 MS |
649 | static void __init aquila_map_io(void) |
650 | { | |
3fa754c2 | 651 | s5pv210_init_io(NULL, 0); |
d947e792 | 652 | s3c24xx_init_clocks(24000000); |
df01714a | 653 | s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); |
20780fcc | 654 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); |
d947e792 MS |
655 | } |
656 | ||
657 | static void __init aquila_machine_init(void) | |
658 | { | |
a1660c12 MS |
659 | /* PMIC */ |
660 | aquila_pmic_init(); | |
661 | i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs, | |
662 | ARRAY_SIZE(i2c_gpio_pmic_devs)); | |
ba3fbef9 MS |
663 | /* SDHCI */ |
664 | aquila_setup_sdhci(); | |
a1660c12 | 665 | |
187749bb SN |
666 | s3c_fimc_setname(0, "s5p-fimc"); |
667 | s3c_fimc_setname(1, "s5p-fimc"); | |
668 | s3c_fimc_setname(2, "s5p-fimc"); | |
669 | ||
5112267e | 670 | /* SOUND */ |
6c29e71c | 671 | aquila_sound_init(); |
5112267e CC |
672 | i2c_register_board_info(AP_I2C_GPIO_BUS_5, i2c_gpio5_devs, |
673 | ARRAY_SIZE(i2c_gpio5_devs)); | |
674 | ||
b315032f MS |
675 | /* FB */ |
676 | s3c_fb_set_platdata(&aquila_lcd_pdata); | |
677 | ||
d947e792 MS |
678 | platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices)); |
679 | } | |
680 | ||
681 | MACHINE_START(AQUILA, "Aquila") | |
682 | /* Maintainers: | |
683 | Marek Szyprowski <m.szyprowski@samsung.com> | |
684 | Kyungmin Park <kyungmin.park@samsung.com> */ | |
02350a1f | 685 | .atag_offset = 0x100, |
d947e792 MS |
686 | .init_irq = s5pv210_init_irq, |
687 | .map_io = aquila_map_io, | |
688 | .init_machine = aquila_machine_init, | |
6bb27d73 | 689 | .init_time = s5p_timer_init, |
1f34f0e2 | 690 | .restart = s5pv210_restart, |
d947e792 | 691 | MACHINE_END |