Linux 3.6-rc1
[deliverable/linux.git] / arch / arm / mach-s5pv210 / mach-aquila.c
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1/* linux/arch/arm/mach-s5pv210/mach-aquila.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
b315032f 15#include <linux/fb.h>
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16#include <linux/i2c.h>
17#include <linux/i2c-gpio.h>
18#include <linux/mfd/max8998.h>
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19#include <linux/mfd/wm8994/pdata.h>
20#include <linux/regulator/fixed.h>
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21#include <linux/gpio_keys.h>
22#include <linux/input.h>
23#include <linux/gpio.h>
d947e792 24
bb3a4ebe 25#include <asm/hardware/vic.h>
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26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/setup.h>
29#include <asm/mach-types.h>
30
31#include <mach/map.h>
32#include <mach/regs-clock.h>
33
a1660c12 34#include <plat/gpio-cfg.h>
d947e792 35#include <plat/regs-serial.h>
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36#include <plat/devs.h>
37#include <plat/cpu.h>
b315032f 38#include <plat/fb.h>
187749bb 39#include <plat/fimc-core.h>
ba3fbef9 40#include <plat/sdhci.h>
20780fcc 41#include <plat/s5p-time.h>
7bf3ba6b 42#include <plat/regs-fb-v4.h>
d947e792 43
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44#include "common.h"
45
d947e792 46/* Following are default values for UCON, ULCON and UFCON UART registers */
c8def085 47#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
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48 S3C2410_UCON_RXILEVEL | \
49 S3C2410_UCON_TXIRQMODE | \
50 S3C2410_UCON_RXIRQMODE | \
51 S3C2410_UCON_RXFIFO_TOI | \
52 S3C2443_UCON_RXERR_IRQEN)
53
c8def085 54#define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8
d947e792 55
f2b7e3c5 56#define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
d947e792 57
df01714a 58static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
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59 [0] = {
60 .hwport = 0,
61 .flags = 0,
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62 .ucon = AQUILA_UCON_DEFAULT,
63 .ulcon = AQUILA_ULCON_DEFAULT,
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64 /*
65 * Actually UART0 can support 256 bytes fifo, but aquila board
66 * supports 128 bytes fifo because of initial chip bug
67 */
f2b7e3c5 68 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 69 S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128,
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70 },
71 [1] = {
72 .hwport = 1,
73 .flags = 0,
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74 .ucon = AQUILA_UCON_DEFAULT,
75 .ulcon = AQUILA_ULCON_DEFAULT,
f2b7e3c5 76 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 77 S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
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78 },
79 [2] = {
80 .hwport = 2,
81 .flags = 0,
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82 .ucon = AQUILA_UCON_DEFAULT,
83 .ulcon = AQUILA_ULCON_DEFAULT,
f2b7e3c5 84 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 85 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
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86 },
87 [3] = {
88 .hwport = 3,
89 .flags = 0,
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90 .ucon = AQUILA_UCON_DEFAULT,
91 .ulcon = AQUILA_ULCON_DEFAULT,
f2b7e3c5 92 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 93 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
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94 },
95};
96
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97/* Frame Buffer */
98static struct s3c_fb_pd_win aquila_fb_win0 = {
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99 .max_bpp = 32,
100 .default_bpp = 16,
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101 .xres = 480,
102 .yres = 800,
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103};
104
105static struct s3c_fb_pd_win aquila_fb_win1 = {
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106 .max_bpp = 32,
107 .default_bpp = 16,
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108 .xres = 480,
109 .yres = 800,
110};
111
112static struct fb_videomode aquila_lcd_timing = {
113 .left_margin = 16,
114 .right_margin = 16,
115 .upper_margin = 3,
116 .lower_margin = 28,
117 .hsync_len = 2,
118 .vsync_len = 2,
119 .xres = 480,
120 .yres = 800,
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121};
122
123static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
124 .win[0] = &aquila_fb_win0,
125 .win[1] = &aquila_fb_win1,
79d3c41a 126 .vtiming = &aquila_lcd_timing,
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127 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
128 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
129 VIDCON1_INV_VCLK | VIDCON1_INV_VDEN,
130 .setup_gpio = s5pv210_fb_gpio_setup_24bpp,
131};
132
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133/* MAX8998 regulators */
134#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
135
136static struct regulator_init_data aquila_ldo2_data = {
137 .constraints = {
138 .name = "VALIVE_1.1V",
139 .min_uV = 1100000,
140 .max_uV = 1100000,
141 .apply_uV = 1,
142 .always_on = 1,
143 .state_mem = {
144 .enabled = 1,
145 },
146 },
147};
148
149static struct regulator_init_data aquila_ldo3_data = {
150 .constraints = {
d1061331 151 .name = "VUSB+MIPI_1.1V",
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152 .min_uV = 1100000,
153 .max_uV = 1100000,
154 .apply_uV = 1,
155 .always_on = 1,
156 },
157};
158
159static struct regulator_init_data aquila_ldo4_data = {
160 .constraints = {
161 .name = "VDAC_3.3V",
162 .min_uV = 3300000,
163 .max_uV = 3300000,
164 .apply_uV = 1,
165 },
166};
167
168static struct regulator_init_data aquila_ldo5_data = {
169 .constraints = {
170 .name = "VTF_2.8V",
171 .min_uV = 2800000,
172 .max_uV = 2800000,
173 .apply_uV = 1,
174 },
175};
176
177static struct regulator_init_data aquila_ldo6_data = {
178 .constraints = {
179 .name = "VCC_3.3V",
180 .min_uV = 3300000,
181 .max_uV = 3300000,
182 .apply_uV = 1,
183 },
184};
185
186static struct regulator_init_data aquila_ldo7_data = {
187 .constraints = {
188 .name = "VCC_3.0V",
189 .min_uV = 3000000,
190 .max_uV = 3000000,
191 .apply_uV = 1,
192 .boot_on = 1,
193 .always_on = 1,
194 },
195};
196
197static struct regulator_init_data aquila_ldo8_data = {
198 .constraints = {
d1061331 199 .name = "VUSB+VADC_3.3V",
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200 .min_uV = 3300000,
201 .max_uV = 3300000,
202 .apply_uV = 1,
203 .always_on = 1,
204 },
205};
206
207static struct regulator_init_data aquila_ldo9_data = {
208 .constraints = {
d1061331 209 .name = "VCC+VCAM_2.8V",
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210 .min_uV = 2800000,
211 .max_uV = 2800000,
212 .apply_uV = 1,
213 .always_on = 1,
214 },
215};
216
217static struct regulator_init_data aquila_ldo10_data = {
218 .constraints = {
219 .name = "VPLL_1.1V",
220 .min_uV = 1100000,
221 .max_uV = 1100000,
222 .apply_uV = 1,
223 .boot_on = 1,
224 },
225};
226
227static struct regulator_init_data aquila_ldo11_data = {
228 .constraints = {
229 .name = "CAM_IO_2.8V",
230 .min_uV = 2800000,
231 .max_uV = 2800000,
232 .apply_uV = 1,
233 .always_on = 1,
234 },
235};
236
237static struct regulator_init_data aquila_ldo12_data = {
238 .constraints = {
239 .name = "CAM_ISP_1.2V",
240 .min_uV = 1200000,
241 .max_uV = 1200000,
242 .apply_uV = 1,
243 .always_on = 1,
244 },
245};
246
247static struct regulator_init_data aquila_ldo13_data = {
248 .constraints = {
249 .name = "CAM_A_2.8V",
250 .min_uV = 2800000,
251 .max_uV = 2800000,
252 .apply_uV = 1,
253 .always_on = 1,
254 },
255};
256
257static struct regulator_init_data aquila_ldo14_data = {
258 .constraints = {
259 .name = "CAM_CIF_1.8V",
260 .min_uV = 1800000,
261 .max_uV = 1800000,
262 .apply_uV = 1,
263 .always_on = 1,
264 },
265};
266
267static struct regulator_init_data aquila_ldo15_data = {
268 .constraints = {
269 .name = "CAM_AF_3.3V",
270 .min_uV = 3300000,
271 .max_uV = 3300000,
272 .apply_uV = 1,
273 .always_on = 1,
274 },
275};
276
277static struct regulator_init_data aquila_ldo16_data = {
278 .constraints = {
279 .name = "VMIPI_1.8V",
280 .min_uV = 1800000,
281 .max_uV = 1800000,
282 .apply_uV = 1,
283 .always_on = 1,
284 },
285};
286
287static struct regulator_init_data aquila_ldo17_data = {
288 .constraints = {
289 .name = "CAM_8M_1.8V",
290 .min_uV = 1800000,
291 .max_uV = 1800000,
292 .apply_uV = 1,
293 .always_on = 1,
294 },
295};
296
297/* BUCK */
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298static struct regulator_consumer_supply buck1_consumer =
299 REGULATOR_SUPPLY("vddarm", NULL);
a1660c12 300
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301static struct regulator_consumer_supply buck2_consumer =
302 REGULATOR_SUPPLY("vddint", NULL);
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303
304static struct regulator_init_data aquila_buck1_data = {
305 .constraints = {
306 .name = "VARM_1.2V",
307 .min_uV = 1200000,
308 .max_uV = 1200000,
309 .apply_uV = 1,
310 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
311 REGULATOR_CHANGE_STATUS,
312 },
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313 .num_consumer_supplies = 1,
314 .consumer_supplies = &buck1_consumer,
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315};
316
317static struct regulator_init_data aquila_buck2_data = {
318 .constraints = {
319 .name = "VINT_1.2V",
320 .min_uV = 1200000,
321 .max_uV = 1200000,
322 .apply_uV = 1,
323 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
324 REGULATOR_CHANGE_STATUS,
325 },
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326 .num_consumer_supplies = 1,
327 .consumer_supplies = &buck2_consumer,
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328};
329
330static struct regulator_init_data aquila_buck3_data = {
331 .constraints = {
332 .name = "VCC_1.8V",
333 .min_uV = 1800000,
334 .max_uV = 1800000,
335 .apply_uV = 1,
336 .state_mem = {
337 .enabled = 1,
338 },
339 },
340};
341
342static struct regulator_init_data aquila_buck4_data = {
343 .constraints = {
344 .name = "CAM_CORE_1.2V",
345 .min_uV = 1200000,
346 .max_uV = 1200000,
347 .apply_uV = 1,
348 .always_on = 1,
349 },
350};
351
352static struct max8998_regulator_data aquila_regulators[] = {
353 { MAX8998_LDO2, &aquila_ldo2_data },
354 { MAX8998_LDO3, &aquila_ldo3_data },
355 { MAX8998_LDO4, &aquila_ldo4_data },
356 { MAX8998_LDO5, &aquila_ldo5_data },
357 { MAX8998_LDO6, &aquila_ldo6_data },
358 { MAX8998_LDO7, &aquila_ldo7_data },
359 { MAX8998_LDO8, &aquila_ldo8_data },
360 { MAX8998_LDO9, &aquila_ldo9_data },
361 { MAX8998_LDO10, &aquila_ldo10_data },
362 { MAX8998_LDO11, &aquila_ldo11_data },
363 { MAX8998_LDO12, &aquila_ldo12_data },
364 { MAX8998_LDO13, &aquila_ldo13_data },
365 { MAX8998_LDO14, &aquila_ldo14_data },
366 { MAX8998_LDO15, &aquila_ldo15_data },
367 { MAX8998_LDO16, &aquila_ldo16_data },
368 { MAX8998_LDO17, &aquila_ldo17_data },
369 { MAX8998_BUCK1, &aquila_buck1_data },
370 { MAX8998_BUCK2, &aquila_buck2_data },
371 { MAX8998_BUCK3, &aquila_buck3_data },
372 { MAX8998_BUCK4, &aquila_buck4_data },
373};
374
375static struct max8998_platform_data aquila_max8998_pdata = {
376 .num_regulators = ARRAY_SIZE(aquila_regulators),
377 .regulators = aquila_regulators,
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378 .buck1_set1 = S5PV210_GPH0(3),
379 .buck1_set2 = S5PV210_GPH0(4),
380 .buck2_set3 = S5PV210_GPH0(5),
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381 .buck1_voltage1 = 1200000,
382 .buck1_voltage2 = 1200000,
383 .buck1_voltage3 = 1200000,
384 .buck1_voltage4 = 1200000,
385 .buck2_voltage1 = 1200000,
386 .buck2_voltage2 = 1200000,
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387};
388#endif
389
80849798 390static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = {
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391 REGULATOR_SUPPLY("DBVDD", "5-001a"),
392 REGULATOR_SUPPLY("AVDD2", "5-001a"),
393 REGULATOR_SUPPLY("CPVDD", "5-001a"),
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394};
395
396static struct regulator_consumer_supply wm8994_fixed_voltage1_supplies[] = {
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397 REGULATOR_SUPPLY("SPKVDD1", "5-001a"),
398 REGULATOR_SUPPLY("SPKVDD2", "5-001a"),
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399};
400
401static struct regulator_init_data wm8994_fixed_voltage0_init_data = {
402 .constraints = {
403 .always_on = 1,
404 },
405 .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage0_supplies),
406 .consumer_supplies = wm8994_fixed_voltage0_supplies,
407};
408
409static struct regulator_init_data wm8994_fixed_voltage1_init_data = {
410 .constraints = {
411 .always_on = 1,
412 },
413 .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage1_supplies),
414 .consumer_supplies = wm8994_fixed_voltage1_supplies,
415};
416
417static struct fixed_voltage_config wm8994_fixed_voltage0_config = {
418 .supply_name = "VCC_1.8V_PDA",
419 .microvolts = 1800000,
420 .gpio = -EINVAL,
421 .init_data = &wm8994_fixed_voltage0_init_data,
422};
423
424static struct fixed_voltage_config wm8994_fixed_voltage1_config = {
425 .supply_name = "V_BAT",
426 .microvolts = 3700000,
427 .gpio = -EINVAL,
428 .init_data = &wm8994_fixed_voltage1_init_data,
429};
430
431static struct platform_device wm8994_fixed_voltage0 = {
432 .name = "reg-fixed-voltage",
433 .id = 0,
434 .dev = {
435 .platform_data = &wm8994_fixed_voltage0_config,
436 },
437};
438
439static struct platform_device wm8994_fixed_voltage1 = {
440 .name = "reg-fixed-voltage",
441 .id = 1,
442 .dev = {
443 .platform_data = &wm8994_fixed_voltage1_config,
444 },
445};
446
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447static struct regulator_consumer_supply wm8994_avdd1_supply =
448 REGULATOR_SUPPLY("AVDD1", "5-001a");
80849798 449
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450static struct regulator_consumer_supply wm8994_dcvdd_supply =
451 REGULATOR_SUPPLY("DCVDD", "5-001a");
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452
453static struct regulator_init_data wm8994_ldo1_data = {
454 .constraints = {
455 .name = "AVDD1_3.0V",
456 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
457 },
458 .num_consumer_supplies = 1,
459 .consumer_supplies = &wm8994_avdd1_supply,
460};
461
462static struct regulator_init_data wm8994_ldo2_data = {
463 .constraints = {
464 .name = "DCVDD_1.0V",
465 },
466 .num_consumer_supplies = 1,
467 .consumer_supplies = &wm8994_dcvdd_supply,
468};
469
470static struct wm8994_pdata wm8994_platform_data = {
471 /* configure gpio1 function: 0x0001(Logic level input/output) */
472 .gpio_defaults[0] = 0x0001,
473 /* configure gpio3/4/5/7 function for AIF2 voice */
474 .gpio_defaults[2] = 0x8100,
475 .gpio_defaults[3] = 0x8100,
476 .gpio_defaults[4] = 0x8100,
477 .gpio_defaults[6] = 0x0100,
478 /* configure gpio8/9/10/11 function for AIF3 BT */
479 .gpio_defaults[7] = 0x8100,
480 .gpio_defaults[8] = 0x0100,
481 .gpio_defaults[9] = 0x0100,
482 .gpio_defaults[10] = 0x0100,
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483 .ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
484 .ldo[1] = { 0, &wm8994_ldo2_data },
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485};
486
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487/* GPIO I2C PMIC */
488#define AP_I2C_GPIO_PMIC_BUS_4 4
489static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = {
490 .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */
491 .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */
492};
493
494static struct platform_device aquila_i2c_gpio_pmic = {
495 .name = "i2c-gpio",
496 .id = AP_I2C_GPIO_PMIC_BUS_4,
497 .dev = {
498 .platform_data = &aquila_i2c_gpio_pmic_data,
499 },
500};
501
502static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
503#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
504 {
505 /* 0xCC when SRAD = 0 */
506 I2C_BOARD_INFO("max8998", 0xCC >> 1),
507 .platform_data = &aquila_max8998_pdata,
508 },
509#endif
510};
511
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512/* GPIO I2C AP 1.8V */
513#define AP_I2C_GPIO_BUS_5 5
514static struct i2c_gpio_platform_data aquila_i2c_gpio5_data = {
515 .sda_pin = S5PV210_MP05(3), /* XM0ADDR_11 */
516 .scl_pin = S5PV210_MP05(2), /* XM0ADDR_10 */
517};
518
519static struct platform_device aquila_i2c_gpio5 = {
520 .name = "i2c-gpio",
521 .id = AP_I2C_GPIO_BUS_5,
522 .dev = {
523 .platform_data = &aquila_i2c_gpio5_data,
524 },
525};
526
527static struct i2c_board_info i2c_gpio5_devs[] __initdata = {
528 {
529 /* CS/ADDR = low 0x34 (FYI: high = 0x36) */
530 I2C_BOARD_INFO("wm8994", 0x1a),
80849798 531 .platform_data = &wm8994_platform_data,
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532 },
533};
534
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535/* PMIC Power button */
536static struct gpio_keys_button aquila_gpio_keys_table[] = {
537 {
538 .code = KEY_POWER,
539 .gpio = S5PV210_GPH2(6),
540 .desc = "gpio-keys: KEY_POWER",
541 .type = EV_KEY,
542 .active_low = 1,
543 .wakeup = 1,
544 .debounce_interval = 1,
545 },
546};
547
548static struct gpio_keys_platform_data aquila_gpio_keys_data = {
549 .buttons = aquila_gpio_keys_table,
550 .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table),
551};
552
553static struct platform_device aquila_device_gpiokeys = {
554 .name = "gpio-keys",
555 .dev = {
556 .platform_data = &aquila_gpio_keys_data,
557 },
558};
559
560static void __init aquila_pmic_init(void)
561{
562 /* AP_PMIC_IRQ: EINT7 */
563 s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
564 s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
565
566 /* nPower: EINT22 */
567 s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
568 s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
569}
570
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571/* MoviNAND */
572static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = {
573 .max_width = 4,
574 .cd_type = S3C_SDHCI_CD_PERMANENT,
575};
576
577/* Wireless LAN */
578static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = {
579 .max_width = 4,
580 .cd_type = S3C_SDHCI_CD_EXTERNAL,
581 /* ext_cd_{init,cleanup} callbacks will be added later */
582};
583
584/* External Flash */
585#define AQUILA_EXT_FLASH_EN S5PV210_MP05(4)
586#define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4)
587static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
588 .max_width = 4,
589 .cd_type = S3C_SDHCI_CD_GPIO,
590 .ext_cd_gpio = AQUILA_EXT_FLASH_CD,
591 .ext_cd_gpio_invert = 1,
592};
593
594static void aquila_setup_sdhci(void)
595{
2f4f0b42 596 gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN");
ba3fbef9
MS
597
598 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
599 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
600 s3c_sdhci2_set_platdata(&aquila_hsmmc2_data);
601};
602
c01c4692
SK
603/* Audio device */
604static struct platform_device aquila_device_audio = {
605 .name = "smdk-audio",
606 .id = -1,
607};
608
d947e792 609static struct platform_device *aquila_devices[] __initdata = {
a1660c12 610 &aquila_i2c_gpio_pmic,
5112267e 611 &aquila_i2c_gpio5,
a1660c12 612 &aquila_device_gpiokeys,
c01c4692 613 &aquila_device_audio,
b315032f 614 &s3c_device_fb,
13904fba 615 &s5p_device_onenand,
ba3fbef9
MS
616 &s3c_device_hsmmc0,
617 &s3c_device_hsmmc1,
618 &s3c_device_hsmmc2,
7200c11d
SN
619 &s5p_device_fimc0,
620 &s5p_device_fimc1,
621 &s5p_device_fimc2,
48c18756 622 &s5p_device_fimc_md,
6c29e71c 623 &s5pv210_device_iis0,
80849798
CC
624 &wm8994_fixed_voltage0,
625 &wm8994_fixed_voltage1,
d947e792
MS
626};
627
6c29e71c
CC
628static void __init aquila_sound_init(void)
629{
630 unsigned int gpio;
631
632 /* CODEC_XTAL_EN
633 *
634 * The Aquila board have a oscillator which provide main clock
635 * to WM8994 codec. The oscillator provide 24MHz clock to WM8994
636 * clock. Set gpio setting of "CODEC_XTAL_EN" to enable a oscillator.
637 * */
638 gpio = S5PV210_GPH3(2); /* XEINT_26 */
639 gpio_request(gpio, "CODEC_XTAL_EN");
640 s3c_gpio_cfgpin(gpio, S3C_GPIO_OUTPUT);
641 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
642
643 /* Ths main clock of WM8994 codec uses the output of CLKOUT pin.
644 * The CLKOUT[9:8] set to 0x3(XUSBXTI) of 0xE010E000(OTHERS)
645 * because it needs 24MHz clock to operate WM8994 codec.
646 */
647 __raw_writel(__raw_readl(S5P_OTHERS) | (0x3 << 8), S5P_OTHERS);
648}
649
d947e792
MS
650static void __init aquila_map_io(void)
651{
3fa754c2 652 s5pv210_init_io(NULL, 0);
d947e792 653 s3c24xx_init_clocks(24000000);
df01714a 654 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
20780fcc 655 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
d947e792
MS
656}
657
658static void __init aquila_machine_init(void)
659{
a1660c12
MS
660 /* PMIC */
661 aquila_pmic_init();
662 i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
663 ARRAY_SIZE(i2c_gpio_pmic_devs));
ba3fbef9
MS
664 /* SDHCI */
665 aquila_setup_sdhci();
a1660c12 666
187749bb
SN
667 s3c_fimc_setname(0, "s5p-fimc");
668 s3c_fimc_setname(1, "s5p-fimc");
669 s3c_fimc_setname(2, "s5p-fimc");
670
5112267e 671 /* SOUND */
6c29e71c 672 aquila_sound_init();
5112267e
CC
673 i2c_register_board_info(AP_I2C_GPIO_BUS_5, i2c_gpio5_devs,
674 ARRAY_SIZE(i2c_gpio5_devs));
675
b315032f
MS
676 /* FB */
677 s3c_fb_set_platdata(&aquila_lcd_pdata);
678
d947e792
MS
679 platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices));
680}
681
682MACHINE_START(AQUILA, "Aquila")
683 /* Maintainers:
684 Marek Szyprowski <m.szyprowski@samsung.com>
685 Kyungmin Park <kyungmin.park@samsung.com> */
02350a1f 686 .atag_offset = 0x100,
d947e792 687 .init_irq = s5pv210_init_irq,
bb3a4ebe 688 .handle_irq = vic_handle_irq,
d947e792
MS
689 .map_io = aquila_map_io,
690 .init_machine = aquila_machine_init,
20780fcc 691 .timer = &s5p_timer,
1f34f0e2 692 .restart = s5pv210_restart,
d947e792 693MACHINE_END
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